System: MSI main board, 980X (188 clock, 23 multiplier), 12Gb Dominator 2000 (1880 MHz), 3R0 256gb C300 on LSi 9260 with fastpath using x16 slot.
No read ahead and write through gives CDM on the left. Using read ahead with no other changes gives the middle CDM. Using no read ahead with always write back gives the results on the right.
Using read ahead and write back gives the best throughput, but I loose 4K QD32.
I am open to comments, suggestions, analysis and what not.
Stripe size = 64K.
Thanks
Mitch
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