AMD cuts to the core with 'Bulldozer' Opterons

[LesGrossman]

See my previous post.

I've seen it and i lmao... thanks.

[Smartidiot89]

It means that two Bulldozer cores will only be 80% faster than a single K10.5 core, not 100% (like a dual core K10.5), or more preferably, over 2.0x as it should be with a new microarchitecture. They are trading off performance in order to add more cores.

No.

It doesn't meen 2 Bulldozer "cores" will be only 80% faster than 1 K10.5 core they aren't even comparing K10.5... 1 Bulldozer Module will be faster than 2 K10.5 cores by good margins.

With Bulldozer comes CMT "Cluster Multi-Threading" which will basically have 2 "cores" in 1 "Bulldozer Module" - one CMT unit. With one of the Integer Schedulers working we have a performance number of 1. With both Integer Schedulers working in one of these "modules" we will see a performance number of 1.8.

But what do these performance numbers represent, at the moment noone knows, but each Bulldozer "core" will definitely be faster than a K10.5 core that is for sure.

[003]

No.

It doesn't meen 2 Bulldozer "cores" will be only 80% faster than 1 K10.5 core they aren't even comparing K10.5... 1 Bulldozer Module will be faster than 2 K10.5 cores by good margins.

With Bulldozer comes CMT "Cluster Multi-Threading" which will basically have 2 "cores" in 1 "Bulldozer Module" - one CMT unit. With one of the Integer Schedulers working we have a performance number of 1. With both Integer Schedulers working in one of these "modules" we will see a performance number of 1.8.

But what do these performance numbers represent, at the moment noone knows, but each Bulldozer "core" will definitely be faster than a K10.5 core that is for sure.

Hopefully you are correct. That isn't how the article is worded though

[gasiads09]

Never thought of someone doing it quite like that before but I guess it works. Pretty cool. Clean up the setup and I would say its pretty innovative. Whats the turbo lag like on that being that it has to travel so far.

[Nedjo]

The article said that two Bulldozer cores have a 1.8x increase in parallel performance over a single current generation core.

did you read my previous post? Please read it again, especially quote from the article!

Also point me out where in the article did you read comparison with the current gen??

[Smartidiot89]

Hopefully you are correct. That isn't how the article is worded though

I am correct that's for sure, AMD has NEVER compared Bulldozer performance with K10.5 ever.

1 Bulldozer core will outperform 1 K10.5 core, and 2 Bulldozer cores(1 module) will also outperform 2 K10.5 cores for sure.

[LesGrossman]

I am correct that's for sure, AMD has NEVER compared Bulldozer performance with K10.5 ever.

1 Bulldozer core will outperform 1 K10.5 core, and 2 Bulldozer cores(1 module) will also outperform 2 K10.5 cores for sure.

Not true:

[informal]

See my previous post.

AMD just stated that 2 cores inside the module(or a big core if you will) net 80% linear increase in throughput over a module with one single Bulldozer core inside it... That's all. Nothing is said performance wise or compared to Shanghai cores. Each integer core inside BD module is 4 way capable,while Shanghai is 3way capable core.Theoretically if you have a mix of int and fp code,BD module will simply destroy 2 K10.5 cores in throughput since it has much higher theoretical throughput capability(think 2x higher),plus it has a much much more potent SIMD unit (FMAC capable).Single thread perf. should also get a healthy bump due to uarch. modifications (before mentioned wider decoding + more on the memory disambiguation front + a whole new Turbo mode on the core level inside the modules etc.).

[Xoulz]

AMD just stated that 2 cores inside the module(or a big core if you will) net 80% linear increase in throughput over a module with one single Bulldozer core inside it... That's all. Nothing is said performance wise or compared to Shanghai cores. Each integer core inside BD module is 4 way capable,while Shanghai is 3way capable core.Theoretically if you have a mix of int and fp code,BD module will simply destroy 2 K10.5 cores in throughput since it has much higher theoretical throughput capability(think 2x higher),plus it has a much much more potent SIMD unit (FMAC capable).Single thread perf. should also get a healthy bump due to uarch. modifications (before mentioned wider decoding + more on the memory disambiguation front + a whole new Turbo mode on the core level inside the modules etc.).

This^^

[Helmore]

I am correct that's for sure, AMD has NEVER compared Bulldozer performance with K10.5 ever.

1 Bulldozer core will outperform 1 K10.5 core, and 2 Bulldozer cores(1 module) will also outperform 2 K10.5 cores for sure.

You're not completely correct on that one. AMD has indirectly provided some performance comparisons with K10.5. Just look "Upgrade to Bulldozer" part over in this article: http://it.anandtech.com/IT/showdoc.aspx?i=3681&p=3
There it states this: "Two times 4 Bulldozer modules (2 x 8 "cores" or 16 cores) are about 60 to 80% faster than the twelve core Opteron 6100 CPU in SPECInt_rate". Lets presume that's for two CPUs clocked at the same frequency to make it easier. This would mean that a single BD module will be about 20% to 35% faster than a dual core K10.5 based CPU in integer performance. In a later article by AnandTech, Anand simply states this:

According to AMD's roadmaps, Zambezi will use either 4 or 8 Bulldozer cores (that's 2 or 4 modules). The quad-core Zambezi should have roughly 10 - 35% better integer performance than a similarly clocked quad-core Phenom II. An eight-core Zambezi will be a threaded monster.

I actually wouldn't be surprised if a single BD module is at least about 10-20% faster than a dual core K10.5 CPU in general performance. Remember though, that single BD module will be about the same size as a Sandy Bridge core, maybe a bit smaller than that. Quite an achievement.

That's all still a bit speculation though. We'll just have to reserve judgement until it's launched.

[haylui]

You're not completely correct on that one. AMD has indirectly provided some performance comparisons with K10.5. Just look "Upgrade to Bulldozer" part over in this article: http://it.anandtech.com/IT/showdoc.aspx?i=3681&p=3
There it states this: "Two times 4 Bulldozer modules (2 x 8 "cores" or 16 cores) are about 60 to 80% faster than the twelve core Opteron 6100 CPU in SPECInt_rate". Lets presume that's for two CPUs clocked at the same frequency to make it easier. This would mean that a single BD module will be about 20% to 35% faster than a dual core K10.5 based CPU in integer performance. In a later article by AnandTech, Anand simply states this:
I actually wouldn't be surprised if a single BD module is at least about 10-20% faster than a dual core K10.5 CPU in general performance. Remember though, that single BD module will be about the same size as a Sandy Bridge core, maybe a bit smaller than that. Quite an achievement.

That's all still a bit speculation though. We'll just have to reserve judgement until it's launched.

how does Anandtech got such information???

[god_43]

how does Anandtech got such information???

i believe they obtained it from amd itself.

[AliG]

Guys, I don't understand why any of you think bulldozer will be weaker than k10.5. It's pretty obvious, just from the increase in SSE instructions and the additional integer pipeline that a single bulldozer "core" will be considerably faster than a k10.5 core.

I think this article was clearly written by people who really have no clue about what bulldozer is, let alone what FP and Int stand for. Just the fact that they made that stupid k9 crack (when if anything it should be k11) shows their pure ignorance for this design. Trusting the wording in the article is like asking Charlie advise on buying Nvidia stock, you could do it if you want, but I certainly would not.

[haylui]

i believe they obtained it from amd itself.

If BD is JUST 10~30% faster than current K10.5, then I'm afraid that it could be another i7 vs K10.5 when facing SB

[god_43]

http://www.xbitlabs.com/news/cpu/dis...h_Sources.html


ooo nice tdp's!

[Sn0wm@n]

i'm no engineer but ill take a wild guess and say linear scaling is impossible!! so that 10% hit is so low considering that more cores you add the less it should scale

[god_43]

Gives, I don't understand why any of you think bulldozer will be weaker than k10.5. It's pretty obvious, just from the increase in SSE instructions and the additional integer pipeline that a single bulldozer "core" will be considerably faster than a k10.5 core.

I think this article was clearly written by people who really have no clue about what bulldozer is, let alone what FP and Int stand for. Just the fact that they made that stupid k9 crack (when if anything it should be k11) shows their pure ignorance for this design. Trusting the wording in the article is like asking Charlie advise on buying Nvidia stock, you could do it if you want, but I certainly would not.

thats what i thought? amd cant afford to launch any think weaker than what they have now. for the record, i was questioning the article more so than believing there numbers.

[flippin_waffles]

i'm no engineer but ill take a wild guess and say linear scaling is impossible!! so that 10% hit is so low considering that more cores you add the less it should scale

How much you wanna bet AMD scales ALOT better with cores than Intel does with hyperthreading.

[NickF]

AMD just stated that 2 cores inside the module(or a big core if you will) net 80% linear increase in throughput over a module with one single Bulldozer core inside it... That's all. Nothing is said performance wise or compared to Shanghai cores. Each integer core inside BD module is 4 way capable,while Shanghai is 3way capable core.Theoretically if you have a mix of int and fp code,BD module will simply destroy 2 K10.5 cores in throughput since it has much higher theoretical throughput capability(think 2x higher),plus it has a much much more potent SIMD unit (FMAC capable).Single thread perf. should also get a healthy bump due to uarch. modifications (before mentioned wider decoding + more on the memory disambiguation front + a whole new Turbo mode on the core level inside the modules etc.).

Thank you sir for clearing this up for me. People need to learn to read for whats there, not what they want to be there

[Sn0wm@n]

How much you wanna bet AMD scales ALOT better with cores than Intel does with hyperthreading.

LOL yeahh they might scale better... but its impossible to have a 100% gain more per core you add... thus my question.....

[AliG]

LOL yeahh they might scale better... but its impossible to have a 100% gain more per core you add... thus my question.....

Of course 100% scaling is impossible, you would need to live in a perfect world where electrons didn't leak out of the system. A 20% hit in multithreaded performance is really good considering each core takes up only 50% of a full core. Even having two full cores would still have a performance hit, smaller than 20%, but nothing scales at 100% efficiency.

[Manicdan]

more than 100% scaling is possible as long as something is being over saturated. like going from 1GB to 2GB while playing GTA4 maxed out. for a cpu i dont see there being any similar scenarios though.

[skugpezz]

more than 100% scaling is possible as long as something is being over saturated. like going from 1GB to 2GB while playing GTA4 maxed out. for a cpu i dont see there being any similar scenarios though.

yea a 4770 and a 5770 scles over 100% in crossfire (some games)

[Nedjo]

JF blogs about AMD server outlook! Must read: http://blogs.amd.com/work/2009/12/11...10-and-beyond/

The Bulldozer architecture can provide up to 80% greater expected throughput when running 2 threads simultaneously compared to a single thread running on a single integer core. Our engineers estimate that the amount of discrete circuitry that is added to each Bulldozer module in order to allow for a second integer thread to run only adds ~12% additional circuitry to each module, which translates into only ~5% of circuitry to the total Bulldozer die. We believe this is an excellent balance of greater performance with a very small silicon cost. The goal of the shared components is to help drive down power consumption. When you consider that our 16-core Interlagos is being designed to fit in the same power/thermal environment as a 12-core Magny Cours, it is clear that we’ve made some good choices around the power optimization – without sacrificing performance or features.

Definition of the "module":

he module has 2 integer cores. The two cores will execute 2 threads, not one. The OS will not ever see the module, the OS will only see the cores.

as I wrote, really useful blog!

[Manicdan]

^nice, i wish though they did a bit more comparing the die space to other chips, instead of just itself.