The official GT300/Fermi Thread

[WeeMaan]

http://www.brightsideofnews.com/news...6gb-gddr5.aspx

3.0 billion transistors
40nm TSMC
384-bit memory interface
512 shader cores [renamed into CUDA Cores]
32 CUDA cores per Shader Cluster
1MB L1 cache memory [divided into 16KB Cache - Shared Memory]
768KB L2 unified cache memory
Up to 6GB GDDR5 memory
Half Speed IEEE 754 Double Precision

[Bodkin]

Repost : http://www.xtremesystems.org/forums/...=235490&page=4

[Hornet331]

i've always wondered if bsn really stands for bright side of news or more like "bull sh1t network" or something

definitly the later one.

[WeeMaan]

Repost : http://www.xtremesystems.org/forums/...=235490&page=4

I missed that, sorry for repost.

[LiquidReactor]

http://www.techpowerup.com/104942/NV..._Detailed.html

[randomizer]

http://www.techpowerup.com/104942/NV..._Detailed.html

Which was pulled from BSN, which was pulled from the table linked in the other thread, which was pulled from wikipedia and changed slightly, which was pulled from random forum rumours.

[annihilat0r]

Which was pulled from BSN, which was pulled from the table linked in the other thread, which was pulled from wikipedia and changed slightly, which was pulled from random forum rumours.

In the table the memory bus is listed as 512 bit, here it's 384.

[trinibwoy]

Which was pulled from BSN, which was pulled from the table linked in the other thread, which was pulled from wikipedia and changed slightly, which was pulled from random forum rumours.

I can guarantee you that BSN's data was not pulled from a table on any other site.

[demonkevy666]

In the table the memory bus is listed as 512 bit, here it's 384.

it's a jumble then no one know but they have bits and pieces with out the picture to think it out.

[jmke]

I can guarantee you that BSN's data was not pulled from a table on any other site.

doesn't matter much, it's the same

[Mechromancer]

I think the most interesting part of this uarch is the cache structure. If the L1 and L2 is ECC, this could be a huge benefit to GPGPU computing. Nvidia looks like they will keep the lead in GPGPU if they have ECC and cache coherency taken care of. We can likely expect the GT300 to at least match the 5000 series in 3D gaming.

Where I doubt the GT300 can compete with the ATI products is price if yields aren't perfect.

[lockee]

512 shader cores [renamed into CUDA Cores]

I can't tell if this is marketing or brainwashing.

[saaya]

I think the most interesting part of this uarch is the cache structure. If the L1 and L2 is ECC, this could be a huge benefit to GPGPU computing. Nvidia looks like they will keep the lead in GPGPU if they have ECC and cache coherency taken care of. We can likely expect the GT300 to at least match the 5000 series in 3D gaming.

Where I doubt the GT300 can compete with the ATI products is price if yields aren't perfect.

huh? what does ecc cache have to do with gaming performance?

[Mechromancer]

huh? what does ecc cache have to do with gaming performance?

READ WHAT I WROTE AGAIN. Your eyes failed you. ECC is useful for GPGPU appications.

[saaya]

READ WHAT I WROTE AGAIN. Your eyes failed you. ECC is useful for GPGPU appications.

well you talk about gpgpu needing ecc cache and then the next sentence is that gaming perf will be good... it looked to me like your drawing that as a conclusion of the ecc cache

[zalbard]

CUDA cores? Hahaha.
They won't give up CUDA even when it's too late, huh?

[trinibwoy]

CUDA cores? Hahaha.
They won't give up CUDA even when it's too late, huh?

They're slowly trying to turn CUDA into an architecture, like x86. So Intel has x86 cores, Nvidia has CUDA cores. It's all part of the master plan. Bwahahahaha!

But seriously, Nvidia's plans are far more extensive and longer term than we can cover in short-sighted forum banter. They really want to be a significant provider of high performance computing. So for them, it's a lot bigger than getting more frames in Crysis, it's about breaking into new markets with new products and making more $$$$$$.

[jaredpace]

They're slowly trying to turn CUDA into an architecture, like x86. So Intel has x86 cores, Nvidia has CUDA cores. It's all part of the master plan. Bwahahahaha!

But seriously, Nvidia's plans are far more extensive and longer term than we can cover in short-sighted forum banter. They really want to be a significant provider of high performance computing. So for them, it's a lot bigger than getting more frames in Crysis, it's about breaking into new markets with new products and making more $$$$$$.

I agree.

[Clairvoyant129]

Well we can all agree that during Nvidia's GPU Technology Conference today, Jen-Hsun Huang will talk about GT300.

[ajaidev]

lol at CUDA cores, to use the cores you need cuda installed....

Well from what it seems GT300 will be a monster in scientifically intensive games How it performs in real games is the real question.

[WeeMaan]

Well we can all agree that during Nvidia's GPU Technology Conference today, Jen-Hsun Huang will talk about GT300.

Most likely, yes.

[trinibwoy]

lol at CUDA cores, to use the cores you need cuda installed....

You mean just like you need x86 binaries and an x86 OS to use x86 cores?

[nr4]

Seriously now, this new architecture is astonishing.
For me, just the ideea that it natively supports C++ is more then enough.

Speaking of games and physics, this GT300 will be the new frontier.

Don't know why, but ATI smells like "voodoo" to me.

[Helloworld_98]

anyone else noticed it doesn't say that is has DX11 support in those specs?

[Sh1tyMcGee]

NVIDIA GT300 ''Fermi'' Detailed
NVIDIA's upcoming flagship graphics processor is going by a lot of codenames. While some call it the GF100, others GT300 (based on the present nomenclature), what is certain that the NVIDIA has given the architecture an internal name of "Fermi", after the Italian physicist Enrico Fermi, the inventor of the nuclear reactor. It doesn't come as a surprise, that the codename of the board itself is going to be called "reactor", according to some sources.

Based on information gathered so far about GT300/Fermi, here's what's packed into it:

* Transistor count of over 3 billion
* Built on the 40 nm TSMC process
* 512 shader processors (which NVIDIA may refer to as "CUDA cores")
* 32 cores per core cluster
* 384-bit GDDR5 memory interface
* 1 MB L1 cache memory, 768 KB L2 unified cache memory
* Up to 6 GB of total memory, 1.5 GB can be expected for the consumer graphics variant
* Half Speed IEEE 754 Double Precision floating point
* Native support for execution of C (CUDA), C++, Fortran, support for DirectCompute 11, DirectX 11, OpenGL 3.1, and OpenCL