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Thread: Intels Larrabee to be "HUGE" - 971mm squared on 45nm

  1. #26
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    I am not sure that 971mm^2 is possible.

    http://www.nikonprecision.com/products/nsr_s310f.html

    Specs of latest litho tool from Nikon. Only 26*33mm exposure field gives 858mm^2 max.
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  2. #27
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    Quote Originally Posted by Nedjo View Post
    +1...

    but it's worst: "One critical point we were told was that 1st and 2nd generation Larrabee GPUs will not be compatible with 3rd generation Larrabee. This is of course, highly speculative and very far out. According to the data, Intel's 3rd generation part will have an emulation mode for backwards compatibility. If this is true, then developers would have a hard time programming for Larrabee."
    One critical point we were told was that 7th and 8th generation Radeon GPUs will not be compatible with 9th generation Radeon. This is of course, highly speculative and very far out. According to the data, ATI's 9th generation part will have an emulation mode for backwards compatibility. If this is true, then developers would have a hard time programming for Radeon....

    Now to the same with NV..

    Uh btw. source: MY ASS

  3. #28
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    Ugh, normalized to GT200 means doing some pointless and not necessarily accurate math and imagining what Larabee's die size would be on 65nm (that's where the LOL no reticle in the world can do that 971mm2 die-size comes from). You could also say that normalized to the 8088 it would be as large as a house (well not really, but still), and it would have the exact same relevance/importance.

  4. #29
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    Larrabee will be 512bit (stated by Intel them self (source))

    and for die size a 300mm wafer can hold 85 chips (counting from the pics from intel) so max die size with no loss is 831,5mm^2 with the los of not complete chips this will result in some ware in the 600-800 range

    from my own calculation using the photo and some software to measure on it. it is something like 28mmx21mm witch would result in a 588mm^2. but sins this isent a exect method it is probably in the 494-690 mm^2 range
    Last edited by lookmomnobrains; 06-10-2009 at 04:49 AM.

  5. #30
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    Quote Originally Posted by lookmomnobrains View Post
    Larrabee will be 512bit (stated by Intel them self (source))
    No, not exactly.

    The Larrabee architecture uses a 1024 bits-wide, bi-directional ring network (i.e., 512 bits in each direction) to allow agents to communicate with each other in low latency manner resulting in super fast communication between cores.
    Thats simply internal data. CPUs are 256bit to compare.

    The second and last 512bit number is the SIMD unit.
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  6. #31
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    Quote Originally Posted by lookmomnobrains View Post
    Larrabee will be 512bit (stated by Intel them self (source))

    and for die size a 300mm wafer can hold 85 chips (counting from the pics from intel) so max die size with no loss is 831,5mm^2 with the los of not complete chips this will result in some ware in the 600-800 range

    from my own calculation using the photo and some software to measure on it. it is something like 28mmx21mm witch would result in a 588mm^2. but sins this isent a exect method it is probably in the 494-690 mm^2 range
    858mm^2 is the max possible exposure size for a single die. There is just no way 971 is possible since no litho tool can print that large at that resolution.
    Quote Originally Posted by alacheesu View Post
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  7. #32
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    We contacted Intel for comment in regards to the above information. Intel denied that any of the above is true.
    well duh, cause what this mysterious source at some manufacturer close to intel has told you is complete bull...

    im really surprised that somebody working with tech all day can know so little about one of the, if not THE most anticipated new products to come, and get fooled with a load of numbers and statements that sound like a prank from some forum teenager...

  8. #33
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    Quote Originally Posted by saaya View Post
    well duh, cause what this mysterious source at some manufacturer close to intel has told you is complete bull...

    im really surprised that somebody working with tech all day can know so little about one of the, if not THE most anticipated new products to come, and get fooled with a load of numbers and statements that sound like a prank from some forum teenager...
    doesn't matter as long as it creats hits.

  9. #34
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    971mm^2 is as big as a human fist. The IHS+BGA package connections's longitude is usually 3 times the die's size...
    For instance:

    Athlon XP:


    4870:


    So 971mm could use a IHS like this one ( simulated over a GF2XX's pcb ):


    That's a completely absurd size ( and imagine the hot, price and power consuption of that... ). If the die size is 3,12cm square then the IHS could use more than 9cm for each side... which is just and simply ridiculous.

    Ok, the initial LBR samples are 45nm... but even using 32nm the IHS gonna be really large... If the 971mm^2 info is correct then Intel could need to use a 15nm integration to reduce the IHS into an acceptable size... With luck in 2015... This could explain why Intel is thinking about delaying it one year more...
    Last edited by jogshy; 06-10-2009 at 10:42 AM.

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    You could barbecue on that thing!





  11. #36
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    Hans Mosesmann - Raymond James: You didn't mention Larrabee. It was highlighted at the IDF in Beijing. Can you give us an update in terms of the timing of this product, and the wafer that was shown, or Pat showed it, it looked like the chips are pretty large. Can you give us a sense in terms of the size of the chip? Is that within expectations?

    Paul Otellini: Let me cover the second question first. Yes, the size of the product is within expectations. It's a multi-core device. What you saw on that wafer was the high-end version of it. There are obviously other versions of it that have far fewer cores for different price points. So what you saw is the extreme version, I'll put it that way.

    In terms of the product, we have for silicon, it's in debug now and we're marching towards production of that product. The silicon will get ready, or get better, over the course of the year. The software gets finished over the course of the year. I would expect volume introduction of this product to be early next year.
    That's what Intel CEO himself said.
    .

  12. #37
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    I hope Intel could deliver a 290mm^2/32nm die ... or gonna be too hot and power-angry.

    Btw... anybody know if there is any screenshot showing a Larrabee chip mounted over a PCB, pls? Or is perhaps too early for that? I found this... but was an Aprils fool :p

    Last edited by jogshy; 06-11-2009 at 01:47 PM.

  13. #38
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    Quote Originally Posted by jogshy View Post
    I hope Intel could deliver a 290mm^2/32nm die ... or gonna be too hot and power-angry.

    Btw... anybody know if there is any screenshot showing a Larrabee chip mounted over a PCB, pls? Or is perhaps too early for that?
    Size by itself doesnt make it hot and power hungry. An imaginary 900mm2 36core Atom would use ~72W with the Z series 1.6ghz or 90W at 2Ghz.
    Last edited by Shintai; 06-11-2009 at 01:51 PM.
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  14. #39
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    What kind of yields can you expect with such a die?
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  16. #41
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    Even if Larabee is only going to be 700mm^2 unless it provides somewhere around 4x GTX 285 power its pretty much an epic failure. But I think we're still going to see OEMs going with Larabees becaise intel is going to pressure them and threaten to null huge discounts on Intel cpus unless OEMs comply.
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  17. #42
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    GPUs have been specialized from day one. So I still fail to see how a bunch of CPUs bonded together (essentially isn't it just a bunch of x86 cores?) is supposed to be so great at graphics
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  18. #43
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    Quote Originally Posted by SparkyJJO View Post
    GPUs have been specialized from day one. So I still fail to see how a bunch of CPUs bonded together (essentially isn't it just a bunch of x86 cores?) is supposed to be so great at graphics
    its a hybrid of cpu and gpu, they do have some specialized hardware in there... basically the idea is to push the market to use raytracing, but since there is no raytracing infrastructure they first have to build a native raytracing cpu that can ALSO work as a gpu... thats larrabee...

    once gaming moved to raytracing, intel will then merge larrabee with their cpu series, and voila, they have it all at the cpu again, like back in the days... then there is only one chip in a pc, a cpu, and everything else is just legacy and add in stuff. its all about who controls the platform... nvidia knows this, hence they try to create their own cpu/gpu hybrid to compete with intel and amd in future.

    nvidias strength is the gpu, hence they try to move more important stuff to the gpu, away from the cpu, thats cuda...
    they want the cpu to be the less important chip that they eventually integrate, while intel sees it the other way around.

    whether itll work to emulate a gpu with a mega-core cpu... we will see... if its possible at all, intel will do it, as they have the best guys at emulating a gpu on a cpu working on this... whether nvidia can create a cpu to compete with intel and amd is a lot lot lot more questionable than intel creating a gpu that competes with nvidias gpus... but we shall see..
    Last edited by saaya; 06-11-2009 at 05:41 PM.

  19. #44
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    Quote Originally Posted by SparkyJJO View Post
    GPUs have been specialized from day one. So I still fail to see how a bunch of CPUs bonded together (essentially isn't it just a bunch of x86 cores?) is supposed to be so great at graphics
    Both the GPU and CPU have their strengths; Intel is trying to maximize that of the CPU. The thought is that by tweaking the older Pentium core, increasing float performance, and embedding them in a GPU-style architecture, they can get something of both worlds. A lot will still be done in software, which is why the extreme version is so large a die- there are a lot of cores needed to get the type of performance they want to wow people with.

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