The way memory works....
Probably the easiest, though not entirely correct but conceptually relevant, way to view this is like a striped raid array. The concept is that you can improve BW by writing segments of data in parallel (divided into stripes) across the array.
Memory works similarly, if you have one stick filling one channel, each stick gives 64-bit data transfers per transaction, and because it is double data rate, it transfers the information on the rising and falling edge of the clock, so while the physical clock (as an example) of say DDR2-800 is 400 MHz, the transaction rate is effectively 800 MHz (2x the frequency for rising and falling transfers). So at 800 Mhz, 64-bit gives you 800x64/8 = 6400 MB/sec or 6.4 GB/sec.
Now add two sticks, and "stripe" them such that data can now be transfered to both sticks concurrently (again, this is not quite correct, but conceptually ok) ... effectively, the bus width is now 128-bit so the data rate is for DDR2-800 would be 800x128/8 = 12800 MB/sec or 12.8 GB/sec (this is of course theoretical).
DDR3-1333 in single, dual and triple channel modes:
single = 1333x64/8 = 10.6 GB/sec
dual = 1333x128/8 = 21.2 GB/sec
triple = 1333x192/8 = 32 GB/sec
DDR3-2000 in single, dual, and triple would be:
single = 2000x64/8 = 16.0 GB/sec
dual = 2000 x 128/8 = 32 GB/sec
tripple = 2000x192/8 = 48 GB/sec
Lengthy, verbose explanation, but yeah .... dual channel would yield a theoretical memory data bandwidth of 32 GB/sec.
Will this be optimum? Who knows, theoretical BW is not the same as actual BW ... it depends on the quality of the memory, memory controller, and there is some BW taken up if you turn on ECC protection for the extra error correction bits.
There will be loads of information available when the products actually find their way into the hands of reviewers and enthusiast ... I can't wait! It will be interesting.
Jack
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