DFI first DDR3 motherboard, UT X48-T3R Heatsink by Thermalright

[Praz]

That speed seems to be the sweet spot for the board as for as voltages go.

[Venom-Crusher]

my result with D9JNL

[BlackDragon24]

Anyone able to get over 530 fsb stable on this board? Seems to be the wall for me so far.

[d3885u]

Is it because of limitation from the chipset or the BIOS from DFI?
Why this mobo can't pass 530 FSB like the DDR2 version...???
I'm still wondering why until right now...
Coz if I take a look at the other competitor like Asus RE could pass 600 FSB so easily...
So what's the point to make that different by very big margin I think..??

[BlackDragon24]

It is a BIOS limitation...I've seen 550+ fsb on other dfi x48 boards.

I've seen it as have many others.

There are quite a few of us over at dficlub who cannot get over 535ish fsb stable no matter what we do.

Might be time to switch boards.

[Roger_D25]

BlackDragon24 - I am in the same boat as you although you have gotten a bit further than me, best I can accomplish is 510FSB while still maintaining any stability? Like many here I've been working at it for many months and have tested each and every BIOS released so far but still can't break much over 500FSB? Although there has been much improvement since early BIOS versions but I just don't see a miracle BIOS to be released anytime soon and I'd be surprised if DFI continues to release new BIOS versions in the near future (but I could certainly be wrong). Granted 500FSB is enough for 24/7 use but I'd like to be able to push things a bit further if for no other reason than its just fun to do so! With that said I've been trying to figure out a new motherboard to switch to, even been considering going back to DDR2.

[vservera]

The cooling is supreme what are the temps in load/OC?

[Roger_D25]

Major Settings
CPU: 4050Mhz (1.250v)
RAM: 1800Mhz @ 7-7-7-18 1T (2.00v)
NB: 1.566v
SB: 1.51v
VTT: 1.210v

Idle Temps
CPU: 26C-28C
NB: 34C-41C

Load Temps
CPU: 48C-56C
NB: 45C-53C

All voltages listed above are the BIOS settings (actual voltages tend to be a bit lower at idle and the gap grows under load). I only listed a few major settings to give you an idea of what my settings are in relation to temps under idle and load. The large temperature range I've listed is because at the moment I'm under straight air cooling (stock cooling) except for CPU in which I'm running a Thermalright XP120 Extreme with lapped base. The system is setup on a test bench (not in a case) so expect somewhat higher temps if system is mounted in a case (depending on air flow through case). Feel free to ask if you have any other questions

[BlackDragon24]

Major Settings
CPU: 4050Mhz (1.250v)
RAM: 1800Mhz @ 7-7-7-18 1T (2.00v)
NB: 1.566v
SB: 1.51v
VTT: 1.210v

Idle Temps
CPU: 26C-28C
NB: 34C-41C

Load Temps
CPU: 48C-56C
NB: 45C-53C

All voltages listed above are the BIOS settings (actual voltages tend to be a bit lower at idle and the gap grows under load). I only listed a few major settings to give you an idea of what my settings are in relation to temps under idle and load. The large temperature range I've listed is because at the moment I'm under straight air cooling (stock cooling) except for CPU in which I'm running a Thermalright XP120 Extreme with lapped base. The system is setup on a test bench (not in a case) so expect somewhat higher temps if system is mounted in a case (depending on air flow through case). Feel free to ask if you have any other questions

Hey Roger sorry it took me so long to get back....if you are interested here are my settings for what is now a 24/7 stable OC. System specs in sig

CPU Feature Page
Thermal Management Control...........Enabled
PPM (EIST) Mode...........................Enabled
Limit CPUID MaxVal.........................Disabled
CIE Function.................................Auto
Virtualization Technology.................Enabled
Core Multi-Processing......................Enabled

Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss...................Disabled
O. C. Fail Retry Counter...................0
CPU Clock Ratio..............................8x
CPU N/2 Ratio................................Disabled
CPU Clock.....................................525 MHz
Boot Up Clock................................Auto
CPU Clock Amplitude.......................800mV
CPU Clock0 Skew...........................200ps
CPU Clock0 Skew............................0ps
DRAM Speed..................................400/1333
PCIE Clock....................................100MHz
PCIE Slot Config.............................1X 1X

CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled

Voltage Setting Page
CPU VID Control...............................Auto 1.2450v
CPU VID Special Add Limit..................Disabled
CPU VID Special Add.........................106.64%
DRAM Voltage Control.......................1.936V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...............................1.555V
CPU VTT Voltage..............................1.205V
VCore Droop Control..........................Enabled
Clockgen Voltage Control...................3.45V
GTL+ Buffers Strength.......................Strong
Host Slew Rate................................Strong
GTL REF Voltage Control....................Disabled
CPU GTL 1/2 REF Volt........................113
CPU GTL 0/3 REF Volt........................100
North Bridge GTL REF Volt .................100

DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing..........................Fast
T2 Dispatch....................................Disabl ed
Clock Setting Fine Delay....................Listed Below
CAS Latency Time (tCL)....................7
RAS# to CAS# Delay (tRCD)...............7
RAS# Precharge (tRP).......................7
Precharge Delay (tRAS).....................24
All Precharge to Act.........................Auto
REF to ACT Delay (tRFC)...................Auto
Performance Level............................9
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency............................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR)................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)..............Auto
Ranks Write to Write (tWRWR)............Auto
Ranks Read to Read (tRDRD)...............Auto
Ranks Write to Read (tWRRD)..............Auto
Read CAS# Precharge (tRTP)..............Auto
ALL PRE to Refresh............................Auto

Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Enabled
Channel 1 Phase 1 Pull-In.................Enabled
Channel 1 Phase 2 Pull-In.................Enabled
Channel 1 Phase 3 Pull-In.................Enabled
Channel 1 Phase 4 Pull-In.................Enabled

Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto

Clock Setting Fine Delay Page
DRAM Clk Driving Strength...................Level 3
DRAM Data Driving Strength.................Level 8
Ch1 DLL Default Skew Model................Model 6
Ch2 DLL Default Skew Model................Model 6

Fine Delay Step Degree....................5ps


Ch1 Clock Crossing Setting................Auto
DIMM 1 Clock fine delay...................Current

DIMM 2 Clock fine delay...................Current
DIMM 1 Control fine delay.................Current
DIMM 2 Control fine delay.................Current
Ch 1 Command fine delay..................Current

Ch2 Clock Crossing Setting................Auto
DIMM 3 Clock fine delay...................Current
DIMM 4 Clock fine delay...................Current
DIMM 3 Control fine delay.................Current
DIMM 4 Control fine delay.................Current
Ch 2 Command fine delay..................Current

Ch1Ch2 CommonClock Setting............Auto

Ch1 RDCAS GNT-Chip Delay...............Auto
Ch1 WRCAS GNT-Chip Delay..............Auto
Ch1 Command to CS Delay................Auto

Ch2 RDCAS GNT-Chip Delay...............Auto
Ch2 WRCAS GNT-Chip Delay..............Auto
Ch2 Command to CS Delay................Auto

Common CMD to CS Timing................1N

[Roger_D25]

First of all great job getting your system stable on this board with those settings (I'm sure it was no easy task)! I'm especially impressed with that FSB speed and the fact your running the 400/1333 divider, that can be a very tricky setup to even boot on so getting it stable is awesome! Add to that your running a 2 x 2GB kit of DDR3 makes it every more impressive! With that all said thanks for posting all those settings, I realize its not quick or easy to copy down all those settings and I'm sure many people will benefit from them. I'm sorry if I have already asked you (I looked back a few pages and couldn't find it) but do you know what IC's are on your OCZ Reapers? Praz did some great work on his 2 x 2GB kit but I couldn't get anywhere with my 4GB kit (running D9GTS). I have a feeling that I need to work with getting the Drive Strenths and DLL Skew Models correct before I'm able to push my 4GB kit to decent clockspeed (heck I can't even get them working at default clockspeeds and timings)! Thankfully my 2GB kit of STT Project X runs very strong at low voltage! Well thanks again man for all your help!

[BlackDragon24]

Thanks!

It was no problem at all to post the settings....I had already done it here.

http://csd.dficlub.org/forum/showthread.php?t=8054

It's kinda like a diary OC thread...check it out if you wanna go thru the trials and tribulations....what is interesting in my case is that the 400/1600 seems to be a lot harder to stabilize. Unfortunately I don't know the IC type on my reapers...any way to find out without ripping the heat spreaders off?

[BlackDragon24]

Ok couple of updates...been working on tuning the 400/1600 divider and it has been to say the least, a challenge. But its looking good.

CPU Feature Page
Thermal Management Control................Disabled
PPM (EIST) Mode...........................Disabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Disabled
Virtualization Technology.................Disabled
Core Multi-Processing.....................Enabled

Main BIOS Page
Exit Setup Shutdown.......................Mode 2
Shutdown After AC Loss....................Disabled
O. C. Fail Retry Counter..................0
CPU Clock Ratio...........................9.5x
CPU N/2 Ratio.............................Enabled
CPU Clock.................................450 MHz
Boot Up Clock.............................Auto
CPU Clock Amplitude.......................800mV
CPU Clock0 Skew...........................0ps
CPU Clock0 Skew...........................0ps
DRAM Speed................................400/1600
PCIE Clock................................100MHz
PCIE Slot Config..........................1X 1X

CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled

Voltage Setting Page
CPU VID Control...........................1.300v
CPU VID Special Add Limit.................Disable
CPU VID Special Add.......................Auto
DRAM Voltage Control......................1.936V
SB Core/CPU PLL Voltage...................1.640V
NB Core Voltage...........................1.579V
CPU VTT Voltage...........................1.210V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Strong
GTL REF Voltage Control...................Enabled
CPU GTL 1/2 REF Volt......................113
CPU GTL 0/3 REF Volt......................105
North Bridge GTL REF Volt ................105

DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Disabled
Clock Setting Fine Delay..................Listed Below
CAS Latency Time (tCL)....................8
RAS# to CAS# Delay (tRCD).................8
RAS# Precharge (tRP)......................8
Precharge Delay (tRAS)....................27
All Precharge to Act......................Auto
REF to ACT Delay (tRFC)...................Auto
Performance Level.........................7
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR).................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)...............Auto
Ranks Write to Write (tWRWR)..............Auto
Ranks Read to Read (tRDRD)................Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................Auto
ALL PRE to Refresh........................Auto

Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto

Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto

Clock Setting Fine Delay Page
DRAM Clk Driving Strength.................Level 4
DRAM Data Driving Strength................Level 6
Ch1 DLL Default Skew Model................Model 7
Ch2 DLL Default Skew Model................Model 7

Fine Delay Step Degree....................5ps


Ch1 Clock Crossing Setting................More Aggressive
DIMM 1 Clock fine delay...................Current
DIMM 2 Clock fine delay...................Current
DIMM 1 Control fine delay.................Current
DIMM 2 Control fine delay.................Current
Ch 1 Command fine delay...................Current

Ch2 Clock Crossing Setting................More Aggressive
DIMM 3 Clock fine delay...................Current
DIMM 4 Clock fine delay...................Current
DIMM 3 Control fine delay.................Current
DIMM 4 Control fine delay.................Current
Ch 2 Command fine delay...................Current

Ch1Ch2 CommonClock Setting................More Aggressive

Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto

Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto

Common CMD to CS Timing...................1N

She's also 6 hours orthos stable...now onwards and upwards to 475fsb and ddr3 1900 :P

[Praz]

DFI LP UT X48-T3R, 09/23 BIOS
540x8, Memory 1800MHz
E8600
2x1GB OCZ nVidia SLI PC3-16000 2000MHz 9-9-9-30
SAPPHIRE 4870
Yellow Slots Used For Memory

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CPU Feature Page
Thermal Management Control................Enabled
PPM (EIST) Mode...........................Enabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Auto
Execute Disable Bit.......................Enabled
Virtualization Technology.................Enabled
Core Multi-Processing.....................Enabled

Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown after AC loss....................Disabled
O.C. Fail Retry Counter...................0
CPU Clock Ratio........................... 8 X
CPU N/2 Ratio.............................Disabled
CPU Clock.................................540 MHz
Boot Up Clock.............................Auto
CPU Clock Amplitude.......................900mV
CPU Clock0 Skew...........................200ps
CPU Clock0 Skew...........................  0ps
DRAM Speed................................400/1333
PCIE Clock................................100MHz
PCIE Slot Config..........................1X 1X

Voltage Setting Page 
CPU VID Control...........................1.3125V
CPU VID Special Add Limit.................Enabled
CPU VID Special Add.......................Auto
DRAM Voltage Control......................1.903V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...........................1.630V
CPU VTT Voltage...........................1.330V
VCore Droop Control.......................Disabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Strong
MCH RON Offset Value......................00
MCH RTT Offset Value......................00
MCH Slew Rate Offset Value................00
MCH VREF 1 Value..........................00
MCH VREF 2 Value..........................00
MCH VREF 3 Value..........................80
GTL REF Voltage Control...................Enabled
CPU GTL 1/2 REF Volt...................... 88
CPU GTL 1/3 REF Volt...................... 88
North Bridge GTL REF Volt ................ 45

DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Disabled
Clock Setting Fine Delay..................Listed Below

CAS Latency Time (tCL)....................8
RAS# to CAS# Delay (tRCD).................8
RAS# Precharge (tRP)......................8
Precharge Delay (tRAS)....................24
All Precharge to Act......................9
REF to ACT Delay (tRFC)...................60
Performance Level.........................9
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................18
Rank Write to Read (tWTR).................19
ACT to ACT Delay (tRRD)...................10
Read to Write Delay (tRDWR)...............9
Ranks Write to Write (tWRWR)..............Auto
Ranks Read to Read (tRDRD)................Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................5
ALL PRE to Refresh........................9

Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto

Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto

Clock Setting Fine Delay Page
DRAM CLK Driving Strength.................Level 5
DRAM Data Driving Strength................Level 8
Ch1 DLL Default Skew Model................Model 0
Ch2 DLL Default Skew Model................Model 0

Fine Delay Step Degree....................5ps


Ch1 Clock Crossing Setting................Auto
DIMM 1 Clock fine delay...................Current  489ps
DIMM 2 Clock fine delay...................Current  489ps
DIMM 1 Control fine delay.................Current  434ps
DIMM 2 Control fine delay.................Current  473ps
Ch 1 Command fine delay...................Current  182ps

Ch2 Clock Crossing Setting................Auto
DIMM 3 Clock fine delay...................Current  686ps
DIMM 4 Clock fine delay...................Current  686ps
DIMM 3 Control fine delay.................Current  607ps
DIMM 4 Control fine delay.................Current  654ps
Ch 2 Command fine delay...................Current  371ps

Ch1Ch2 CommonClock Setting................Auto

Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto

Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto

Common CMD to CS Timing...................  1N

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[Praz]

XP SP3


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3dx Max w/V-ray
Time to render: 13min 03sec

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[Praz]

Vista 64 Bit SP1


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3dx Max w/V-ray
Time to render: 14min 08sec

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