Real Temp - New temp program for Intel Core processors

[rge]

so your IR thermometer is/was correct from the start and the thermocouple is not actually needed? Interesting! Am I correct in guessing that the Tcase to Tjunction gradient is increasing as the junction temperature rises from 40C --> 90C?

For example:
Tcase temp: 30 40 45 50 55 60 65 70 74
Tjunct temp: 31 42 50 58 66 76 84 95 100
Gradient ~: .01...2...5...8..11.16.19..25.27

Is this a close scale?

yes, assuming full load, stock cooler, stock vcore, stock clock, exact intel loading program, and reasonable ambients. Intel states under those conditions, throttling is set to occur (tjmax reached) just as tcase is exceeded. Also depending on type loading program that gradient can vary significantly even at same temp, which is why intel goes on to say in docs that the relationship is not guaranteed.

And of course if you cheat and remove cooler to get temps that high at idle, then relationship no longer true and tcase = tjmax - 5C. When overclocking and different cooling, I am sure significant gradient exists...but likely different in some ways...just dont know how much.

Also in your other post, under Temp #1 you switched temps on cpu and junction, also my cpu temp reads 2-3 too low at idle temps, and I think you meant to say Tjunction/cpu gradient instead of Tcase/cpu gradient at end of each...but thanks for summarizing, saved me some typing

[Dua|ist]

It's me again with yet another insane idea.
First of all : rge, you rock!
Now back to the idea. As we know Intel might mean different things with their new Target TJ value. It seems obvious that those 70C & 80C for 65nm mean something different than 95-100C for 45nm despite being given the same name. But, as rge has proved, at DTS=0 we are supposed to get IHS temps very close or equal to those listed in thermal specification (72-74C for 45nm CPUs). But personally I cannot believe in a gradient of 27C (or maybe even more, as it will most likely increase with higher temps) between core temps and IHS. The previous P4 testing is a good proof to that. On a 65nm CPU this gradient would've been much lesser and much more reasonable, should we decide to use Intel's TJ Target value of 70C for B2 or 80C for G0 (15-20C offset from guessed TJmax used earlier) and IHS values taken from processorfinder of 60.1C and 72C respectively. So maybe these new "official" numbers for 65nm aren't that wrong? Thermal specification for 45nm is very close to that of 65nm G0 stepping (72-74 vs 72). If we (hypothetically) assume TJmax=80C (same 20C offset) for 45nm CPUs then we'd see only 7C gradient in rge's testing and 6-8C gradient at DTS=0 according to Intel's specs (72-74 IHS temps and this hypothetical 80C Tjmax). The abnormally low core temperatures in this case at idle & medium load could be explained by sensors' inaccuracy (slope error) while high load core temps would be more accurate & close to IHS temps.

Sorry for my English, I'm not sure I expressed everything the way I meant to.

[rge]

It's me again with yet another insane idea.
First of all : rge, you rock!
Now back to the idea. As we know Intel might mean different things with their new Target TJ value. It seems obvious that those 70C & 80C for 65nm mean something different than 95-100C for 45nm despite being given the same name. But, as rge has proved, at DTS=0 we are supposed to get IHS temps very close or equal to those listed in thermal specification (72-74C for 45nm CPUs). But personally I cannot believe in a gradient of 27C (or maybe even more, as it will most likely increase with higher temps) between core temps and IHS. The previous P4 testing is a good proof to that. On a 65nm CPU this gradient would've been much lesser and much more reasonable, should we decide to use Intel's TJ Target value of 70C for B2 or 80C for G0 (15-20C offset from guessed TJmax used earlier) and IHS values taken from processorfinder of 60.1C and 72C respectively. So maybe these new "official" numbers for 65nm aren't that wrong? Thermal specification for 45nm is very close to that of 65nm G0 stepping (72-74 vs 72). If we (hypothetically) assume TJmax=80C (same 20C offset) for 45nm CPUs then we'd see only 7C gradient in rge's testing and 6-8C gradient at DTS=0 according to Intel's specs (72-74 IHS temps and this hypothetical 80C Tjmax). The abnormally low core temperatures in this case at idle & medium load could be explained by sensors' inaccuracy (slope error) while high load core temps would be more accurate & close to IHS temps.

Sorry for my English, I'm not sure I expressed everything the way I meant to.

I am now positive there is a 27C gradient from tcasemax to tjmax at full load (high TDP), measuring at true IHS versus core. Note this has nothing to do with the small few C gradient from DTS die temps to cpu diode (between cores still in die with very high thermal conductance). But to see this gradient from IHS to core temps you have to be at full load (high TDP) with a heatsink. A large gradient was duplicated at university testing better than mine on Pentium northwood.

If I remove heatsink, at idle, low volts, (LOW TDP) when tjmax of 100C is reached IHS thermocouple reads 95C, because there is no load (minimal TDP) to drive a gradient, so no gradient exists other than minimal across tim1.

Putting heatsink on to cool IHS, placing a load to drive the gradient and the higher the TDP, the higher the gradient given same type of load and other parameters, and you can measure a 27C gradient from IHS to core temp at max TDP. The P4 has same gradient if you test with heatsink on...I tested with heatsink off.

Intel states even in recent slide presentation
"DTS calibration point adjusted higher than target TJUNCTION
– Minimizes potential for PROCHOT# activation below TCASEMAX"

So intel cpu under stock conditions, under max TDP load is designed for throttling DTS=0 at just above tcasemax....to self protect cpu, assuming you do not cheat and raise temps at low TDP by removing heatsink.

If you use tjmax 80 for E8400, than you would have trouble explaining why when IHS temp reads 94C, distance to tjmax is 1 and it is not throttling.... so it is not possible for E8400 tjmax to be less than 95C, nor is it possible to have 100 tjmax with more than 1C DTS sensor offset (effectively same thing as lowering tjmax). Given 4-5C gradient at idle, it has to be 99 to 100C.

[Dua|ist]

Intel states even in recent slide presentation
"DTS calibration point adjusted higher than target TJUNCTION
– Minimizes potential for PROCHOT# activation below TCASEMAX"

So intel cpu under stock conditions, under max TDP load is designed for throttling DTS=0 at just above tcasemax....to self protect cpu, assuming you do not cheat and raise temps at low TDP by removing heatsink.

That's true.
Then maybe DTS data depends on TDP too? And DTS reports accurate temps only when testing with a cooler, not without & undervolted, underclocked? In that case I would still like TJtarget = 80C.

Under stock conditions we're supposed to get TCasemax at target TJunction (DTS=0). Your testing proved that. At DTS=0 it starts throttling and tries to keep the temperature at or below target TJunction (and TCasemax, since they're equal at stock conditions).
Some Intel datasheet (found the quote here) says:
"...In the event of a catastrophic cooling failure, the processor will
automatically shut down when the silicon has reached a
temperature approximately 20 °C above the maximum TC..." Or above target TJunction which is the same.
Once again those 20C...

What if:
- PROCHOT# is triggered at TJtarget which as we know is DTS=0 (throttling starts)
- THERMTRIP# is triggered at TJmax which is... DTS=-20 and the absolute maximum temp (CPU shuts itself down)
- the 100C value for 45nm processors in the August pdf is the TJmax value (it was even called so at that time), and not the TJtarget
- the 80C value for G0 65nm processors (with same TCasemax temps as for 45nm ones!) is the TJtarget value and TJmax is the same 80+20=100C but occuring not at DTS=0 but at DTS=-20
- the target TJunction in October pdf means a) a "real" TJtarget for 65nm CPUs b) the good old yet misunderstood TJmax for 45nm CPUs (while "real" TJtarget being the same 80C). Maybe they didn't dare to change it since they already published 100C before in August (then why not use TJmax for other CPUs? - still a mystery)

For me it's the only way of explaining why Target TJunction values for 65nm and 45nm processors differ so much when their TCasemax temps are equal.

P. S. It's only my version. You guys must know much more than I do, so please forgive me this nonsense I wrote.

[rge]

The temp sensor is going to function and report temps the same whether heat sink is on or off, TDP will not affect DTS functioning. My E8400 shuts off at around 115-118C tcase, it throttles at 95C tcase...so again not possible for tj 80C on e8400.

If you are having trouble believing 28C gradients exist over such a small space...read this research paper of pentium northwood....look at slide 22. Gradients exist that high on E8400 as well, but primarily because of more optimal sensor placement of die sensors and diode sensors and copper banding in silicon die, die shrinkage, etc the gradient will not be seen from dts to cpu diode, but from those two diodes to IHS.
http://www.ee.ucr.edu/~stan/papers/todaes07_softsen.pdf

[rge]

LINKS TO YOUTUBE VIDEOS BELOW SHOWING GRADIENTS

According to intel Tcase formula
Tjmax-Tcasemax gradient = theta(jt)*TDP
The higher the TDP the higher the gradient from Tj to Tcase. TDP is primarily dependent on load but also voltage, however core temps in themselves dont alter the gradient...just that under normal circumstance temps are only high at high loads. See formula in pic below.
Though you will never see this gradient, unless you measure tcase with thermocouple...as gradient from core to cpu temp is not more than 5C.

At 1V, IDLE ie LOW TDP, 2x266, there is a 5C gradient from tjmax to tcase whether temp is 60C or up to 100 C (no heatsink). ie, at 100C core IHS = 95C... or at 50C core IHS=45c, etc. (at lower core temps gradient is still 5C, but reads 10C from DTS reading 5C too high in idle range)

At 1.25v, IDLE, 9x333, there is a 7C gradient from tjmax to tcase regardless of temp, 60C to 100C, (slightly higher TDP as higher vcore)
ie at 100C tjunction IHS=93...or at 50C tjunction, IHS=43C, etc (at lower temps gradient still 7C reads higher from inaccurate DTS in low range)

At 1.4v, idle 9x333, there is a gradient from tjmax to tcase of ~10C from 60C to 100C (again higher idle TDP from higher vcore)
ie at 100C tjunction, tcase is 90-91, etc

Stock cooler, stock 9x333, 1.25 vcore
idle, gradient core to IHS = 6-7C
orthos load 14-16C
linpack load 22-24C

load at higher volts increases gradient, better cooling decreases gradient.

Video 1 demonstrates high temps with low TDP (IDLE) using 1.37 vcore (so temps would get higher) illustrates still only 9-10C whether temps are in low range or high range...only showed high range, point being gradient is TDP dependent, not temp dependent.
http://www.youtube.com/user/rge42

Video 2 demonstrates first intel cooler w/box fan, stock vcore 1.2, stock 9x333, idle (low) TDP, with 6-7C gradient (gradient reads 1-2C too high as 1-2C DTS error in that range. Then linpack load demonstrating 22-23C core to IHS gradient, then slightly higher gradient as decrease fan speed and lessen cooling ability.
http://www.youtube.com/watch?v=q7ua2FFByfI

I am done with testing for awhile...2:30 am...need to sleep. If anyone wants to duplicate experiment, just get thermocouple calibrated for surface temps (calibrated 4C higher per eng i borrowed from). drill small notch dead center in IHS very shallow depth to just seat tip of thermocouple, put small amount of thermal grease on tip...but to use second method to guage temps, mine were within 1C of IR temps, I duplicated approximate depth for tcase measurement per intel...though the notch did not alter temps but maybe .5 to 1C, it did however make them very reproducible within 1-2C.

[IanB]

This is all very interesting theoretical stuff, but I'm not seeing what relevance it has to making RealTemp, which only reads the DTS info from the chip and doesn't read temps at all, more accurate in reporting the actual chip temperature. Other than at low-end calibration, how does any of this information or speculation help? Is it changing the top point of the graph in any meaningful way?

I thought the only practical value of note was the TjMax one, which is what RealTemp uses to convert the DTS to a temp reading. How is Tcase or anything else useful? Once I've put a heatsink on my chip, I don't give a flying f* what temperature the IHS or the heatsink is at, as long as it's keeping the processor cool...

I'm just wondering how this information will help us get a better value for TjMax? Short of us all drilling holes in our CPUs to calibrate each one accurately, I thought we were all stuck with the +/-20 degree inaccuracy inherent in these sensors and in the original per-chip Intel calibration. To a casual onlooker, it seems we are pretty much back to square one right now, to what unclewebb was saying about a year ago in threads here, that the only useful info is the DTS reported distance from TjMax and that as long as you're not throttling you shouldn't really care too much.

[rge]

Kevin (Unclewebb) had asked me if I could find a way to measure the IHS temp via a thermocouple for the purpose of gradients and resting idle temps, which is useful to determine idle temp calibration as well as trying to figure out tjunction diff between 65nm and 45nm, hence get accurate load temps as well. Also understanding the gradients helps with understanding Tcase specs. If all you are interested in is distance to tjmax, then yes this information is useless. But if it upsets you in some way for those of us interested in absolute temps, why not just ignore it, instead of needing to post you dont give a "flying f" about it?

[jaredpace]

I thought the only practical value of note was the TjMax one, which is what RealTemp uses to convert the DTS to a temp reading. How is Tcase or anything else useful?

Well Intel lets you know that you can't get the chip hotter than ~ 73C Tcase, but the software only measures DTS (Tjunction). The purpose is to find the exact relationship between Tcase and Tjunction (the gradient).

You know you can't run your E8xxx/E7xxx hotter than Tjunction = 100C, but how do you know your Tcase temperature at that point?

This is the reason for measuring the temperature on the IHS.

[jaredpace]

LINKS TO YOUTUBE VIDEOS BELOW SHOWING GRADIENTS

intel cooler w/box fan, stock vcore 1.2, stock 9x333, idle (low) TDP, with 6-7C gradient (gradient reads 1-2C too high as 1-2C DTS error in that range. Then linpack load demonstrating 22-23C core to IHS gradient, then slightly higher gradient as decrease fan speed and lessen cooling ability.
http://www.youtube.com/watch?v=q7ua2FFByfI

What happens to IHS temp if you leave the linpack testing going for about 15 mins? does it catch up to the Realtemp temps displayed on the screen?

Sweet testing Rge!!

[rge]

What happens to IHS temp if you leave the linpack testing going for about 15 mins? does it catch up to the Realtemp temps displayed on the screen?

Sweet testing Rge!!

Thanks...IHS temp has a few seconds lag for heating up since it is being cooled, but the gradient then stays constant ~20-24C (expect when linpack drops off between intermittent loads). If you watch as IHS is climbing after initial several seconds of equilibration.. .1, .2 as soon as it gets 1C hotter, realtemp core gets 1C hotter...so if temps start out tcase 55, core 77...when tcase gradually increases to a steady state, case temp was 65 and core 87 with fan on medium. I have several hours of testing and couple hours of video ...most would make you puke to watch from motion sickness....had to learn how to video. Also I turned fan speed down at end to show gradient increases couple degrees with worse cooling.

[Dua|ist]

Yes, thanks rge. Your testing is detailed and useful as always. The info on Northwood temp calculations was also very educational.
I must admit you beat me. But then we just have to admit that Target TJ values for 65nm are plain wrong... Or Intel means something else with these new numbers.

P.S. The thermal specification formula is quite interesting too. It could explain why newer steppings have higher TCasemax temps (relative to their TJunction temps). If the psi (or theta?) value is a constant, then due to lower power consumption (TDP) of the new stepping we get less difference (gradient) between TCasemax & TJunction. This makes me think that TCasemax might be some kind of "secondary" value, calculated (or measured) based on TJunction temperatures, as it isn't a whole number.

[jaredpace]

So, in conclusion, the maximum core temperatures for C0 and E0 E8xxx series chips is......

[rge]

Yes, thanks rge. Your testing is detailed and useful as always. The info on Northwood temp calculations was also very educational.
I must admit you beat me. But then we just have to admit that Target TJ values for 65nm are plain wrong... Or Intel means something else with these new numbers.

P.S. The thermal specification formula is quite interesting too. It could explain why newer steppings have higher TCasemax temps (relative to their TJunction temps). If the psi (or theta?) value is a constant, then due to lower power consumption (TDP) of the new stepping we get less difference (gradient) between TCasemax & TJunction. This makes me think that TCasemax might be some kind of "secondary" value, calculated (or measured) based on TJunction temperatures, as it isn't a whole number.

Well actually it was yours and others questioning that got me to do the videos and more testing, which I learned something from....so thank you. Also I think vids are helpful in that unless you see it yourself you always wonder.

Jaredpace...the max gradient you will likely encounter is 26C, intel tests this under worst case conditions with stock cooling, hence if you stay 26C from tjmax, you are likely always within tcase spec (if you overclock with stock cooler you increase it, but offset it by better cooling). Once you are less than 26C from tjmax, you may or may not be in spec, depending on the loading program, hence intel states the gradient is variable and can not be used to predict tcase. But as Unclewebb has pointed out, under those situations where you are pushing the limits, to get stability you will probably need to maintain such a distance from tjmax anyways. Another way to look at it if your core is 74C...you know your Tcase is significantly lower...and at that point the rule of every 10-15C you drop your temp, you double life of your component becomes more important especially when overclocking with high voltage.

One interesting side note from all the testing, I am now sure of 6-7C (can not be more than 8 or less than 5) over ambient for high end water or air cooling at low volts, idle, speedstep on or 6x333. I can set cpu temp to exactly track IHS reading as long as I stay at idle, same tdp. No question the IHS is 3C over ambient on water and 6C over ambient with intel stock cooling. The gradient from core to IHS is max 5C at those conditions, but I am convinced it drops by 20% with intel heatsink on and high box fan speed, and more with high end cooling (max 50% decrease) . It would not surprise me if the entire gradient were halved comparing water to intel stock cooling where core is ~10-12C above ambient at those conditions with stock cooling.

[unclewebb]

Thanks rge. I've run out of thumbs up for all of your testing. It helps everyone understand the gradients that exist and goes further than my testing that was always done at idle without a heatsink installed.

I still read in forums about users running Prime95 with reported core temperatures of ~60C but their heatsinks don't even feel warm. Now we know why. The heat dissipates rapidly from the source when a heatsink is installed.

It confirms TjMax=100C is correct for the E8400 and that the RealTemp calibration method at low MHz / low core voltage, is valid for users that want more accurate core temperatures. It might need to be adjusted by a degree or two based on your recent testing so could you create a small chart showing what temperatures a user should aim for when calibrating? Intel OEM, aftermarket air and water. I might have some fun with my drill this week to see what I can learn.

[jaredpace]

I'm thinking about getting an e8400 and running it at greater than 1.45v-1.50v actual and/or higher than 80C load. Just to see what will happen, since I really haven't heard of anyone doing this and reporting back. I have a feeling it will just degrade the cpu over time making it require more volts to achieve the same megahertz, while producing more heat in the process. But in the meantime, I could probably run 4.8ghz 24/7!

[rge]

Thanks rge. I've run out of thumbs up for all of your testing. It helps everyone understand the gradients that exist and goes further than my testing that was always done at idle without a heatsink installed.

I still read in forums about users running Prime95 with reported core temperatures of ~60C but their heatsinks don't even feel warm. Now we know why. The heat dissipates rapidly from the source when a heatsink is installed.

It confirms TjMax=100C is correct for the E8400 and that the RealTemp calibration method at low MHz / low core voltage, is valid for users that want more accurate core temperatures. It might need to be adjusted by a degree or two based on your recent testing so could you create a small chart showing what temperatures a user should aim for when calibrating? Intel OEM, aftermarket air and water. I might have some fun with my drill this week to see what I can learn.

Thanks, I enjoyed all the testing as I know you do...great educational hobby. As for calibrating idle temps, after all my testing I was looking for a reference and saw one of your old posts that already correctly estimate idle temps for high end cooling.. But I can list what I found for water, zalman, and intel stock.

Interestingly, the gradient with intel stock cooler at low volts idle is ~10-11C. If you then turn a box fan on high (15inch fan at high rpms).. you lower temps and drop gradient 2C, more effective cooling compresses temp range and corresponding gradient becomes smaller...that is not exactly the way I imagined gradients before testing. And yep the gradient to the heatsink is huge.

To calibrate idle temps for core 2 duo: First set vcore 1.1V bios +/-~.03v and 6x333 mhz manually or leave speedstep enabled. Then set idle so it reads listed degrees above ambient for given cooling:

COOLING...............................IDLE DEGREES ABOVE AMBIENT
High end water...............................6C above ambient
High end air (true push/pull) ........6-7C
High end air (1fan).........................7C
Mid air (zalman 9500)....................8-9C depending on fan rpm
Intel stock cooler...........................10-11C

Need to use listed volts for calibrating, increasing volts significantly will widen the gap between better and worse cooling and alter the gradients.

Edit: I will have to leave quad estimating to you, i dont have one.

[unclewebb]

rge: Your testing confirms what I was thinking during some informal testing I did a couple of days ago.
#2395

I'm suspicious that my assumption that a well air cooled Core 2 Duo should run about 5C hotter than ambient at low MHz and low voltage might be too conservative. Maybe our calibration method at low volts / low MHz should be based on 10C.

Looks like the truth is somewhere in between. Your chart will provide users with a baseline when calibrating no matter what type of cooling they're using and I will include this info in the updated documentation with a link to what's been learned during testing.

For a Quad like my Q6600 - G0, I think I would add 2C to your numbers. Time for some more testing.

I've just started comparing power consumption to core temperatures which might help users with calibrating and checking for sticking sensors. Now that we have a baseline it will be easier coming up with answers about Quads, etc. based on power consumption.

By adjusting Clock Modulation in MSR 0x19A, you can also create a nice graph comparing core temperatures at different power levels while running a consistent stress program like Prime95 small FFTs. I'll include this option in the next RealTemp for testing purposes.

Anyone interested in checking this out can use my MSR program to set model specific register 0x19A like this for each core:

12.5% -> 0x12
25.0% -> 0x14
37.5% -> 0x16
50.0% -> 0x18
62.5% -> 0x1A
75.0% -> 0x1C
87.5% -> 0x1E

To return your processor to full power set MSR 0x19A to 0x02

The percentages aren't exact but if you step through different power levels while running Prime you should see your core temps go through different steps. If the temps don't change equally between cores then I think this new test should help confirm sticking sensor issues or maybe even slope error issues. It's a work in progress.

[randomizer]

E6600 @ 2.7GHz



Core #0 was occasionally slower at changing temp than Core #1, but was always within 1C. Temps reported using RealTemp 2.79.8

EDIT: I suppose I should say what I used for loading the CPU Prime95 small FFTs.

[IanB]

If all you are interested in is distance to tjmax, then yes this information is useless. But if it upsets you in some way for those of us interested in absolute temps, why not just ignore it, instead of needing to post you dont give a "flying f" about it?

I didn't disparage your testing in any way, if you actually read what I wrote. I said I don't care what IHS temps are as long as the heatsink is working and keeping the processor inside acceptably cool, which is surely the situation for most of us. Thank you for twisting my words.

And have you never heard the phrase "devil's advocate"? I was asking what most casual readers will be wondering after that theoretical jargon and testing, which is how does it help improve our understanding of temps reported by the DTS, which is what this thread IS about (ie. RealTemp). If it improves the calibration possibilities, then explain how. It was a simple enough question. Now it seems to have been answered.

Now, the question is, can this be incorporated into Realtemp to make calibration even easier and foolproof for most users? For example, consider a calibration "wizard" that would check the processor is idling as specified, confirm the cooling spec and ask for an ambient temperature to be entered... and presto the setting is done without editing INI files and requiring user hunches (assuming sticky sensors are not detected). That's a practical result from this which is an achievable goal.

[rge]

Ian, did not mean to misconstrue your words, miscommunication happens all time on net as cant decipher tone, I meant no offense and none taken. Goal is to understand the slope error, idle temp range, and gradient from IHS to core to get accurate temps across the range, and I think it is very possible to do. And as Unclewebb stated, the same info will need to be applied to Nehalem as intel states the errors are still there just to a lesser degree. Also it is especially important for 65nm, since intel has not released the large offsets needed to be added to tj target to calculate accurate 65nm temps

Unclewebb...like the power consumption graph...will have to play around with that

I just got my E8600 10 mins ago, even if upgrading to nehalem in 4-6 months or sooner, I want a good backup computer, and my E8400 has had too much abuse.

My last test on E8400 will be drill rest way through to core,...so may be down few days. Only problem, I will have to recalibrate for surface reading since I cant drill a hole in core to put thermocouple tip in, like I did with IHS (at least wont try that until all other testing)...but I can get exact absolute gradient by apples to apples comparison from thermocouple coated in thermal paste touching flat core vs flat IHS, as the small error is constant. I can calibrate that error exactly with IR (just few C) and and then read absolute temps by subtracting known small error.

[pifive]

OK Uncleweb I need some clarification.

After Intel releases the TJ max of their processors I currently have a Q6600 what is the correct TJ Max that I have to set in RealTemp.? BTW I am using the Beta version.

Right now since I saw 90 thats what I set the TJ Max. my temps currently are 30 29 27 30 with ambient of 20.5 C. IS that correct? Did I made the correct change from 100 tj max to 90?

Ill appreciate clarification I really like RealTemp tool over Speedfan, Coretemp etc.

Thanks

[unclewebb]

pifive: There are two different versions of the Q6600:

Stepping B3 - CPUID 0x6F7 - TjMax = 90C
Stepping G0 - CPUID 0x6FB - TjMax = 100C

A program like CPU-z will show you what stepping you have and RealTemp will show you one of those two CPUIDs.

At the recent IDF, Intel has said that the TJ Target for these processors is 80C and 90C. To be honest, I'm not quite sure what that means or the relationship to TjMax.

My opinion is that for accurate core temperatures, you need to use a +10C offset from this Intel spec so the latest beta of RealTemp is still using 90C and 100C. Click on the Defaults button in the RealTemp Settings window and it will show you what your default TjMax is. Your reported temps look realistic to me but you would need to give me a lot more details about your case and cooling used and MHz and core voltage and........ Try doing the RealTemp calibration procedure as outlined in the docs.

IanB: Automatic calibration would be a wonderful thing but I don't think it's possible. There are just too many unknowns starting with the latest curve ball Intel threw at us at the recent IDF. I haven't quite figured out what TJ Target really means and I probably never will. Then there are sticking sensors, slope error and Intel calibration error at TjMax, both of unknown magnitudes, and etc., etc.

By the time I get an accurate Automatic Calibration feature finished, they'll be retiring Core i7.

randomizer: Nice graph. Maybe automatic calibration isn't as far off as I thought. It's pretty easy to see what your idle temps are going to be at the next step when load is 0%.

[randomizer]

It's pretty easy to see what your idle temps are going to be at the next step when load is 0%.

Scary thought isn't it? I believe I was hovering around 53C before I ran prime95

[unclewebb]

randomizer: What I found during testing is that if you leave MSR 0x19A set to 0x12 and then stop Prime95 your temps will drop down one more step and then while idle if you set MSR 0x19A back to the default 0x02, your temps will drop another degree or two. I think it lets your processor go into a slightly lower power state but don't quote me on that. With my Kill-a-Watt meter plugged in, power consumption drops a couple of watts.

Your graph shows that your sensors are working fine and aren't sticking. There's no way my E6400 - B2 is TjMax=70C like Intel has recommended but for your E6600, it looks possible. Did you ever do the low MHz / low voltage test? I'll go look back a few pages. I'd try TjMax = 70C or 75C and see how things look during this test. Now that rge has cleared up what the low end should look like and Intel has given us some guidance on what TjMax might be, maybe you can finally make some sense out of your sensors.

How do you like the ability to manipulate the power level your CPU is running at? Prime95 small FFTs is my fav for keeping the power level consistent. Anyone with sticking sensors that plots a graph like you did will end up with the lower part of the graph going horizontal but yours looks good. I plan to add power level adjustment into RealTemp for testing in the near future and then maybe have it test automatically and draw a nice graph like you showed us sometime in the future.