Real Temp - New temp program for Intel Core processors

[WaterFlex]

What about Xeon 3110?

[rge]

What about Xeon 3110?

95C, slide on post 2374

funny if you have a xeon 3110 you get a sensible tjmax...intel wont screw with cpu meant for business owners

[WaterFlex]

rge
Thank you!

[Brama]

95C, slide on post 2374

funny if you have a xeon 3110 you get a sensible tjmax...intel wont screw with cpu meant for business owners

My 3110 is accurate at Tjmax +- 1 C°.

I tested it with a big overclock, using PROCHOT signal to understand where Tjmax is located in C° scale, using RealTemp to monitor it.

[unclewebb]

funny if you have a xeon 3110 you get a sensible tjmax...intel wont screw with cpu meant for business owners

I noticed that same coincidence. The Xeon E3110 and the E8400 look like twins on paper with the only real difference being the box, the etching on the IHS and of course the price tag. Maybe I should head to EBay and find an E3110 to see how it compares when under the IR gun. I'm guessing that they would be exactly the same even though their TJ Targets are 100C for the E8400 and 95C for the E3110. Maybe after the August IDF, the lawyers got loose and had to craft a new term, "Target TJ", to cover their butts.

Here are a couple of my favorite quotes from the October IDF:

"– It may not be possible to use software to identify exactly which
device is installed in the system"

"– Consequently, software may not be able to determine the
appropriate Tj for each part"

Translation:
Q: What is TjMax?
A:

[rge]

Yeah, would be funny if IR reads 95C at DTS=0 on E3110, or anything different than 5C.

I am once again confused with the gradient from core to Tcase (IR) with heatsink off... is it 1C, 2, 3, 4 or 5C at idle, underclocked. It is known 3C on a Northwood at stock idle with thermal paste for TIM1 and heatsink on...and removing heatsink doubles gradient by increasing resistance if using cpu with thermal paste as tim1.

But solder attach on E8400 has 10x less resistance than the thermal paste tim of northwood not to mention one would also think any increase in thermal resistance from removing the heatsink would be blunted b/c solder attach of IHS. Too many variables to guess. Mathematically still comes out to 1-2C using intels theoretical formula (heatsink on) but whether we would see that as 1-2C or 1-4C (plus/minus measurement error) with heatsink off (increased resistance)...who knows.

Regardless, using IR based tjmaxes accurate within a few C of gradient/measurement error are going to be a helluva lot more accurate than intels tj target plus or minus 20C offset, plus or minus 5-10C sensor error, plus or minus slope error.

[rge]

about 8 hours of drilling holes in cpus and comparing die temps to tcase temps....curiosity was getting to me.

I borrowed an accurate surface temp thermocouple, has flat tip as opposed to wire one, and was reading almost exactly in line with IR gun, sometime .5C higher, sometimes 1C lower, mainly from different sensor sampling times.

First on pentium 4 since it has a soldered IHS. I measured with both IR gun and fluke temp probe which reads surface temps...and slowly brought up to shutdown temp....It shutdown at an average of ~76C Tcase (would ?throttle for few seconds and reduce temp 2-3C then cut off) I did this about 15x and mapped out a circle on the center of cpu that gave same temps consistently and same cutoff Tcase temps consistently (within +-1C). I then drilled a hole in the center, through half of the marked area, leaving other half for tcase measurement. When I got down to solder I switched from drill to dremel....saw small hole of mirror surface in couple spots...but a little aggressive with dremel and scratched core surface...but cpu worked fine.

Ran the temp up and could hold it under cutoff for minute or so with big fan (equilibration in seconds anyways) and running probe from die to tcase back and forth, probably tested 20 or more runs and hundred times...always 3-5C gradient, vast majority reads ~4C higher die temp than tcase.

Then ran it slowly up to cutoff temp 7X reading Tcase each time beside the hole, and then 7x more reading die temp with surface probe in the hole.

Die temp reaches avg. 80.7C, then throttles, drops temp few C for few seconds, then cuts off.

Tcase temp reaches ~76.3C then throttle, drops temp few C for few seconds, then cuts off, highest temp reached recorded.

Cpu shutdown die temps, highest recorded, measured with fluke temp probe
80.8, 80.1, 81.2, 80.5, 80.4, 80.9, 81.3

Shutdown Tcase temps (before and after drilling holes ~ same) measured with fluke temp probe.
76.5, 76.1, 76.7, 75.7, 75.6, 76.6, 77.1

Also using IR to measure Tcase and fluke probe to measure Tcase, tracks within half a degree celsius...but then using IR to measure Tcase and surface probe to measure die, die temp always 3-5C and avg 4C higher.

A couple of interesting things, as soon as power cuts off, Tcase =Tdie, ie as soon as die temp is no longer producing heat, equilibration is instantaneous.

Also, I stacked another IHS on top of IHS, and again only get 2C gradient...I think that is b/c die to IHS is closer to core heater than IHS to second IHS, and also going from small surface area to larger surface area incurs bigger gradient vs identical surface areas of IHS to IHS.

But I am now convinced on cpus with a solder attach, there is going to be a ~4C gradient from die to Tcase when heatsink is off. Hence need to add 4C to IR Tcase temps to get tjmax. So I am back to thinking E8400 tjmax is about right at 100C.

May post more this weekend if do some more playing.

I have not drilled my E8400 yet, that will be last test. After benching and failing to get 5hz 3x now, only 4.9ghz, even tried 1.9v yesterday...my E8400 now has degraded for 3rd time and needs 1.45v for 4 ghz (passes 10 linpack)...I would like to do same test on E8400 since it runs at slightly lower volts....but would be surprised if saw anything different than 3-4C at this point. But not going to drill it until I decide on getting E8600, q9650 or nehalem and wont decide that til nda is up and people post more nehalem results...as my E8400 is the only cpu in my house without a hole in it (other than wifes)

[unclewebb]

Thumbs up rge for going way beyond the call of duty.

I'm in total agreement that TjMax=100C is very reasonable for the 45nm E8x00 cpus and the core temp being about 5C higher than IR IHS surface temp measurements is also very reasonable.

I plan for RealTemp to continue using that number for most 45nm CPUs. For the original E6x00 - B2, I will be using 10C less than that or TjMax=90C regardless of Intel's recent IDF announcement. Using Intel's new Target TJ spec as TjMax just doesn't make any sense for most 65nm processors.

I would still like to get a Xeon E3110 for some testing just to see how it compares to an E8400. If I ever find one that is guaranteed to be E0 then I'll jump on it but the ads I've seen don't mention an sSpec number.

I'm suspicious that my assumption that a well air cooled Core 2 Duo should run about 5C hotter than ambient at low MHz and low voltage might be too conservative. Maybe our calibration method at low volts / low MHz should be based on 10C.

With my Tuniq in the way, it's hard to get in for an accurate IR measurement and as you know, as soon as you remove the heatsink, temperatures shoot up in the blink of an eye.

Can you think of any way to get an IHS temp measurement or maybe a heatsink temp measurement near the IHS? If the heatsink is installed you might come up with a number which proves or disproves that 5C over ambient is reasonable.

[randomizer]

I plan for RealTemp to continue using that number for most 45nm CPUs. For the original E6x00 - B2, I will be using 10C less than that or TjMax=90C regardless of Intel's recent IDF announcement. Using Intel's new Target TJ spec as TjMax just doesn't make any sense for most 65nm processors.

It would be nice if Intel had a glossary with all their fancy terminology saying exactly what Tj Target is. But I suppose they'd need more than one definition, because to me it looks like they use the same term for more than one thing. There's no reason why Intel would lie about the numbers they gave us, but if it is possible to get temperatures being reported below ambient on air then Tj Target can't be (exclusively) Tj Max.

But Intel gives several indications that it is, in both presentations. They had an updated slide on monitoring utilities showing the updated Tj Max and then said "65nm and Xeon processor information available today." That and the little formula they showed in the August presentation is evidence that Tj Target is Tj Max. I can only think that it is sometimes Tj Max and sometimes something else that Intel hasn't said.

[rge]

unclewebb, if you get a xeon 3110, would be interesting to see IR reading.
IHS temp with thermocouple would be interesting to do...maybe I should dremel a groove in my E8400 when it comes time for its sacrifice, since I am already sure of die/tcase gradient w/solder. I might be able to position the surface thermocouple to do that, would obviate the need for calibrating a wire one, which i have no means to do.

Randomizer, I agree intel is likely telling the truth (just omitting actual offset numbers).

Intel states temp = tj target-DTS + sensor offset. That formula can be rearranged to
TEMP = (tj target + offset) - DTS

They said in slide, most (not all) DTS are set higher than tj target, and if 45nm have no significant offset or even 1-2C but 65nm have 10-20 offests that is consistent with that presentation. Looking at slide 7 graphs, if drawn to scale, it is easy to imagine a 10C or 20C offset in some cpus.

So for E8400, offset = near 0, so
TEMP = tj target + 0 - DTS or simply TEMP = tj -DTS

For E6600, offset = 20C, so
TEMP = tj target + 20C - DTS. So unclewebb is simply adding 20C (offset) to tj target to get accurate reading for E6600.

The above is exactly consistent with intels presentation...but would have been nice to be given offsets, though maybe they vary few C part to part in addition, hence would be messy.

Maybe testing early samples of core2duo required lower tj...then on release samples with improvements/different stepping they required large offsets and they never changed tj, just kept using offsets

[unclewebb]

"...in most cases the DTS calibration point will be higher than the Tj Target values"

It's quite possible that the Xeon E3110 which has an Intel TJ Target = 95C, might still be TjMax = 100C, same as its twin, the E8400.

When the offset X isn't defined by Intel, the list of TJ Target values isn't very useful. They probably just got tired of being asked the same question all the time, "What is TjMax?" I know the feeling. They threw us a bone but there's no meat on it.

The sad part is that this is going to continue into the next generation of Core i7. They may be adding a register that contains a Target TJ value which might be an improvement but that doesn't directly translate into a TjMax value so we'll still be guessing at what sort of offset we need to add to that number. At least users will have a new number to compare to each other when looking for golden chips.

[RejZoR]

Hm, is it possible that E5200 @ 3,875 (1,35V) GHz is running at only 38°C after few minuts of Orthos? I know 45nm parts are cooler but i never expected they are that much cooler (compared to E4300). Oh, btw, i have a sensor stuck on core1 yey. It seems sensor failure rate goes sky high with 45nm CPU's. I rarely heard that 65nm chip had a stuck sensor.

[jaredpace]

[WaterFlex]

Yeehaaa! E3110 TJ is 95 not 100 ! I`m happy

[jaredpace]

Yeehaaa! E3110 TJ is 95 not 100 ! I`m happy

that means you have less headroom. ehehe

[jaredpace]

webb, rge, gurus, everyone,

I have a question - which may already be answered in this thread. Intel says Tcase (thermal spec) is 72.4C (C0) or 74.1C (E0) for E8400s. What does this mean as far as determining a maximum safe temperature for the cores?

I still cannot understand the relationship between intel's 72.4/74.1C limitations and the core temperatures measured by realtemp & coretemp.

Intel® Core™2 Duo Desktop Processor E8400
Processor Specifications:

sSpec Number:SLAPL
CPU Speed:3 GHz
PCG:06
Bus Speed:1333 MHz
Bus/Core Ratio:9
L2 Cache Size:6 MB
L2 Cache Speed:3 GHz
Package Type:LGA775
Manufacturing Technology:45 nm
Core Stepping:C0
CPUID String:10676h
Thermal Design Power:65W
Thermal Specification:72.4°C
VID Voltage Range:0.85V – 1.3625V



Intel® Core™2 Duo Desktop Processor E8400
Processor Specifications:

sSpec Number:SLB9J
CPU Speed:3 GHz
PCG:06
Bus Speed:1333 MHz
Bus/Core Ratio:9
L2 Cache Size:6 MB
L2 Cache Speed:3 GHz
Package Type:LGA775
Manufacturing Technology:45 nm
Core Stepping:E0
CPUID String:1067Ah
Thermal Design Power:65W
Thermal Specification:74.1°C
VID Voltage Range:0.85V – 1.3625V

Edit: Ahh I may have found my answer. Looks like intel assumes that when the top center of the E0 E8400's IHS reaches a temperature of 74.1°C, the temperature of the cores at that moment must be somewhere between 95C and 100C. I say this because of the mobile processors not having any IHS and Tcase being equal to Tjunction. When TM2 trips or activates prochot on the mobile core2duos, tcase max has been reached, and ironically it's the same as tjmax. So they have to be assuming that cpus with the IHS on them reach tjmax & tcase max simultaneously such as: 74.1C/100C. Correct?

Quote from intel:
"The thermal specification shown is the maximum case temperature at the maximum Thermal Design Power (TDP) value for that processor. It is measured at the geometric center on the topside of the processor integrated heat spreader. For processors without integrated heat spreaders such as mobile processors, the thermal specification is referred to as the junction temperature (Tj). The maximum junction temperature is defined by an activation of the processor Intel® Thermal Monitor. The Intel Thermal Monitor’s automatic mode is used to indicate that the maximum TJ has been reached."

[rge]

jaredpace,

I might have an answer to that a few hours from now after I finish drilling a small hole in the middle of intel heatsink, so I can check core, cpu temps versus tcase temps at idle and load. etching my cpu will not work, as I have to keep the surface probe perpendicular, so flat surface is against flat surface....so straight through the heatsink, fan and anything else that gets in way of my drill....btw...drilling through copper is a pain, may have to get sharper drill bit. It might be 1-2 degrees of error, but i have learned the IHS is such a good heat spreader that temps wont get more than about 1C difference across large area of it.

[jaredpace]

i bet you see something like this at maximum temps:

IHS thermocouple: ~73°C
Core temperatures: 95°C~100°C

[Mumak]

Good news at least is that Nehalem should have an uniform DTS accuracy across temperature range.

[jaredpace]

looking forward to your results rge!

[rge]

i bet you see something like this at maximum temps:

IHS thermocouple: ~73°C
Core temperatures: 95°C~100°C

bingo!

after going through about 80 pics, different temps and notes best guess for core to ambient gradient.

1.1vcore, 6x300, stock cooler-------------------same settings but water+PA120.3
ambient 24C------------------------------------------------ambient 24C
IHS 30C----------------------------------------------------IHS should be 27C (b/c cpu set to track IHS at idle)
CPU diode 30C (reads few C too low at idle)--------------CPU diode reading 27C (set track IHS at idle not load)
core temp 34-35C (best guess)---------------------------core temp 30-31C (best guess)

Using water or top air cooling ~6-7C difference between core temp and ambient temp
when undervolted, underclocked idle. It can not be less than 5C, can not be more than 8C.
IHS is 3 C above ambient. Gradient from IHS to core estimated 3 ways. One is by checking temps at same settings in 4 diff ambients,
then plotting error backwards came out to 30.5C, going by 2C error at higher temps came out to 31C, and using known gradient of 4C on pentium and 4-5C heatsink off E8400 and knowing should be less with heatsink on 30-31C.

Using water/PA120.3 stock 6x333 (speedstep enabled), stock volts 1.2v core, idle, core temp is ~7-8C above ambient.

Using stock intel cooling, undervolted, underclocked likely 10-11C gradient from ambient to core, as IHS is 6C above ambient and core another 4-5C (at least) above IHS, gradient cant be less than 9, cant be more than 12C.

Using stock intel cooling, stock clock, stock volts 1.2vcore, gradient from ambient to core about 14C. (the higher the voltage you go, the more benefit you see from better cooling)

[rge]

when choosing cpu temp calibration for E8400, apparently need to decide:
1) do you want your cpu temp to report the temp where the cpu diode is located, between cores, and report a few C cooler than die temps on load
or 2) do you want your cpu temp to approximate IHS temp and report 14C cooler than die temps on orthos load or up to 26-28C cooler temps on max linpack load (assuming stock settings, stock intel cooling on (E8400) ie....tjmax 100C - tcasemax 72C....ie it is not possible to actually track true IHS temps with cpu diode, because it is located in wrong place and calibration would need to be adjusted by 20C going from idle to max load. So do choice 1, choice 2 is not possible....it can be calibrated to mimic IHS idle OR IHS orthos load OR IHS linpack load, but one of the three will be accurate the other two would be wildly off.

In previous intel docs and even in recent slides, intel states DTS is calibrated such that throttling occurs just above tcase max...ie when cpu at full load that produces near 100C tjmax temps, at intel worst case testing parameters, IHS temp should be just over 72C...assuming intel testing parameters, stock clock, stock cooling, intel loading program etc. Who knows the exact relationship when OCing, I could not really test it as already at 83C with linpack on intel cooler.

Interestingly the GB bios calibrates cpu temp 7C lower than what I have it set to (bios F7)...so cpu temp reads -7C from true IHS at idle, +7C over true IHS at orthos load, and ~+20C too high at linpack load....they split the difference between idle and orthos load, which is probably the best you can do if trying to mimic IHS.

In the pics, prior to drilling a hole in intel stock cooler, I tried with native fan, stock settings, idle and load. I then placed a box fan to hit intel heatsink and removed intel fan and put box fan on a speed to replicate same temps, since I could not use fan with thermocouple attached. After drilling hole in heatsink, I got roughly same temps within 1-2C...so one little hole did not affect things too much.

Also in last pic, note after load is off, immediately IHS temp is within 8C of core temp, and tracked within 7-8C of core temps back down several degrees, suggesting 5-6C difference between IHS temp and true core temp at idle at stock settings with speedstep on using crappy intel cooler...can not be more than 8C and core temp is reading 2-3C too high at that point, so should be 5-6C.

[jaredpace]

so at idle, gradient between tcase & tjunction is ~ 2 to 5 Celcius? And as you go into loaded temperatures, the cpu maxes out at 72C tcase & 100C tjunction and the gradient increases to ~ 27C.

Temp #1 COOL Idle (sensors probably stuck - evident by testing outside)
Tcase:29C
Tjunction:30C
Cpu Temp:35C or 41C(wrong)
Tcase/Tjunction Gradient:~1C
Tcase/Cputemp Gradient:5C or 11C(wrong)


Temp #2 MILD temps
Tcase:47.4C
Tjunction:65C
Cpu Temp:~61C
Tcase/Tjunction Gradient:~18C
Tcase/Cputemp Gradient:~4C


Temp #3 HOT~84C coretemp
Tcase:56.7C
Tjunction:84C
Cpu Temp:~80C
Tcase/Tjunction Gradient:~27C
Tcase/Cputemp Gradient:~4C


Temp #4 HOT (Theoretical Max)
Tcase:~72C
Tjunction:~100C
Cpu Temp:~94C?
Tcase/Tjunction Gradient:~27C? (If tests are correct)
Tcase/Cputemp Gradient:~6C?

Temp #5 Cool down to idle
Tcase:50.2C
Tjunction:58C
Cpu Temp:55C?
Tcase/Tjunction Gradient:~8C
Tcase/Cputemp Gradient:~5C?


Interesting. This means that when you're running your E8400 at 80C core temperature you're nowhere near intels Tcase maximum or 72.4 or 74.1C. You're probably closer to 58-60C Tcase.

Thanks for the tests Rge!

[rge]

one last pic showing IR vs thermocouple...turning computer on then off, both showed 44C, then tracked down within 1C of each other to both reading 37 in pic...took some pics where both read ~83C...but did not come out.

[jaredpace]

so your IR thermometer is/was correct from the start and the thermocouple is not actually needed? Interesting! Am I correct in guessing that the Tcase to Tjunction gradient is increasing as the junction temperature rises from 40C --> 90C?

For example:
Tcase temp: 30 40 45 50 55 60 65 70 74
Tjunct temp: 31 42 50 58 66 76 84 95 100
Gradient ~: .01...2...5...8..11.16.19..25.27

Is this a close scale?