Intel to bring back Hyperthreading with Nehalem core

[VulgarHandle]

http://www.tgdaily.com/2007/02/13/amd_intel/

Things will get a bit more interesting with the introduction of the Nehalem core - an evolutionary step up from the Core microarchiteture. Sources said that the Nehalem architecture will result in performance gains in the range between 20 and 40%. The architectural changes in Nehalem will bring new instructions as well as a new shared cache, which, according to sources, will grow to 12 MB. Intel will also revive its Hyperthreading technology, which will be called "symmetric multi-threading" (SMT).It basically represents a multi-core adaption of the original Hyperthreading idea that was first introduced with single-core Pentium 4 processors in 2002.

[oldblue]

First HT is on, then it is off again. GRRRR. Be nice to know who's story is right.

I think the rumors before were about Penryn. This is Nehalem. I think the current state is:

Penryn: No HT
Nehalem: HT

[Rovtar]

Nice, i hope it's true

[Carfax]

If Nehalem has 12MB of shared cache, then most likely it will be a native quad core..

And 20 to 40% increase would be fantastic. It seems like CPU power has been growing at a much faster rate since the introduction of the K8, followed by the C2D and now the upcoming K10.

No mention of an ODMC though..

[Gam3Ra]

This will be better HT than Prescott, I wana see it

[buffbiff21]

And 20 to 40% increase would be fantastic.

qft
I would LOVE to see tons of CPU growth. That essencially is the "computer," after all

Well as long as they keep comin along every 6 months I am happy

[VulgarHandle]

it dosn't say anything about going native quad-core, so the shared cache could be 2x6mb...

....as well as a new shared cache, which, according to sources, will grow to 12 MB.

let the speculation begin on that..

while it says it's new, the new could just be the growth, not necessarily a native quad-core with a shared cache that grows to 12mb

However, the company also believes that AMD's decision to integrate the memory controller into the CPU has a downside and forces the manufacturer to compromise cache size and stick to only two memory channels.

This is just funny to me, since AMD's cache size has never been that big of a performance difference, and even then, the new AMD quads are said to have an expandable L3. And I don't see being limited to only 2 memory channels as being a bandwidth killer for AMD's either.....

[madcho]

intel want more than prescott humiliation ?

[vitaminc]

intel want more than prescott humiliation ?

HT is good. P4 is bad. a good implementation on a junk processor will end up w/ another junk processor.

I dare you to say putting HT on K8L/Barcelona will be a humiliation for AMD in terms of performance.

[Carfax]

it dosn't say anything about going native quad-core, so the shared cache could be 2x6mb...

let the speculation begin on that..

while it says it's new, the new could just be the growth, not necessarily a native quad-core with a shared cache that grows to 12mb

I don't think a 2x6MB setup would constitute as "shared," because all four cores don't have access to the full 12MB.

This is why I think that Nehalem would be a native quad core, if indeed it does have 12MB of shared cache.

This is just funny to me, since AMD's cache size has never been that big of a performance difference, and even then, the new AMD quads are said to have an expandable L3. And I don't see being limited to only 2 memory channels as being a bandwidth killer for AMD's either.....

It's not so big of a deal on the desktop, or even workstation comps. But on the enterprise and server level, or even HPC, then being limited via the memory channels would a big deal I'd wager..

[VulgarHandle]

yeah, but don't current QX6700 get labeled as 8mb shared cache, when it's really 2x4mb?

and isn't K10 reported to have 2 ODMC's?(this one i'm not so sure on)

[largon]

I really hope we won't be seeing an off-die MC with Nehalem.

VulgarHandle,
The word is there's 2 unganged 64bit MC on Barcelona, each dedicated to a pair of cores, yielding 1/4 bandwidth per core compared to todays K8s with ganged (cooperating) 2x64bit.

But enough of Barcelona...

[Nanometer]

I can't believe all of you guys are happy to see HT back in the Intel CPU. That just shows you have no idea how it works.

[awdrifter]

Why doesn't AMD use HT? It seems like their K8 platform was perfect for it. If there's really a 20-40% performance gain, that alone would gain back a lot of IPC advantage from Conroe. Is AMD's arch so different that HT can't be done?

[Carfax]

I can't believe all of you guys are happy to see HT back in the Intel CPU. That just shows you have no idea how it works.

And you're assuming that HT in Nehalem will be like how it was in the P4, which is ridiculous as they are two different architectures..

We already know the reasons why HT wasn't awesome on the P4, and it has nothing to do with the fact that SMT as a technology isn't worthy.

[madcho]

Why doesn't AMD use HT? It seems like their K8 platform was perfect for it. If there's really a 20-40% performance gain, that alone would gain back a lot of IPC advantage from Conroe. Is AMD's arch so different that HT can't be done?

Hypertreading is less efficient than multicore ....

Multicore and hyperthreading are not a good solution for common usage. If you want a new Niagara, that the way but programs won't scall much than 4/8cores. ( Before 2010/2012 )

Even with the best programers, common usage has scale limit. I don't say server market won't benefit of it. That's false.

For SQL / HTTP and things like that, more threads you can do, better is the CPU.

For common usage, super pi, 3dmark06/07, games, and evry days programs, the way is to get better cores, as AMD said.

Intel show 80 cores for the IDF, to explain to programers that multithread is futur, and this come now.

AMD & intel will not sell in mainstream market 80 cores before 2015/2020

[VulgarHandle]

I can't believe all of you guys are happy to see HT back in the Intel CPU. That just shows you have no idea how it works.

Do, please, enlighten us. And I mean it, I'd like to know both how it works, and why it won't be good for the new architecture.

[[XC] gomeler]

Hypertreading is less efficient than multicore ....

Multicore and hyperthreading are not a good solution for common usage. If you want a new Niagara, that the way but programs won't scall much than 4/8cores. ( Before 2010/2012 )

Even with the best programers, common usage has scale limit. I don't say server market won't benefit of it. That's false.

For SQL / HTTP and things like that, more threads you can do, better is the CPU.

For common usage, super pi, 3dmark06/07, games, and evry days programs, the way is to get better cores, as AMD said.

Intel show 80 cores for the IDF, to explain to programers that multithread is futur, and this come now.

AMD & intel will not sell in mainstream market 80 cores before 2015/2020

You forget that the majority of server-based applications are multi-threaded and the majority of computational intensive desktop apps are either multi-threaded or becoming multithreaded. I dream of 4 physical and 4 virtual cores on my desktop crunching away 8 instances of WCG. HT itself is a great idea, just the P4 architecture wasn't optimized to fully utilize it's benefits. This time around Intel knows what they are doing and we may see the performance increases in all applications that HT was originally supposed to deliver.

[BrownTown]

So long as the hyperthreading is done intellegently I son't see the problem, at the very least it is a useless, and in certain applications like video encoding or rendering it should provide considerable improvements. It shouldn't be more than a few % of the die, so its not like you are losing something else to gain it

[JamesAvery22]

HT'ing gave Xeons a good boost in a lot of server apps. Most of the crap I do at least doesn't gain anything from HT. Most big processes demand 100% of the same resource in the CPU so doesn't really matter if I can run 8 processes at the same time when only one can actually do anything at any given point in time.

Yes HT is no where near as efficient as having another core. But if you are running some multithreaded huge I/O app then having one HT'ed CPU compared to just one normal CPU can make a huge difference.
Search for the HT'ing articles back in the day. Sort story, it either helps or does nothing. And if you really don't like it you can just turn it off...

[BrownTown]

Well actually hyperthreading often slowed down applications, sometimes even noticebly. But the problems were due to other problems whith the P4 design which are now well understood and which surely not be repeated in a new architecture to run HT.

[Revv23]

Give me K8L give me nehalem, give me a sweet year for CPU's.

I don't think it would be wise to upgrade from a C2D class cpu for at least a year... make sure you wait until all this cool stuff comes out.

[nn_step]

HT is good. P4 is bad. a good implementation on a junk processor will end up w/ another junk processor.

I dare you to say putting HT on K8L/Barcelona will be a humiliation for AMD in terms of performance.

depends entirely if you are doing server work or desktop work.
If it is desktop, sure it is nice and it makes the computer a little smoother
If it is a Server, it is a very very bad thing that is actually a Security risk (unless they figured out how to fix it)

[The Ghost]

I dare you to say putting HT on K8L/Barcelona will be a humiliation for AMD in terms of performance.

i doubt that hperthreading would help amd , amd like the conroe , both have efficient cores , the Nehalem may be something different , besides being a native quad core with CSI that is suppose to come out in the 2nd half of 2008
time will tell no sense worrying about it right now

[Entity_Razer]

for the people shouting no more HT, be sure to get your facts straight that HT is NOT Netburst (which caused all the heat problems and the likes)

HT actually was/is pretty good...

I love my xeons