Originally Posted by
zads
You guys are on the right track here.
The flash manufacturers rate the PE cycle based on flash data retention and correctability given the amount of spare ECC area on each page and how much that can correct. So you can theoretically run 200%, 300% etc of the PE cycle, but you're gonna get more and more probability of errors or failed drives. The bit error probability skyrockets above the 10^(-15) error rate that most consumer drives quote at this point. When a IMFT 25nm drive starts out, it is likely well beyond a 10^(-20) unrecoverable bit error rate.
Throw in things like temperature variations, background radiation, etc, and you have a smattering of other error inducing mechanisms.
The reason its not booting up is likely that the last remaining firmware copy in your flash got corrupted beyond recoverability.
True enterprise SLC and MLC drives actually push more width and more layers of error correction mechanisms into the drive, which ultimately gives them longer data retention and lower unrecoverrable bit error rates than consumer drives, from infancy to EOL.