Originally Posted by
gojirasan
Well I don't know if I agree with "more than makes up for it", but I agree that those things certainly can reduce the impact of a shrink if they are present. In any given case that can be a big if. Still, I don't see this as an excuse for producing an inferior product. Inferior to the one they could have made if they weren't so obsessed with saving a few dollars via a process shrink. Because, for the purpose of SSDs at least, that is all it is doing. Saving on manufacturing costs.
Well "short" is relative. The ideal scenario for the industry as a whole is to have the products fail as soon after end of warranty as possible. You want repeat customers. Of course if their competitors are offering drives which last much longer and the public is aware of that fact they will have to increase the lifespan to compete. MLC drives are intended to be consumer devices. They are supposed to be for the average Joe who might take 10 years to write 80 TB.
Even at 19nm an SLC device will have a long lifetime. So businesses would be expected to buy those. Keep in mind that at present the manufacturers aren't competing on write endurance at all, except for SLC sales to businesses. It just isn't a marketing point. Even when it could be as in the Max IOPS drive. My point isn't that these companies would intentionally design an SSD to fail post-warranty, but they certainly aren't going to go out of their way to stop it. When we do start seeing 2 bit and possibly even 3 bit 19nm SSDs in 2012 I think write endurance could be reduced to a point where, in 1-3 years, techies at least may start to notice something is very wrong. It wouldn't surprise me at all if the industry would like to subdivide the market more into long life SLC and shorter lived MLC drives.
I realize that p/e is just one factor in write endurance. It's just the only factor where the manufacturers seem to be moving backwards, not forwards. Even if they can manage to increase overall write endurance despite a process shrink, it still bothers me, because they are not producing as good a product as they could if they used more robust memory with larger floating gates. Whatever happened to "bigger is better"? I want my floating gate transistors to be super-sized! Also I didn't intend to say that a single process shrink has half the write capacity. I meant that *if* it does it had better be half the cost. It was an example. I could have used 30% as an example just as easily.
Highly educated wild-assed guesses are still wild-assed guesses, but I am also betting that they have been conservative with their p/e c. estimates in the past. That is what gives IMFT the overhead for their 3000 p/e c. 20nm flash and maybe their 5000 p/e c. 25nm flash. Although we will soon find out about that.
As far as the Max IOPS goes, while it is difficult to be sure without the sort of testing going on here, I would be very surprised if it did not have better write endurance than the 25nm version. It is difficult to imagine how it could not. The larger floating gate can hold more electrons allowing for more fluctuations for a given voltage variation and the oxide layer can be larger too. It is an unusual case because it is a process size difference in the same controller generation so the write endurance and EDC/ECC etc must be assumed to be equal. And how could it be a marketing gimmick? I haven't noticed OCZ mention the theoretical write endurance difference at all. Although that is probably only because they would rather not even open that can of worms.
Incidentally, it has occurred to me that the process shrinks are not all bad in theory if you take a long enough view. If they focus on making smaller sized chips, the OEMs could fit more chips on a given PCB resulting in greater interleave and higher speeds. Like going from certain 120 GB drives to 240 GB ones. It also means larger capacity drives. Although unless the price per GB drops dramatically they won't exactly be affordable. Also even if dropping a process size does halve the write endurance obviously doubling the capacity doubles the write endurance. but I don't think the limitations of floating gate NAND will scale enough for that. I think they will have to transition to something like 3D charge trap flash or even one of the emerging exotic non-volatile memory technologies.