07 post code = fclk wall which the vast majority of chips hit @ 3800 or 3866 nothing to due with T topology it's the typical fabric limitation. drop the 1/1 ratio and you can do 5000+ memory.
PBO is usually almost always limited by EDC which if i run prime always bangs 100% of 200 A while TDC and PPT are usually in the 50-60% range, at least that's the case when i run the 16 core chips.
I've got the liquid freezer II 280 installed now, trying to close the clock gap on min max avg and shift it higher on 5950x now.
testmem5 works with anta extreme it's harsher than hci and faster. Found errors with it that even 2000% coverage in hci did not.
Case is ordered ( ended up with black P500a non rgb as it's what became available ) , just need to order a 5 pack of p14 fans probably later on today.
https://media.discordapp.net/attachm...678&height=903
This is just a baseline run with PBO +100 and manual set current/watts no curve optimizer yet
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