How to use the Zippy and 850SSI on DFI nF4 - 56K caution
A Tale of a MB and two Power Supplies, Part I
(subtitled - Memoirs from a loony OC'r)
When the DFI nF4 first came out and I was putting together the pieces for a new system, one of the choices was what PS to use after initial testing. I tend to be picky with my PS choice, as well as plan ahead for what I'll be doing in the future. So I looked around, checked options, queried manufacturer's, read here and there, and based on my criteria, decided at the time there were only two possible choices, a Zippy 700W PS or the PCPnC 850SSI.
However the Zippy had been reported to have problems with the DFI nF4 when attempting to use the +5V Vmem jumper option. Rumours were it had to do with a problem in the Zippy. Well, that wouldn't do, since while I was going to play with TCCD, I also had BH5 and thoughts of playing with UTT. Having always had excellent results with PCPnC supplies, I decided to break open the piggy bank and got the 850SSI (see my first impressions here ).
As can be seen in the linked "First Impressions", it's an excellent supply... and worked very well with the Mushkin PC4400 TCCD I have. After playing with the TCCD and getting a good feel for the DFI nF4 and looking into some things dealing with it (that's another story :p: ), I picked up some UTT to check out.
Made a pot of java and sat down for a late night session with the UTT. Changed the jumpers on the MB to get the juice I was going to need ( >3.1V), plugged in the UUT, and with eager anticipation, hit the switch.
The fans started to spin up and wrrrrRRRRRRRRRRR SPLAT! Power supply shutdown :( :shakes: First thoughts are "what did I booger up". I removed AC power and carefully checked everything over, even verified the UUT wasn't FUBAR in another system. Re-installed the UUT, switched back to the 3.3V rail for Vmem, hit the switch, booted the system, and let out a sigh of relief. Kewl, nothing fried, magic smoke intact :D
Thinking "ok, must just have been a fluke" (well, my DMM is anyway :lol: ) Shut down the system, switch the jumper back to the 5V rail for Vmem, take a swig of java, and hit the switch....
wrrrrRRRRRRRRRRR SPLAT! :eh:
Ok... now I'm fired up (even tho the MB isn't :p: ). Off come the gloves, out comes the bag of goodies and equipment, in goes the java. I'm thinking, "Ok, it's just you and me puter" :lsfight: :hehe:
Much poking and prodding and :coffee: later, I've picked up quite a bit of info on the MB. Turns out the MB is drawing too much current from the +5VSB (yes, I said +5V StandBy) rail of the power supply and its OCP is kicking in like it should, shutting her down. Quite strange... what's drawing so much current from the +5VSB rail of all things and how in the heck does it relate to the +5V Vmem jumpers.
So I remove AC from the PS and change jumpers on the MB dealing with +5VSB, disconnecting anything I can from the +5VSB rail - mouse, USB, everything. Re-check the +5VSB rating on the PS... looks good, a 2A rating, same as PS's that work with the +5V rail. Think about what uses +5VSB on a MB usually, not much. Think, ok, must have been the USB/mouse jumpers set to use +5VSB, decide to try again with them now removed from that rail.
wrrrrRRRRRRRRRRR SPLAT! GrrrrrRRRRRRRRRRRRRRRRRRRR!!!!!!
Ok... full biopsy and exploratory surgery time. Roll up the sleeves, down some more :java:, give myself a pep talk, "Hey dude, there's never been an electronic device you couldn't noodle out, now get back in there, rub those two little brain cells of yours together, and wear that MB out!" ...and off we go.
During the course of the biopsy found out some interesting things.
First thing is that the +5VSB is regulated by VR8 down to 3.4V and distributed around the MB.
http://img8.echo.cx/img8/5223/vr82gy.th.png
Here's one of the spots it is used:
http://img8.echo.cx/img8/9243/34vusedhere5bi.th.png
And just why the heck did I track this down (other than this is loading the +5VSB rail) you asked? Well... in the course of the biopsy, was dissecting the JP17 Vmem jumpers and found out this 3.4V was used there ;) (I know, I said "Huh?!?" too)
Here's the complete definition of the JP17 jumpers:
http://img8.echo.cx/img8/1945/themissinglink7fv.th.png
Position A of the jumper was also found independently by Bigtoe and is fairly well known now. Positions C->F jumper either the +5V rail or the +3.3V rail of the PS to the source voltage input of the VMem linear regulation circuit.
The previously unidentified position B is used to source one of the voltages used in the control circuitry of the Vmem regulation circuit. Notice that it is fed by the +5VSB (Standby) rail from the power supply when using the standard 5V jumper configuration. Remember too that the on-board generated 3.4V used in the standard 3.3V jumper configuration is generated by VR8 off of the +5VSB rail.
It's this use (JP17 row B jumper) of the +5VSB rail of the power supply, along with how it is used in the Vmem regulator control circuit that causes the Zippy and PCPnC PS's protection circuits to trip and shutdown when trying to use the "standard" +5V Vmem jumper configuration. It is not a surge current at power up caused by the DIMMs or bypass caps that causes the problem either.
If you have a Zippy or a PCPnC 850SSI, you can do a little experiment yourself to see this. Remember the "cold boot" issue that's been much discussed with UTT? Well, it's real. You can take advantage of part of it for this experiment. Here's how:
1) Turn off your AC power to the power supply.
2) Remove all the DIMMs from your motherboard (look Ma, no DIMMs)
3) Put the JP17 jumper in the "standard" 5V Vmem position (2->3)
4) Re-apply AC power to the power supply but do not turn on power to the MB.
5) Now look at the green Vmem power-on LED next to the yellow slot closest to the CPU. Notice it's lit? That's because power is already applied to the DIMM slots (not good for swapping memory). Go ahead take a meter to a Vmem measurement point... you'll see somewhere between 2.4V and 2.6V.
6) Let the board sit in the powered off state for a bit... couple seconds is long enough, but let it sit as long as you wish... Since power is applied to the DIMM regulator circuit and the DIMM slots, any bypass caps are being fully charged (look Ma, no capacitive caused turn-on surge possible).
7) Remember, no DIMMs in the MB so no load or turn-on surge current demands there... and all our caps in the circuit are now fully charged, so no turn-on surge current demand possible from that either.
8) Now go ahead, push the power button and try to boot the MB... yup... PS shuts down just like before.
9) Come to your own conclusion about where the surge comes from... but you've just shown it isn't from capacitance or DIMMs.
Now, how do we get around this problem... hmmmmmmm.... well, after finding out what the voltage from the "B" position of JP17 is used for and how it's used, I decided there's a solution.
Take your JP17 jumpers and configure them like shown below:
http://img8.echo.cx/img8/4360/5vvmem880ssi5iq.th.png
Notice I used two single jumpers to allow customizing of the configuration. Did this with my PCPnC 850SSI and I was able to get the following, no problem:
http://img8.echo.cx/img8/9286/dmmvmem35v7kc.th.png
Problem gone :D Also had Steven offer his services to verify the solution worked on the Zippy PS's (thanks bro Took you long enough :p: ). His Zippy PS cranked right up and he had a nice run with some UTT @ 3.6V and 267Mhz with his FX25.
Steven's test run with a Zippy PS and the DFI nF4 (look Ma, it works!):
http://img212.echo.cx/img212/9030/267bh52lh.jpg
And here is a diagram of the jumper settings to use if you want >3.1V using the 5V rail with a PCPnC 850SSI or Zippy PS:
http://img8.echo.cx/img8/8591/thejmprfix5vr.th.png
But of course, it doesn't end there. Besides waiting on getting someone to quietly test it out on a Zippy for me and the general issue of the "standard" 5V jumper configuration, there was another reason I didn't previously release this info... a small degree of uncertainty about it's safe use above 3.4V (well, as safe as any other way :lol: ). Even though later the tweaked 3.3V rail with the "A" position jumper switched worked well and was being used by quite a few people without problem, I still like to be thorough. So I spent a few more late night Java and Noodle sessions (no, not the Top Ramen type :p: ). What I found is both interesting in one way and another indicator this jumper configuration is at least as safe as using any other for higher Vmem.
I found that the power from JP17 position B was only needed during the initial moments of boot! Anybody can see this one for yourself. So if you want to check before using it for very long or just feel bummed because you couldn't do the first experiment, follow along :lol:
1) Go into your BIOS and make sure your VMem is set for 3.0V operation (just for this experiment), enable MemTest in the BIOS, save the settings, reboot
2) Shutdown the system
3) Turn off AC power to your PS
4) Configure JP17 for using the 5V jumper option (pick a way, anyway, "standard", "modified", "tweaked 3.3")
5) Re-apply AC power (there's that darn Vmem LED lit before power is applied again... pesky little sucker)
5a) If you want to see for yourself half of the cause of the cold boot issue, get your DMM out, stick the negative lead into a spare Molex power connector in a black wire position (center), and hold the positive lead on a Vmem monitoring point. Notice it's only reading somewhere between 2.4 and 2.6V?
6) Boot your system up (if you're watching the cold-boot issue with your DMM, keep watching the meter and the diagnostic LEDs on the MB)
6a) If you are watching with your DMM, notice Vmem finally goes up to the proper 3.x voltage level after you get past the 3 POST tests (CPU, Mem, VGA).
7) Now wait until MemTest is running
8) Pull the single jumper in position "B" of JP17
9) Notice MemTest and your system keep running :D Go ahead, look at your DMM again... Vmem still at the same level ;)
Ok, one more experiment you can do to make yourself feel ok using the new jumper setting...
Go thru the experiment just above again... only this time you have to be using the new "modified" jumper settings (Position 'B' in the 1-2 position, rest in 2-3 position) and this time put your meter on the spot shown in this next pic:
http://img8.echo.cx/img8/4025/d7d80aw.th.png
Initially (before power is applied) you'll note that the point indicated is at 3.4V. Once you boot up, watch it switch as fast as your DMM can show you to the level of your 5V rail. So, regardless of what is on JP17, position 'B' at initial power-up, it goes to the 5V rail very shortly after power-up when using the 5V rail for Vmem power generation.
BTW... point "a" on that last thumbnail is connected directly to JP17, and the yellow and green arrows show the voltage flow on the way to the drain of Q62 under the HS.
Summary - there is now a "fix" so all owners of Zippy and 850SSI power supplies can use the 5V rail for generating UTT/BH/CH Vmem voltages and some info about a few other things :D
Oh ya... almost forgot. About that "cold boot" issue... in the pic below, find the pink 'G' on the gate of the FET... that's the signal that isn't getting initialized properly on boot-up after AC power is removed (actually it's when +5VSB is removed... which normally only goes away when AC is removed).
http://img8.echo.cx/img8/7124/coldbootsig1dh.th.png This is what causes the voltage to be applied to the DIMMs before the board is powered up. The low voltage is due to the regulator being programmed for 2.5V.
Regarding that cold boot issue... there's disagreement about how to resolve it. Some people say, "DIMMs should run at SPD timings regardless of the voltage being low." Others say, "the voltage programmed in the BIOS should be used for any testing of the DIMMs during POST."
Both sides have their points... but... in my view the BIOS should set whatever voltage I have programmed into the CMOS (given the CMOS checksum is valid) and use that voltage...PERIOD. In the case of the DFI nF4, they do that in all cases but ONE... during "cold boot". If you watch the Vmem rail during a "warm boot" you can see it does immediately apply the voltage level specified in the CMOS settings. If it is done then, why the heck not do it at "cold boot"?!?!! The simple fact of the matter is that this entire "cold boot" problem with UUT could be solved easily by simply coming out with a BIOS revision that initializes the Vmem circuitry as programmed in the CMOS during all boot sequences, before POST, so the MB initializes the same way every time.
So concludes this excerpt from the chronicals of "The Outer Limits" :p:
Peace :toast:
EDIT: I forgot to mention, this may void the warranty on your board.
NOTE 1: The 618 BIOS from DFI fixes the "cold boot" problem regarding the Vmem voltage setting at POST time :clap:
NOTE 2: The DIMM slots still have power applied after a "cold boot" before the MB is powered up. Be SURE to verify the Vmem power LED is OFF before changing/swapping/installing memory!!
