SC09: Intel speaks about 3D Web, demonstrates LRB.

Here it is:
http://www.theregister.co.uk/2009/11...ttner_keynote/

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On the SGEMM single precision, dense matrix multiply test, Rattner showed Larrabee running at a peak of 417 gigaflops with half of its 80 cores activated; and with all of the cores turned on, it was able to hit 805 gigaflops. As the keynote was winding down, Rattner told the techies to overclock it, and was able to push a single Larrabee chip up to just over 1 teraflops, which is the design goal for the initial Larrabee co-processors.

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80 cores? Probably autor's mistake. But rather interesting is a 805 GFLOPS in SGEMM. As a reference point, Tesla (GTX280) hits 370 GFLOPS in the same task.

So Fermi is faster from GPGPU point then?

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Originally Posted by zalbard

So Fermi is faster from GPGPU point then?

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Will see. But if I remember correctly, Fermi only doubled Single Precission resources of GT200. Also SGEMM greatly depends on mem bandwidth so doubling FP resources dosn't always double perf. Probably Intel designed LRB with the great mem bandwidth.

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On the SGEMM single precision...overclock...just over 1 teraflops

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Failage?

I duno what the HD5870 or the 285GTX gets on that benchmark, but 1TFlop SP is weaksauce on larrabee side.

So Larrabee still fails to run rasterized DirectX graphics with acceptable performance.

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...and for the OpenGL environment being pushed by Advanced Micro Devices and others.

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I spy a typo.

I wish there were pictures or more information on this. They might be aiming to try and reach people who already have Xeon based computing systems. Again I wish they'd put out more details on it.

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Originally Posted by Hornet331

Failage?

I duno what the HD5870 or the 285GTX gets on that benchmark, but 1TFlop SP is weaksauce on larrabee side.

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Failage? Big win, imho. This time it is "real GFLOPS".
As I said Tesla C1060 (GTX280) with theoretical peak of 1TFLOP, hits only 370 GFLOPS in matrix multiplication.
http://www.idre.ucla.edu/events/2009...avid_Tesla.pdf

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Originally Posted by kl0012

Failage? Big win, imho. This time it is "real GFLOPS".
As I said Tesla C1060 (GTX280) with theoretical peak of 1TFLOP, hits only 370 GFLOPS in matrix multiplication.
http://www.idre.ucla.edu/events/2009...avid_Tesla.pdf

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Well, I said i didn't knew how to compare it to others, so if the 280gtx hits 370Gflops in real, it doesn't look that bad. Any numbers on the HD4xxx/5xxx?

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Originally Posted by xoqolatl

So Larrabee still fails to run rasterized DirectX graphics with acceptable performance.

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Well what else you can expect from Intel in the graphic department :confused:

well, I think this is win, chances are your app is x86, not Open_L, so Larrabee wins in the consumers perspective.

Another interesting paper:
http://techresearch.intel.com/UserFi...2009_FINAL.PDF

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Results Summary: Our parallel implementation of ray-casting delivers
close to 5.8x performance improvement on quad-core Nehalem
over an optimized scalar baseline version running on a single core
Harpertown. This enables us to render a large 750x750x1000 dataset
in 2.5 seconds. In comparison, our optimized Nvidia GTX280 implementation
achieves from 5x to 8x speed-up over the scalar baseline.
In addition, we show, via detailed performance simulation, that
a 16-core Intel Larrabee [26] delivers around 10x speed-up over single
core Harpertown, which is on average 1.5x higher performance
than a GTX280 at half the flops. At higher core count, performance
is dominated by the overhead of data transfer, so we developed a lossless
SIMD-friendly compression algorithm that allows 32-core Intel
Larrabee to achieve a 24x speed-up over the scalar baseline.

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they just said single precision was just over a tflop?
and how big is 80 cores?

^^intel doesnt like to tell the truth about gpgpu or ray tracing so dont trust any blogs, articles or whitepapers from them.

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Originally Posted by Hornet331

Well, I said i didn't knew how to compare it to others, so if the 280gtx hits 370Gflops in real, it doesn't look that bad. Any numbers on the HD4xxx/5xxx?

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i have seen 880 GFLOPs with dense matrix on a 4870 and the peak flops in that situation would be 960 GFLOPs. i would expect a 5870 to be a lot faster too. nvidia definitely needs to fix something here. probably memory access but shoddy code is always going to run very slow.

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Originally Posted by xoqolatl

So Larrabee still fails to run rasterized DirectX graphics with acceptable performance.

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Why, because they didn't demonstrate it at an HPC event?

well Larrabee is definitely on the path of Merced!

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Originally Posted by article

Intel is also cracking the issue of sharing data between Core and Xeon CPUs and Larrabee GPU co-processors. Future Core and Xeon chips will be able to create a virtual shared memory pool that both the CPU and GPU can access so datasets are not crunched down, serialized, and moved over the PCI-Express bus from the CPU to the GPU and then back again after calculations are done. The shared virtual memory allows the CPU and GPU to work off the same data in sequence without any movement, which should radically improve performance and smooth out simulations.

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^ This looks interesting to me. It's also a good way to go for Intel because nVidia has no way to do it if they lock them out. Of course, AMD could do it too now, and they may even be able to do it better at the moment.

As for performance... people can write all the blogs and take all the task-specific benches they want, I want to see actual numbers.

I too think the prospect of a shared memory pool is simply awesome. As with EVERY SINGLE HARDWARE RELEASE EVER EVER EVER you won't know till it's in the hands of the consumer. All other debate is just silly.

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Originally Posted by xoqolatl

So Larrabee still fails to run rasterized DirectX graphics with acceptable performance.

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ok? they just demonstrated 1tflop on a single preproduction chip, running x86. can anyone else do that?

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Originally Posted by Hornet331

Well, I said i didn't knew how to compare it to others, so if the 280gtx hits 370Gflops in real, it doesn't look that bad. Any numbers on the HD4xxx/5xxx?

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Well, I did a little google research and found that with all the "stream computing" hype from AMD there are almost no official performance numbers. Still there are some 4870 numbers flying around on AMD forums. So here is it:
Up to 200 GFLOPS using OpenCL:
http://forums.amd.com/devforum/textt...readid=120413&
540 GFLOPS using IL/Brook+ (from AMD official):
http://forums.amd.com/forum/messagev...hreadid=105221
Some guy stated he was able to extract 880 GFLOPS using L1 texture caches but no confirmation that this method is usable in general:
http://cerberus.fileburst.net/showthread.php?t=54842
Also nice sum by AMD guy:

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Although 7XX has multiple methods to access memory(a lot more than 2 if you read the ISA doc). OpenCL currenly only has one as the OpenCL programming model is pointer based, so all data has to be fully coherent(this is ignoring images which is read_only or write_only, not both). This does not allow the use of the texture unit in the same way that brook+/IL can use the texture unit. Brook+ does not allow you to alias pointers(unless you explicitly allow it) and IL you do so at your own risk. Writing to memory and reading from that same memory with the texture unit does not produce deterministic behavior. OpenCL requires that all writes and reads to global memory are coherent, so this approach is not feasible. This is a performance hit compared to a streaming model because the GPU is natively a streaming device. There is another performance hit for the R7XX since it was not designed with OpenCL in mind, our new HD5XXX series was.
One of the goals of the Stream SDK is to provide a full software stack for many different types of programmers.
That means if you want performance, AMD provides CAL/IL to do that. If you want ease of programming to the streaming model, we also provide Brook+ to do that. If you want to program in the same language across multiple devices from the same source, OpenCL.

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I think that the bigest advantage of Larrabee is its ISA so you don't need to deal with various proprietary APIs. Also its memory model (coherent caches, general purpose mem hierarhy) alows much higher flexability in code development.

here is what you need to know: Here
the rest is not important ...

Pommm pom pom pom

Sigh, I got excited for...that.....

If you tune the IL right the rv770 can put out a lot.

I tried Brook+ DP but then i got two different types of instructions but the IL compiler did not combine the two together. I tried several workaround but it was a no go.

Honestly all I want to know is what the pricing is going to look like.

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Originally Posted by kl0012

*snip*

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So if you go with current best case (beside the theoretical 880gflops) intel larrabee can pull of twice the preformance of a HD4870. Now its to be seen how much more pefromance the HD5870 has brought to the table. If the scaling is the same the should be around 1.2TF.

Anyone wondering about 40 deactivated cores? ;)
It seams to me that they didn't have a spare NPP nearby to power up the whole chip!:rofl:

If half of the chip is already on the limit of 300W then all this comparing with 4870/5870 is useless.
LRB with half chip is on par with 4870 perf. wise and on par 5970 (8x 4870) TDP wise.
So when it finally come out it will be say... 10x slower then R900 (very optimistic scenario for Intel) if they cut down power by half and bring 50% speed up in clocks.

As GPU it would bee finally nice to see LRB with TWO DIGITS FPS in any modern game.:D

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Originally Posted by SQjay

Anyone wondering about 40 deactivated cores? ;)
It seams to me that they didn't have a spare NPP nearby to power up the whole chip!:rofl:

If half of the chip is already on the limit of 300W then all this comparing with 4870/5870 is useless.
LRB with half chip is on par with 4870 perf. wise and on par 5970 (8x 4870) TDP wise.
So when it finally come out it will be say... 10x slower then R900 (very optimistic scenario for Intel) if they cut down power by half and bring 50% speed up in clocks.

As GPU it would bee finally nice to see LRB with TWO DIGITS FPS in any modern game.:D

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Reading comprehension ftw.

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On the SGEMM single precision, dense matrix multiply test, Rattner showed Larrabee running at a peak of 417 gigaflops with half of its 80 cores activated; and with all of the cores turned on, it was able to hit 805 gigaflops. As the keynote was winding down, Rattner told the techies to overclock it, and was able to push a single Larrabee chip up to just over 1 teraflops, which is the design goal for the initial Larrabee co-processors.

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I'm not really sure that gaming is really what they are swinging at.

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Kicking off the SC09 supercomputing event...

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Originally Posted by Drwho?

here is what you need to know: Here
the rest is not important ...

Pommm pom pom pom

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Now that was scarry, 5:20am and I click that link :shocked:

haha good one :)

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Originally Posted by Hornet331

So if you go with current best case (beside the theoretical 880gflops) intel larrabee can pull of twice the preformance of a HD4870. Now its to be seen how much more pefromance the HD5870 has brought to the table. If the scaling is the same the should be around 1.2TF.

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It's not theoretical, it's sustainable and the guy tweaked it to do 980GFlops/s on stock HD4870 ...
Here is the thread to read --> http://forum.beyond3d.com/showthread.php?t=54842

Some quotes:

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prunedtree
The result ? I measure 880 Gflop/s for 4096x4096 dense matrix-matrix products. That makes a pair of HD4870x2 boards faster than nine GTX280s ^^

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prunedtree
Well, given that double precision multiply-adds are four (five if you count the `t' unit) times slower but only require twice the bandwidth, it's much easier to achieve high ALU utilization. ATi's implementation is almost optimal, over 200 Gflop/s (out of 240 Gflop/s peak).

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prunedtree
The 8x8 block kernel in the original post uses only 26 float4 registers. There's clearly plenty of margin, so how much further can we go ? Well, it's possible to fit 8x10 blocks using the integrality of the register file. This is 11% faster in theory. It achieves 980 Gflop/s in practice, over 4 multiply-adds per cycle on average.

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MicahVillmow [AMD/ATi]
prunedtree,
Congratulations on improving on our algorithm for dense-matmat mul. It is very impressive to see that people can take our code developed on older hardware and improve it past its original design. The original code was developed on the R600 hence the 8x4 design and later optimized for R670 but the original design didn't change.

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And there is much more good information in that thread!

So ATi can do almost 1TF/s sustained on HD4870 vs. this new demo. Not that impressive. We don't know enough about Intel implementation and it's limitations, but we can be sure it's pretty well optimized as well.

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Originally Posted by kl0012

I think that the bigest advantage of Larrabee is its ISA so you don't need to deal with various proprietary APIs. Also its memory model (coherent caches, general purpose mem hierarhy) alows much higher flexability in code development.

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LOL... proprietary APIs? since when are OpenCL and DirectCompute proprietary for exclusively one GPU?

BTW to efficiently program Larrabee you'll need to learn how to use LRB instruction set and Larrabee's own High Level Programming Language...

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Originally Posted by Lightman

almost 1TF/s sustained

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OT: TF is teraflops, one trillion flops. Flops is one floating point operation per second, therefore there's no such thing as TF/s (floating point opertion per second per second?).

2-3x faster than a gtx280... fermi is supposed to be more than 2-3x faster than a gtx280 isnt it?
but lrb will cost 300-400$, while fermi will come at a hefty 2500$+... i really dont understand nvidias price positioning... they either think lrb wont be ready anytime soon for when fermi comes out, or they think it wont perform nearly as well as fermi... or they have their head in the clouds and the prices are a wish on their part... which is actually what it looks like... 2500 and 4000 sounds like what nvidia would like to sell their gpus for... i just dont see it happening in this time-space reality we currently exist in ^^

and i wonder about rasterization performance...
while its a big achievement for gpus to do double precision and do lots of flops, single or double, its easy for lrb to have a high flops number... the difficult part for intel is getting rasterization perf right... and im curious how itll do there...

cause lets face it, who here is gonna buy lrb to run some synthetic flops benchmark or run a gpgpu app? :D

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Originally Posted by saaya

cause lets face it, who here is gonna buy lrb to run some synthetic flops benchmark or run a gpgpu app? :D

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the same people who also use an nvidia card to cheat on 3DmarkV CPU scores?

Me! Seeing as I will be in gradschool when this tech is mature, I'd like to play with it for as long as possible ahead of time. I'm really interested in the API support, the price is an important issue that I've not seen anything about.

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Originally Posted by xoqolatl

OT: TF is teraflops, one trillion flops. Flops is one floating point operation per second, therefore there's no such thing as TF/s (floating point opertion per second per second?).

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Good catch :clap:
I deserve :slapass: for that :p:

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Originally Posted by xoqolatl

OT: TF is teraflops, one trillion flops. Flops is one floating point operation per second, therefore there's no such thing as TF/s (floating point opertion per second per second?).

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Can't we make it mean acceleration from 0 TF to x TF, kinda like in physics? :D

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Originally Posted by kl0012

Here it is:
http://www.theregister.co.uk/2009/11...ttner_keynote/



80 cores? Probably autor's mistake. But rather interesting is a 805 GFLOPS in SGEMM. As a reference point, Tesla (GTX280) hits 370 GFLOPS in the same task.

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Rattner isn't even speaking about Larrabee but about its 80 core research chip: :rolleyes:

Intel to unveil energy-efficient, many-core research chip
http://www.computerworld.com/s/artic...p?taxonomyId=1


Regards, Hans

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Originally Posted by Drwho?

here is what you need to know: Here
the rest is not important ...

Pommm pom pom pom

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is that supposed to be funny? :confused:
is it referring to something else? is it a parody?

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Originally Posted by Hans de Vries

Rattner isn't even speaking about Larrabee but about its 80 core research chip: :rolleyes:

Intel to unveil energy-efficient, many-core research chip
http://www.computerworld.com/s/artic...p?taxonomyId=1


Regards, Hans

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ha! journalism at it's best

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Originally Posted by saaya

ha! journalism at it's best

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indeed, so we are talking about polaris and not larrabee... wtf. :rofl:

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Originally Posted by kl0012

Here it is:
http://www.theregister.co.uk/2009/11...ttner_keynote/



80 cores? Probably autor's mistake. But rather interesting is a 805 GFLOPS in SGEMM. As a reference point, Tesla (GTX280) hits 370 GFLOPS in the same task.

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sounds like someone's gotten mixed up with the Polaris test chip

I remember seeing a video on this chip.

so what are the specs of this polaris chip? chip size and TDP?

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Originally Posted by Manicdan

so what are the specs of this polaris chip? chip size and TDP?

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Intel has a department called Terascale computing, basically Skunk Works of Intel.

There they develop and test concepts and products which will deliver TFlops of performance and TBs of BW. Polaris was basically an 80 core chip that was testing whether a 2D interconnect is able to scale to such core counts.
In other words, I/O is the bottleneck in many-core chips, not the core themselves.

Polaris isn't new, IIRC is was demoed back in 2007. It is 275mm square, 65nm burns 62w and reached 1 Tflop of performance. On chip data BW is 1,6 TBs with a 2D mesh.

polaris is basically a mentally challenged half brother of atom and grandfather of LRB :D
dont really understand why they were showing it off tbh... LRB would have been much more interesting...
i read this as bad news, sounds as if LRB is still not working properly? :/

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Originally Posted by saaya

polaris is basically a mentally challenged half brother of atom and grandfather of LRB :D
dont really understand why they were showing it off tbh... LRB would have been much more interesting...
i read this as bad news, sounds as if LRB is still not working properly? :/

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sounds like Polaris is Philip J Fry

i remember reading about this a few years ago, wondering if they were trying to mimic nvidia's gpu philosophy... i find it interesting that it is still a simple 80 core. iirc, the purpose of the chip initially was to develop inter-core communications for future many core designs. i also remember they had working silicon back then, so i wonder what has changed and why they would feel the need to demo the silicon now?

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Originally Posted by 570091D

i remember reading about this a few years ago, wondering if they were trying to mimic nvidia's gpu philosophy... i find it interesting that it is still a simple 80 core. iirc, the purpose of the chip initially was to develop inter-core communications for future many core designs. i also remember they had working silicon back then, so i wonder what has changed and why they would feel the need to demo the silicon now?

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Well maybe they made the cores more complex, the chip back in 07 had very simple cores, and was basically a co processor, not even that.

Now they could run a fully fleged benchmark on it.

Does Teo Valich changed his mind?
http://www.brightsideofnews.com/news...n-1h-2010.aspx

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During regular quarterly meetings with large OEMs, Larrabee was recently brought out and Intel's representatives stated that the part will surprise the competition with performance. Among other things, Intel re-iterated that the part is on track for introduction in very late first half of 2010, which would pitch the part in time for 30th anniversary of Computex Taipei 2010 [June 1-5].

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Also a few words from DreamWorks:
http://www.fastcompany.com/magazine/...m-machine.html

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DreamWorks is piloting Intel's new Larrabee chip. It will drastically improve the long rendering times required by the animation process: "It's going to change every single thing we do," says Katzenberg.

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n/m

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Originally Posted by Cybercat

Why, because they didn't demonstrate it at an HPC event?

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HPC is a relatively small market ATM and will stay so unless everybody goes cloud computing crazy. If they were confident of it's performance in rasterized 3D gfx then they would have demoed the thing at a consumer PC hardware event.

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Originally Posted by xoqolatl

OT: TF is teraflops, one trillion flops. Flops is one floating point operation per second, therefore there's no such thing as TF/s (floating point opertion per second per second?).

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it's how quickly your flop of a product accelerates...:rofl:

If LBR comes in Q1,2010 and fermi also comes in Q1 and 5950 also comes in Q1. 2010 may start of with PR stunts everywhere :)

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Originally Posted by xlink

it's how quickly your flop of a product accelerates...:rofl:

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Dude, that's a bad-azz sig bro... :up: