RD890/SB800 - Hydra Engine + independant clocks per core?

I didn't dare put this in news, as it's just my inferences...It brings some stuff to the forefront though that I think others may have been curious about.

First of all, I found myself in the device ID database, in ATI's device ID's. There you will see some interesting registries for RD890 that are not included in RD790.

Quote:

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Originally Posted by PCI Device Registry

5a10 RD890 Northbridge only dual slot (2x16) PCI-e GFX Hydra part
5a11 RD890 Northbridge only single slot PCI-e GFX Hydra part
5a12 RD890 Northbridge only dual slot (2x8) PCI-e GFX Hydra part

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http://pci-ids.ucw.cz/read/PC/1002

That's curious, isn't it? I wonder if RD890 will go the route of X58rev2 with a Lucid chip on-board with the ability to use it in single (ie 4870x2), 2x16, and 4x8 mode?


UPDATE: Read the Lucid Hydra .PDF and look at scenario 1.

I think it's safe to say RD8xx will have the option to have 2 card (4-gpu) MGPU SUPPORT MIXED AND MATCHED FROM ANY VENDOR. Hydra is an option or standard.







Then, as I was thinking about my curiosities about what the heck the optional "integrated clock generator" that's supposedly so great about SB800. We hear it gets better clocks from misc sources. WTF does that mean?

Well, the World Patent office says that AMD filed a patent for such 'techniques' on 11/27/08, a month ago...Curious.

It says on the front explaination:

Quote:

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Originally Posted by WIPO

A clock generator (622) includes a first circuit (812) and a second circuit (814). The first circuit (812) includes a first clock input configured to receive a first clock signal at a first frequency, a second clock input configured to receive a second clock signal at the first frequency, and an output. The second clock signal is out-of-phase with the first clock signal. The second circuit (814) is coupled to the first circuit (812) and includes a mode signal input configured to receive a mode signal. The output of the first circuit (812) is configured to provide a generated clock signal whose effective frequency is based on the first and second clock signals and the mode signal.

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and includes this pic:
http://www.wipo.int/pctdb/images/PCT...gz_en.x4-b.jpg

dug a little deeper and read this in the detailed description:

Quote:

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Originally Posted by AMD clock gen description

According to various embodiments of the present disclosure, a programmable clock generator is described herein that provides a generated clock signal having a relatively wide frequency range. The clock generator is configured to facilitate a frequency change in the generated clock signal (responsive to a mode signal) without requiring modification of a frequency of a clock signal (e.g., quadrature clock signals) provided by a phase locked loop (PLL) associated with the clock generator. The clock generator technique is particularly advantageous when employed in modern microprocessor systems that employ multiple clock domains, each of which may operate at a different frequency and may frequently change frequency in response to, for example, a power management state change. In this case, multiple clock generators (e.g., one for each clock domain) may be employed to facilitate independent and frequent change in operating frequencies of the clock domains.

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I don't know about you, but that sound/looks like four different clocks meeting to create one signal by the CPU. Yes, It can be used to regulate power/heat surely ala CNQ, but I can't help but believe also independently controlled via Overdrive. Sure as heck also sounds like one of those cores could also very-well be a GPU core in the future by the way it's phrased (remember this clock generator tech being important for FUSION?). I can't help but wonder if this is also the cure for when you have a great cpu, but are held back on stability by, let's say, one core, or heat is limiting the clock so you could downclock another core. Dynamic clock vs threading management perhaps also in the user's hands?

Today's phrase is "quadrature clock signals".

Even if is just my mind wandering aimlessly on a Monday night, it certainly makes me more curious about AMD's coming AM3 platform. I'm going to keep trying to wrap my head around it, you can check it out here:

Here Be Dragons

SYNOPSIS: You can clock each core seperately to achieve whatever your goal is (heat/power/high clockspeed on less cores/)

Of course, I could always be waaaay off.

thanks for the info. :up:.

Well...my wittle brain is spinning...there is for sure something going on here. Heavy reading for a Monday but I like it. Nice post. When you do get something wrapped around this please elucidate?

Spread it around, let's see what factoids we can deduce together, and perhaps translate into Layman's English for the inevitable bullet points @ The Inq. :welcome:

Hey Roofsniper, I have to ask:

Is your vacinity a coincidence? ;)

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Originally Posted by turtle

Hey Roofsniper, I have to ask:

Is your vacinity a coincidence? ;)

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hmmmmm?

A delightful little nugget to keep in mind when Hydra rears it's many heads.

Good eye.

I was just kidding around. I see that you live in the same place (Austin) as the three that filed the patent for AMD. :up:

Now this is how AMD is deciding to kick nVidia out of the chipset business? Eek!

So X58's "platform advantages" might be short-lived!

Very nice find, indeed. Thanks!
Looking into the clock stuff, but I'll respond to that later (hopefully) ;)

at least now since amd is designing it for both server and desktop they might put more work into it. :O although the 790fx + sb750 was pretty nice.

I think that it's a great way to circumvent Nvidia locking out SLI from AMD/ATi.

Even if they didn't, what's an SLI license these days?

On a side note:

I was always curious if the Lucid Hydra was a marketed version of the Project by the Stanford team funded by DARPA of the same name that does the same damn thing.. (I know...Stanford, Defense Dept., Israelian Company? CONSPIRACY!) That thing was supposedly 88mm2 at 250nm according to one of their PDF's...and remember that Hydra is hidden under a nice heatspeader so we don't know how big (small) it is or how many trannies it has. Think about how small that would be on a current process. At 55nm it'd probably be like 20mm2 tops. Someone (please not Intel) needs to buy (please not Intel) them and incorporate that (Please not Intel) into the core logic of their (hopefully not Intel's) chipset.

lol DARPA. i remember those guys in mgs1. :)

Hey, read this PDF and look at scenario 1 and read the markebable™.

http://www.lucidlogix.com/files/hydr...duct_brief.pdf

Well, that explains the 2x16 and 2x8 don't it? :D

hmmmm i like the fact of having that chip on a multi gpu video card. throw one of those on a 4870x2 and see if it improves performance.

No doubt that it would, but the point of the single PCI-E slot to Hydra device ID must mean that Hydra bypasses whatever onboard-crossfire does, essentially creating the same ending through a means that is more versatile (having it on the motherboard).

If hydra could either combine gpus (on a single card) into one signal or allow for more than 4 gpus, you could have some interesting combos. Four four core cards running through 5 hydra chips (1 on each card, 1 on mobo)? But now we're getting ahead of ourselves. 100TF Home PC's will have to wait. :(

... a couple years. :D

i think two core cards is as far as its going to go. if they want more than two cores on one card they are going to have to make a multi gpu core.

Hydra works as a rendering-work scheduler, and as such can use any rendering device capable to do it's needed tasks. CTM and CUDA make this fully possible, as this allows direct-hardware access, allowing the software-level conflicts to be avoided.

It's quite ingenious, actually.

Add in Sideport, and you could use a 4870x2 as a single device, with a single frame buffer. Microstutter be damned. :fact:


:sofa:

Quote:

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Originally Posted by cadaveca

So...because it only supports 2-card SLi, can you do both Crossfire and SLi at the same time, choosing which set of cards renders which app, so users can get the most out of each app?

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Screw SLi. :yepp:

Hydra Engine, add in RD890 or add on main ?

The way they say it, it seems like Hydra is quite integral for RD890.

When they even want to use it for single slot, it might be a tight bundle or even built in. If so, AMD gets to boast having the best platform for graphics because it's all unified down here.

It would be VERY hard for say, something like Core i5, since the PCIe controller is built into the CPU.

So I'm guessing this would make hybrid crossfire an actually compelling deal with this chipset. Hopefully not requiring vista.

I'm excited now, seems I chose the right time to get back into the whole kustom pc scene :D

Great find Turtle!

For me this super clockgen sound very familiar to SB750 ACC. It could be it's second incarnation with wider application, like for instance GPU/CPU cores?

As far as I know ACC is a novel way of clock skewing (it's not a degratory term unlike what shills like to term it), nothing to do with clockgen.


Rage3D had a 790GX article where they said SB700/750 addresses some issues concerning stability, while ACC skewing was added as a side project.

Quote:

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Originally Posted by Macadamia

As far as I know ACC is a novel way of clock skewing (it's not a degratory term unlike what shills like to term it), nothing to do with clockgen.


Rage3D had a 790GX article where they said SB700/750 addresses some issues concerning stability, while ACC skewing was added as a side project.

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But I've read somewhere that SB750 had integrated clockgen and that's why you can get much more stable OC plus going below zero on SB750 boards is easier due to less coldbug. All that thanks to external clock from SB.

But I might be wrong and info I've heard was about SB800 ...

EDIT:
I found this bit of info:

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Now its clock generator is fixed and AMD has bolted on RAID 5 into the mix, AMD now (finally) has a southbridge to match the competition. AMD's USB performance has also been notoriously weak and the company has maintained that this has been improved through SB700 and now SB750. We put this claim to the test very soon.

First Look: AMD 790GX IGP and SB750 AMD 790GX and SB750: What's New?The most interesting feature of the southbridge is its new Advanced Clock Calibration feature. Unfortunately we can only allude as to what this does technically because AMD hasn't yet told us specifics, although from the name we can obviously tell it's a new embedded controller that keeps the clock generators in sync as the clock speeds are changed out of spec when overclocking.

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http://www.bit-tech.net/hardware/200...gp-and-sb750/2

It doesn't say what this clockgen is supposed to do. It can be to drive USB clocks, or PCIe, but I doubt it. It's more likely these are driven from motherboard quartz and NB part (maybe expect USB, SATA, IDE). Anyone with experience designing motherboards??

Fusion?:shrug:

Nice find.

There's only one thing, I hope RD890 is going to be great. Whether this new patent clock gen is going to be used or not, I dont know. If they use it, I really dont hope we've to wait 6 months again for a SB850 because SB800 turned out to fail just due to the clock gen.

But... I think AMD learned its lesson from SB600~SB750 pretty much, so I dont expect to see that happening anytime soon. But you never know, I just dont hope so. Im seriously planning to get a RD890 motherboard, but plese, let it work good:D

Quote:

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Originally Posted by Rammsteiner

Nice find.

There's only one thing, I hope RD890 is going to be great. Whether this new patent clock gen is going to be used or not, I dont know. If they use it, I really dont hope we've to wait 6 months again for a SB850 because SB800 turned out to fail just due to the clock gen.

But... I think AMD learned its lesson from SB600~SB750 pretty much, so I dont expect to see that happening anytime soon. But you never know, I just dont hope so. Im seriously planning to get a RD890 motherboard, but plese, let it work good:D

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I agree - that delay really hurt AMD imo, esp. coming right off the heels of the TLB disaster.

No way I would have used the 600 series SB. I'll be getting onboard the Phenom II train soon unless the Opterons with HTT 3 come out at a really low price (doubtful).

This all sounds like good stuff coming. Now I hope they can execute flawlessly.

Well, that patent proved somewhat insightful to read.

Basically what it's describing is a system for controlling multiple clock domains with those quadrature based clock generators (basically an adjustable frequency divider) and a single Phase Locked Loop to feed them with a reference quadrature clock pair (representable as a complex signal if you so wish :p:).
- (ie. system's reference clock -> main PLL -> main quadrature clock pair output [ideally two square waves 90deg out of phase] -> each domain's quadrature clock generator [controlled by a fairly simple state machine] -> clock domain's clock)

This is instead of doing something that involves adjusting multiple PLLs, so having a main PLL, plus one for each clock domain.
- (ie. system's reference clock -> PLL [managed by the Power Management Controller] -> adjusted main clock signal -> each clock domain's PLL [managed by the PMC] -> clock domain's clock)

Summed up, it essentially provides a finer grained approach to power management, while being pretty straight forward in implementation and more flexible than the prior. As instead of having to deal with adjusting the PLL dividers and the fairly significant wait-time while they lock back on, it's possible to just leave the main PLL alone and generate each clock domain's clock off of it independently with one of those quadrature clock generators, giving a much smaller lag time when switching power/frequency state.

Also, by using these clock generators it's possible to have a pretty good range of output frequencies; in the document it mentions such values as ref_value * .5, .75, 1, 1.25, 1.5, 1.75, 2, ..., 3, ..., 4, ...
What's also interesting is they have a diagram(Fig. 5) that shows an example system with a separate memory(DDR2) domain, along with some discussion about it in the document ([0044]-[0046]), which makes me wonder how adjustable the memory frequency can be, of course along with everything else. It definitely seems like a good system to handle the expanding number of clock domains that'll be present on a single chip in the future, like with fusion as the OP mentioned.


Hopefully I didn't go too in depth on things, spent long enough reading and trying to type all this out...
Now the question is when this will be implemented(has it already?) and how far we'll be able to tweak it, since the prospect of more adjustable parameters is always welcome :yepp:

Do we have any more evidence backing all of this up?

now if only web journalists would be so insightful as our members...

...then there wouldn't be as insightful members here anymore which this forum needs more of.

Well the Hydra engine seems to be true (first out on Intel x58 smackover), with Lucid Hydra having one of the main sponsors being: Intel

I can't find the article but it seems RD890 will support 4 x PCI-E 2.0 x16, unlike todays RD790(790FX) which can "only" support 4 x PCI-E 2.0 x8 or 2 x PCI-E 2.0 x16.

Iam definatly getting a AM3 platform when RD890 and SB800(SB850?) is out, atm DDR3 just seems to be a waste for AMD systems.

Quote:

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Originally Posted by Smartidiot89

Well the Hydra engine seems to be true (first out on Intel x58 smackover), with Lucid Hydra having one of the main sponsors being: Intel

I can't find the article but it seems RD890 will support 4 x PCI-E 2.0 x16, unlike todays RD790(790FX) which can "only" support 4 x PCI-E 2.0 x8 or 2 x PCI-E 2.0 x16.

Iam definatly getting a AM3 platform when RD890 and SB800(SB850?) is out, atm DDR3 just seems to be a waste for AMD systems.

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yep you are on the same boat as me. im only getting ddr3 once rd890 and sb800 come out. no reason to spend money to get only 1% off ddr3.

Sounds like this is going to mark the "real" AM3 launch to me...forget these recycled 790FX/SB750 boards with DDR3 tacked-on we're seeing now.

New NB/SB combo with this fine clock control, Lucid Hydra and DDR3...now that's much more appealing.

Quote:

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Originally Posted by the pharaoh

Sounds like this is going to mark the "real" AM3 launch to me...forget these recycled 790FX/SB750 boards with DDR3 tacked-on we're seeing now.

New NB/SB combo with this fine clock control, Lucid Hydra and DDR3...now that's much more appealing.

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yea amd never hits hard first they always release their first wave and then hit hard with the second. seems like that plan might not be working. rd890 + sb800 + 3.5ghz or better phenom II + ddr3 is where it is at. anyone got any more info on rd890? i haven't seen a thing.

this thread got virus?

Quote:

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Originally Posted by roofsniper

yea amd never hits hard first they always release their first wave and then hit hard with the second. seems like that plan might not be working. rd890 + sb800 + 3.5ghz or better phenom II + ddr3 is where it is at. anyone got any more info on rd890? i haven't seen a thing.

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http://www.fudzilla.com/index.php?op...11953&Itemid=1

Not much, but AMD has promised proper DDR3 support and we'll see what miracles the new southbridge can perform

yes but thats fud. they say its coming with sb850 which i always thought it was sb800 since there is no sb800 yet:confused: and i thought it had 4x16 pcie lanes and last time i checked its still set for q3.

Quote:

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Originally Posted by roofsniper

yes but thats fud. they say its coming with sb850 which i always thought it was sb800 since there is no sb800 yet:confused: and i thought it had 4x16 pcie lanes and last time i checked its still set for q3.

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First Q3, then AMD said Q2, now it will be late Q3/Q4.

Fudzilla is a reliable source, you just need to use your head and look past the bull:banana::banana::banana::banana: they sometimes post :P

HYDRA is the codename for AMD 8-core opteron server cpus.

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Originally Posted by w0mbat

HYDRA is the codename for AMD 8-core opteron server cpus.

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AMD kind of set themselves high with "Dragon". I can't think of a better creature besides "Human"

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Originally Posted by w0mbat

HYDRA is the codename for AMD 8-core opteron server cpus.

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Was hydra supposed to be a native 8 core shrank(32nm) Shanghai chip?Or was it planned to be a MCM of 2 45nm QCs?
I've done some "guesstimations" on my own :).In the same space of the 6Mbs of L3,on the 32nm process,AMD can cram in ~20-24MBs of L3 provided the 0.49x scaling as in previous node transitions.Also the cores would be a lot smaller so the whole chip with 8 cores and 2MBs L2 per core(taking the smae die space as present 512KBs per core) and with that massive L3 would be the same die size or even smaller than Shanghai.Plus,they can do "smaller" six core part,a direct shrink of Istanbul(45nm) and cram the two shrank 6 core 32nm Istanbuls(~160-180mm2) on MCM. AMD will need to bring 32nm in Q2 of 2010 in order to fight Westmeres and Becktons,but it's not impossible.

Quote:

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Originally Posted by w0mbat

HYDRA is the codename for AMD 8-core opteron server cpus.

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there are sites that would love to spin their counters on this piece of news! ;)

The original plan for AMD's Hydra from back in May 2008: http://www.warepin.com/amd-hydra-octo-cores/

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Looks like AMD finally realized that Nehalem is a serious competitor for the K10.5 CPUs. In this sense, after Deneb and Propus 45nm K10.5 Quad-cores AMD wants to change the process and improve the existing K10.5 cores.

The future process is called 45nm K10.5 Rev. D and it will bring the High K gating technology developed with IBM’s aid to 45nm SOI cores. As you have already intuited, the K10.5 Rev. C is the 45nm SOI process that AMD is supposed to use with the upcoming Deneb and Propus 45nm cores. AMD also came up with the Hydra codename for the Rev D cores, which seem to be the true response to Intel’s Nehalem.

The K10.5 Rev. D introduces 1MB L2 per core, which is twice as much as in current K10 CPUs, plus 6MB L3 cache memory. The Hydra CPUs are set to include at least eight cores, most likely coming in eight-core native design and not the recently announced MCM (Multi Chip Module).

Hydra CPUs are expected to easily hit +3GHz clock speeds in standard mode, but AMD will hopefully allow for fair overclocking potentioals.

That said, Nehalem will probably hold the crown for at least six to nine months before getting a real competitor. This is because AMD is rolling the Hydra CPUs sometime in mid 2009 or even later.

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So it seems AMD's Octo Core was supposed to come with K10.5 Revision D silicon and challenge Nehalem in the 8-thread arena. Heh, woulda been nice. Hopefully we'll still get Rev. D AM3 quad cores that we can clock to high heaven this year.

hkmg and larger l2 caches might come this year but amd with 8 cores seems unlikely. isn't istanbul set for late q4?

Yeah,the article is a bit wishfull thinking on teh author's part(seems like fudzilla piece hmm).
Anyhow,RevD is a 32nm thing IMO. It doesn't mean we get nothing with 45nm :).We get an improved Deneb/Shanghai (process wise;we see this in chew's results already!) and we get a 6 core native beast in Q4! Not bad at all if you ask me :).
Then sometime in 2010 we will have 32nm SOI shrink of Deneb/Shanghai line extended with native 6+ core parts(6/12 core MCM on servers). 2011 is a Bulldozer thing and maybe this is the true Hydra :).

oroochi is a bulldozer core that's the desktop part. that is 4 core slated for 2011.
this is wishfull thinking. If is dose trun true dose the mean AMd is play jump the tick and jump the tock lol
you forgot MCM montreal which could easiy be lowered voltage shanghai to 1.25 volts sitting in a MCM package at 3.0ghz would only use 150 watts.