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Hi,
New steppings are now available.
Yorkfield C1 went for E0 stepping, Wolfdale M0 went for R0.
E0 introduces new power states (C2E, C3, C4 called as Extended Stop Grant State, Deep Sleep State, Deeper Sleep State), changes in PECI implementation, new two instructions added, halide free package and some other minor changes as well.
OC abilities atm unknown :D
J.
*Hopes for higher FSB with Yorkfields*
i think its a bit too early to expexct a G0 like revision for the 45nm technology just yet
if you know how to make it with GTL it is easy ... my Q930 works rock stable at 500MHz FSB ...Quote:
Originally Posted by xoqolatl
Fudzilla say R0 for Yorkfield:
http://www.fudzilla.com/index.php?op...7509&Itemid=35
dont understand why intel changes the steppings,
M0 isn't realy available on market and C1 is also very new
o rly? Wonder when we'll see some results with these.
Same here.Quote:
Originally Posted by xoqolatl
But i think that the origin of the FSB problems is not, only, the CPU, and maybe a CPU + Chipset + Noob skills@OC (me included) mix.
what's happening to C0 wolfdale (E8xxx series)
M0 Wolfdales are E7xxx series chips
M0 i have here (E7300) does not like 965 chipset at all.... 480MHz MAX FSB :shocked:
but my Gigabyte X38 board goes to 520Mhz FSB while Asus X38 is strangely limited to 480 as well :(
just a guess: optimising yields or other variables that are important to them.Quote:
Originally Posted by Kabauterman
and afaik they are not available merely because Intel is fab-capacity constrained at 45nm and serving high-asp markets first (server, laptop).
Though, I don't even know what such an early revision is good for? Anyone enlighten us?
Bah, just bought a E3110 C0, i hope these clock worse then :D
Choose is always yours - quit XS, use your PC, take your time well!Quote:
Originally Posted by nullface
Or bother your mind if C0 is worse than E0 :ROTF:
Seriously, i'm getting mentally older latelty :-)
I just emailed Tankguys asking if they will stock them as they seem to be rather good at stating what stepping CPus they have and they also guarantee a stepping.
We're working on it ;)Quote:
Originally Posted by Richard Dower
Hehe! :DQuote:
Originally Posted by TankGuys
Epic win....Too bad i just RMA'd my Q9450 not less then a few days ago and got a older C1 stepping....
already posted it a week ago, but not here on the news... its HERE
so, again, the real info on Intel's documentation:
some news to future E8400/E8500 or E3110 owners
New stepping E-0 C2D are already sampling, and will be out sometime LATE August.
Quote:
Originally Posted by Intel Documentation dated 22/5/08
Interesting Marlboro...thanks, explains alot more....i guess we might see a PCB revision then to support that PSI feature. Perhaps Asus and GB will be the first to implement the changes in PCB design. So is there no news on the Quad core stepping change?
For the quads, only Xeons series X/E/L5xxx that I know for now.
The xeons quads E-0 stepping consume less power (has lower TDP) than the C-0 ones. I don't know by now if this applies to desktops C2Q.
Just had a new X3350 shipped direct from Intel (technically it made a stop in Vancouver first), maybe i'll get lucky! :o
Tank Guys #1
if it isn't an ES chip = its not an E-0 ;)Quote:
Originally Posted by STEvil
Darn :/
thanks for the update MarlboroMan
so E0 is next
i wonder if they will still like 965 chipset for high FSB or even better some of the newer ones hehehe
does this mean that these are slightly faster?Quote:
Originally Posted by pmp
damn it i just bought an e8400:( it should be here this week.
Both my q9300`s are stepping 7 revision M1, whats the newest revision/stepping on those?
I wonder when they'll come up with a power state designated "C0M4" - a power state so deep that once the chip enters C0M4 there's no way to tell if it'll ever recover.
http://largon.wippiespace.com/smilies/lol.gif
So what do the experts say? When you look at the spect's, is it worth it to step up to a "New" E3110 form an "Old"?
Or are the changes so minor that noone will ever notice what rev. they have?
I'll help clear this mud up a bit.
C and E steppings refer to the Penryn product with 6MB of cache.
M and R steppings refer to the Wolfdale product with 3MB of cache.
The changes from C --> E and M -->R are equivalent and are pretty much the same changes just on the 2 different products.
Revision changes are done most of the time to iron out bugs and make manufacturability changes that lead to higher yields and better binning flexibility.
The stepping change was done to add in some features that have been developed but weren't quite ready at release time of the original design.
hi mate
what can overclockers expect from these new steppings
are they addressing any FSB related "issues" :D
i know intel probably doesn't give much of a hoot but worth asking hahah as i remember how good some of the 65nm revisions were but we may not be there just yet to have that G0 type revision just yet :)
I think I saw something that might help with MCM'd yorkies FSB stability in C-3 which probably got ported to E as well, but I really have no clue:p:Quote:
Originally Posted by dinos22
I've also noticed that P45 chipset helps quads with FSBQuote:
Originally Posted by Blauhung
the real interest to me is dual cores as high MHz particularly after some new technologies are coming out and porting some very intensive workload go to GPU where they are more efficient such as video encoding & most older benchmarks are still more efficient with high FSB dual cores
Not really. only if the code actually uses those instructions, which is very unlikey except in certain special apps, which I think aren't so mainstream. ;)Quote:
Originally Posted by Monkeywoman
I'd meant to thank you for this info:up:Quote:
Originally Posted by Blauhung
Which of the following feature are already implemented on C1 stepping quad core chips such as the Q9450?:
Description of Change to the Customer:
The Intel® Core™2 Duo Processor E8500, E8400 and Dual-Core Intel® Xeon® Processor E3110 will
undergo the following changes for the C-0 to E-0 stepping conversion:
• New SSpec and MM numbers for the converting products
• CPUID will change from 0x10676 to 0x1067A
• Power Status Indicator (PSI) is supported
• PECI implementation change
• New instructions added – XSAVE/XRSTOR
o New ISA extension for save/restoring context of x87, SSE, and future processor state
• New feature added - ACNT2
o Improved mechanism for determining processor utilization. To be used for more efficient
P-state determination.
• Package change to Halide free package
Reason i ask this is that i see Gigabyte have implemented the C2E/C4 power stats in there P45 bios, in addition they state that:
"Dynamic Energy Saver Advanced
GIGABYTE Dynamic Energy Saver Advanced provides better energy saving capabilities and enhanced system performance. GIGABYTE Dynamic Energy Saver Advanced is the world’s only motherboard energy saving technology with hardware-based Dynamic 6-Gear* Switching. With support for VRD 11.1, GIGABYTE’s DES Advanced allows the motherboard to switch to 1 Gear phase switching during idle, allowing for a dramatic increase in power savings.
GIGABYTE has also retooled Dynamic Energy Saver to allow overclockers to experience the benefits of multi-gear power phase switching while overclocking, providing ultra stable, ultra smooth overclocking performance.
* The 6-Gear feature may vary by model. Gear 1 phase switching requires 45nm processors with PSI signal enabled."
So my question is does the Q9450 have this PSI signal enabled?
E-step conversion is happening on most of the current C-stepping Yorkfield processors sometime in mid Q3, per my contact @ Intel.
Does that mean Wolfdale is later Q3 or Q4?Quote:
Originally Posted by TankGuys
Thanks