Nehalem Info from hkepc

There is quite a bit of info about Nehalem at hkepc
http://www.hkepc.com/?id=568&page=1#view
Translated
http://translate.google.com/translat...&hl=en&ie=UTF8

http://img81.imageshack.us/img81/227...9263580iw9.jpg

http://img81.imageshack.us/img81/872...1167163ft2.jpg

http://img219.imageshack.us/img219/4...6356598xy6.jpg

http://img219.imageshack.us/img219/3...2014392in1.jpg

http://img219.imageshack.us/img219/3...4353992cg4.jpg

http://img86.imageshack.us/img86/671...7042012jx1.jpg

http://img86.imageshack.us/img86/345...5390143kd0.jpg

Socket 1160?

They said a new socket would be introduced for Nehalem with the IMC and the new transport bus

:slobber: :eek2:


Good GRAVY that's some impressive specs.

Quote:

---

Originally Posted by Mad1723

They said a new socket would be introduced for Nehalem with the IMC and the new transport bus

---

yup...

and its two in the roadmap because one of them is the desktop one and the other for servers....

skulltrail uses the server socket, so i bet the 1366 is the new server socket and is on that dsktop roadmap because skulltrail 2 (or whatever they will call nehalem version of it) will use server socket aswell.

and then the 1160 as the regular desktop socket.

Is bearlake-x the x38 and x48 motherboards? So if they use different sockets for the high end and mainstream, they can price discriminate much better.

ATM you can use pretty much any lga 775 chip in an x38 board. If they differentiate sockets, that cant be done in the future with the high end motherboard.

just looks like a penryn with IMC and less cache plus a pci-e controller, doesnt look that spectacular if you ask me, it will be good cpu, thats for sure, but not such a big step forward as conroe was over prescott.
Looks good.
desktop platform only in 2009, i was expecting that one
Q2 for fusion like thing,sounds plausible.

Looks good:D

Ohh I like...30% less power than Penryn on the same process for the same performance. Thats pretty kickass when looking on Penryns already very very low usage.

Some promising claims.

one thing stood out for me there is the native displayport/ HDMI compatibility

looks to me like a very powerful, low noise, low power media pci would bet they underclock really well also

i may buy the cheapest one on release :-)

whats the estimate on these?

I surely hope no one puts the 2x12 plug where the reference board design has it :rolleyes:

Quote:

---

Originally Posted by Thund3rb1rd

I surely hope no one puts the 2x12 plug where the reference board design has it :rolleyes:

---

QFT

and move the cpu socket a bit towards the backpanel to increase the spacing between cpu cooler and ram slots...

well, atleast they will kill the ancient ide and floppy connectors

Quote:

---

The information contained herein has been obtained from sources BELIEVED to be reliable

---

Need we say any more? They make it LOOK official but in the end, it is the same old HKEPC with a new slogan. ;)

Quote:

---

Originally Posted by GoThr3k

just looks like a penryn with IMC and less cache plus a pci-e controller, doesnt look that spectacular if you ask me, it will be good cpu, thats for sure, but not such a big step forward as conroe was over prescott.
Looks good.
desktop platform only in 2009, i was expecting that one
Q2 for fusion like thing,sounds plausible.

---

You are forgetting that each core can now run two threads. That's a significant step in and of itself.

awesome looking forward to the future of cpu's :)

Quote:

---

Originally Posted by GoThr3k

just looks like a penryn with IMC and less cache plus a pci-e controller, doesnt look that spectacular if you ask me, it will be good cpu, thats for sure, but not such a big step forward as conroe was over prescott.
Looks good.
desktop platform only in 2009, i was expecting that one
Q2 for fusion like thing,sounds plausible.

---

Don't you mean Timna like feature since that's where AMD got the idea for Fusion from LOL!:rofl: :ROTF:

Quote:

---

Originally Posted by Yakyb

one thing stood out for me there is the native displayport/ HDMI compatibility

looks to me like a very powerful, low noise, low power media pci would bet they underclock really well also

i may buy the cheapest one on release :-)

whats the estimate on these?

---

I hope so!

130w for bloomfield? .... ready the LN2 for home use

Yay for the return of HyperThreading. Oh how I have missed thee :yepp: Otherwise Nehalem looks decent, I just hope DDR3 prices continue to drop otherwise it'll be a rough adoption.

Quote:

---

Originally Posted by GoThr3k

just looks like a penryn with IMC and less cache plus a pci-e controller, doesnt look that spectacular if you ask me, it will be good cpu, thats for sure, but not such a big step forward as conroe was over prescott.
Looks good.
desktop platform only in 2009, i was expecting that one
Q2 for fusion like thing,sounds plausible.

---

yeah not impressive at all :D
10-25% single threaded improvement over the best existing x86 CPU out there and 20-100% for multi threaded software.
It's not a new conroe, at least for desktop, but server...

Quote:

---

Originally Posted by Origin_Unknown

130w for bloomfield? .... ready the LN2 for home use

---

Which one, that one most AMD users with slight overclocks are using now LOL!?

Quote:

---

Originally Posted by Donnie27

Which one, that one most AMD users with slight overclocks are using now LOL!?

---

the one on the processor family sheet.

lets not turn this into an amd bashing thread ;)

Quote:

---

Originally Posted by [XC] gomeler

Yay for the return of HyperThreading. Oh how I have missed thee :yepp: Otherwise Nehalem looks decent, I just hope DDR3 prices continue to drop otherwise it'll be a rough adoption.

---

As DDR3 becomes mainstream, the prices will drop. Look at where DDR2 started not that long ago? Intel will put up the Seed money just as they alone did for DDR2.

Quote:

---

Originally Posted by Origin_Unknown

the one on the processor family sheet.

lets not turn this into an amd bashing thread ;)

---

Dewd, it was a joke see the ";)".

I wouldnt worry about DDR3 prices some 9-10 months from now. They will be very close to DDR2 prices.

nvram is connected via the external chipset :confused:

Well, how about that. 192bit (trichannel) DDR3...

Say hello to near-20GB/s memory bandwidths and DDR3 trikits from every DIMM builder out there.

how is DDR3 on Bloomfield directly connected to CPU? I see anything else on picture ...

Quote:

---

Originally Posted by OBR

how is DDR3 on Bloomfield directly connected to CPU? I see anything else on picture ...

---

Hmm? There is no Bloomfield picture. But it contains 3 DDR3 channels on the IMC.

Quote:

---

Originally Posted by saaya

nvram is connected via the external chipset :confused:

---

NVRAM is perhaps not the best word. Think flash.

Its already today connected via the southbridge. Either via some direct link or via USB/PCI/PCIe/SATA in the form of TurboFlash or iRAM etc.

Great info leomax :up:

Story submitted to the XS front page.

Quote:

---

Originally Posted by Origin_Unknown

130w for bloomfield? .... ready the LN2 for home use

---

Not sure why you say that? My wife has a Dell Otiplex with it Prescott 670 (3.8GHz) which has a TDP of 115W. http://processorfinder.intel.com/Det...px?sSpec=SL7Z3

No it's not OC'd but her computer is very quiet and hasn't over heated in 2 years of use (including extended 100% loads while encoding video).

XS OC'ers need LN2 regardless of TDP, but the average user (even a non-OC'ing power user) can easily get proper cooling for 130W. Also, the Bloomfield chips will have their own socket LGA1366. As such, they most likely will have a completely difference reference board design.

Quote:

---

Originally Posted by Origin_Unknown

130w for bloomfield? .... ready the LN2 for home use

---

exact same tdp as the QX9650

Only thing that surprises me is only 1.1x-1.25x on single threaded improvement? That means we won't being seeing that much of an increase except for multithreaded tasks, which is nice, but I was hoping for a big increase all around

Quote:

---

Originally Posted by AliG

Only thing that surprises me is only 1.1x-1.25x on single threaded improvement? That means we won't being seeing that much of an increase except for multithreaded tasks, which is nice, but I was hoping for a big increase all around

---

x86 cant improve much anymore. And thats basicly what we see again and again. Core 2 was roughly 20% faster than Core and Athlon.

Also why we have the multicore race after the ended gigahertz race.

Thats the penalty of a 30 year old design. If it wasnt for shrinks we would be seriously stuck.

So 10-25% is ALOT. AMD people should know :p:

Quote:

---

Originally Posted by Shintai

NVRAM is perhaps not the best word. Think flash.

Its already today connected via the southbridge. Either via some direct link or via USB/PCI/PCIe/SATA in the form of TurboFlash or iRAM etc.

---

why do they call flash memory nvram? :confused:

and tri channel mem is confusing...
the board has 4 slots... so... hows it supposed to work? :confused:

complaining about the 130 tpd ... why the p4 EE used to suck more out of the wall outlet and that was a frikkin single core and way less efficient as this one.
i'm more interested in how much the normal dualcore's will use. It wont be that much i hope.

btw shintai ... good point ;)

Quote:

---

Originally Posted by saaya

why do they call flash memory nvram? :confused:

and tri channel mem is confusing...
the board has 4 slots... so... hows it supposed to work? :confused:

---

because it is nvram (non violent ram )(Non-volatile random access memory (NVRAM) is the general name used to describe any type of random access memory which does not lose its information when power is turned off.)
atleast that's what i think

Quote:

---

Originally Posted by Shintai

Ohh I like...30% less power than Penryn on the same process for the same performance. Thats pretty kickass when looking on Penryns already very very low usage.

---

Don't assume that 30% reduction only comes from the cpu, i think they formulated chipset power usage as well.

Different socket between high end and performance? Bleh.
Unless LGA1366 is for the dual socket enthusiast platform...

Otherwise Nehalem looks like it's FTW!

Quote:

---

Originally Posted by Shintai

I wouldnt worry about DDR3 prices some 9-10 months from now. They will be very close to DDR2 prices.

---

Yep, once DDR3 becomes the memory standard (for Intel platforms anyway) the prices are sure to drop significantly :up:

Quote:

---

Originally Posted by saaya

and tri channel mem is confusing...
the board has 4 slots... so... hows it supposed to work? :confused:

---

It is NOT a bloomfield board layout. Bloomfield chipset would also be southbridge+northbridge.

It is a board for the Lynnfield/Havendale CPUs with only 2 channels.

3Channels is only for servers and extreme CPUs.

Quote:

---

Originally Posted by Zytek_Fan

Different socket between high end and performance? Bleh.
Unless LGA1366 is for the dual socket enthusiast platform...

---

Its the same as LGA771 vs LGA775. The Extreme editions will then be like the LGA771 and for DP etc. But yes, Extreme+server and performance+value and incompatible between.

Quote:

---

Originally Posted by RedBull78

Don't assume that 30% reduction only comes from the cpu, i think they formulated chipset power usage as well.

---

And the change is? For me its still 30% less power. even tho 5 or 10% may come from a chipset.

I really dont care about where its saved. Just that it is saved.

Quote:

---

Originally Posted by Shintai

And the change is? For me its still 30% less power. even tho 5 or 10% may come from a chipset.

I really dont care about where its saved. Just that it is saved.

---

We will finally say goodbye to the heatpipe madness :D

Quote:

---

Originally Posted by Zytek_Fan

We will finally say goodbye to the heatpipe madness :D

---

I´m afraid, that's impossible, you'll see :down:

Quote:

---

Originally Posted by AliG

Only thing that surprises me is only 1.1x-1.25x on single threaded improvement? That means we won't being seeing that much of an increase except for multithreaded tasks, which is nice, but I was hoping for a big increase all around

---

Single threaded performance is already very strong on Penryn, Core 2's biggest weakness is still multithreaded performance, in terms of per core scaling it does worse than K10. So I'm glad Nehalem addressed this weakness, whilst being able to get a substantial boost in single threaded performance as well.

Besides, as Shintai said, now that the MHz race is over, it's time for the core race. Multithreading is the future, and Nehalem with an IMC and HT should prove a monster in this regard.

waiting for penryn prices to drop like a rock so I can afford a quad with a 9x multi

Quote:

---

Originally Posted by saaya

why do they call flash memory nvram? :confused:

and tri channel mem is confusing...
the board has 4 slots... so... hows it supposed to work? :confused:

---

Not so sure the End Product will ship with 4 slots, wouldn't be the first time the shipping product looked different than Early boards. I'd expect them to ship with 3 or 6 slots. Server boards with 9 instead of 8.

Quote:

---

Originally Posted by Epsilon84

Single threaded performance is already very strong on Penryn, Core 2's biggest weakness is still multithreaded performance, in terms of per core scaling it does worse than K10. So I'm glad Nehalem addressed this weakness, whilst being able to get a substantial boost in single threaded performance as well.

Besides, as Shintai said, now that the MHz race is over, it's time for the core race. Multithreading is the future, and Nehalem with an IMC and HT should prove a monster in this regard.

---

Please explain Core 2's biggest weakness again?

Quote:

---

Originally Posted by Donnie27

Please explain Core 2's biggest weakness again?

---

The FSB between 2 dualcores on a quad and the FSB to link memory+I/O.

Then why don't intel and amd dump x86 and use whatever IBM's using? Makes a lot more sense than trying to max out way outdated technology, I mean that's like keeping with netburst instead of moving with conroe (which thankfully intel did not do, but its time for a change imo)

Quote:

---

Originally Posted by Shintai

The FSB between 2 dualcores on a quad and the FSB to link memory+I/O.

---

Since that's taken care of with nehalem's integrated memory controller and csi, then what else can really be done with x86?

Quote:

---

Originally Posted by Shintai

The FSB between 2 dualcores on a quad and the FSB to link memory+I/O.

---

He said "Core 2's biggest weakness is still multithreaded performance, in terms of per core scaling it does worse than K10." Had he said Per Socket, I have not asked that Question. Thanks!

Single Socket Core 2 Duo or Quad hasn't really shown any "weakness" per core. Or Did I miss something, again:confused:

Quote:

---

Originally Posted by AliG

Then why don't intel and amd dump x86 and use whatever IBM's using? Makes a lot more sense than trying to max out way outdated technology, I mean that's like keeping with netburst instead of moving with conroe (which thankfully intel did not do, but its time for a change imo)

---

IBM is using utter crap too to say it mildly. PPC aint the future.

My best bet currently of whats avalible would be IA64, and no its just not because its Intel.

Else something alike it or completely new. Specially an architecture that can scale well in execution units. Now Core 2/Nehalem is 4 issue wide. IA64 as an example can scale to 11 issue wide and maybe more.

The only single issue there is stopping all progress is. Compability!
Same with software, Microsoft is dead scared to lose compability so we have so much extra baggage always.

We basicly just need a fresh start in both CPU arch and software to leap ahead instead of doing very small steps towards the dead end.

Quote:

---

Originally Posted by mstp2009

You are forgetting that each core can now run two threads. That's a significant step in and of itself.

---

I can run two threads at once! One about the inc alien invasion, and one about foil helmets!

Quote:

---

Originally Posted by Donnie27

He said "Core 2's biggest weakness is still multithreaded performance, in terms of per core scaling it does worse than K10." Had he said Per Socket, I have not asked that Question. Thanks!

Single Socket Core 2 Duo or Quad hasn't really shown any "weakness" per core. Or Did I miss something, again:confused:

---

Yes you missed something. Core 2 Quad shows weakness in scaling with specially memory intensive workloads and scaling with threads that have to wait on serialized code execution from a master thread. Sure a single Core 2 Duo dont show such limits. Since its the perfection of a dualcore. Far superiour to X2/Phemom. But Core 2 Quad suffers a whole other faith with its heavy weakness of the FSB chain ball on its feets.

so socket 775 is dying?

Quote:

---

Originally Posted by TEDY

so socket 775 is dying?

---

Yes, every socket is sooner or later. But it will last atleast 2 years more. With about 1 year left as highend.

Quote:

---

Originally Posted by Shintai

IBM is using utter crap too to say it mildly. PPC aint the future.

My best bet currently of whats avalible would be IA64, and no its just not because its Intel.

Else something alike it or completely new. Specially an architecture that can scale well in execution units. Now Core 2/Nehalem is 4 issue wide. IA64 as an example can scale to 11 issue wide and maybe more.

The only single issue there is stopping all progress is. Compability!
Same with software, Microsoft is dead scared to lose compability so we have so much extra baggage always.

We basicly just need a fresh start in both CPU arch and software to leap ahead instead of doing very small steps towards the dead end.

---

I agree that seems like the most logical route, that way no one really loses, though it will cost a lot of money, then again no matter how we look at it it will cost a lot of money, better now then later, though I have a feeling the first batch of cpu designs may suck until the engineers and coders start understanding the architecture better

Quote:

---

Originally Posted by Shintai

Yes you missed something. Core 2 Quad shows weakness in scaling with specially memory intensive workloads and scaling with threads that have to wait on serialized code execution from a master thread. Sure a single Core 2 Duo dont show such limits. Since its the perfection of a dualcore. Far superiour to X2/Phemom. But Core 2 Quad suffers a whole other faith with its heavy weakness of the FSB chain ball on its feets.

---

I might have :confused:-ed it but even Core 2 Duo is not perfection since it isn't 100% faster moving from 1 thread to 2. So why would anyone expect Quad to do the same? But anyway, thanks for the info:)

Quote:

---

Originally Posted by Donnie27

I might have :confused:-ed it but even Core 2 Duo is not perfection since it isn't 100% faster moving from 1 thread to 2. So why would anyone expect Quad to do the same? But anyway, thanks for the info:)

---

Oh yes Core 2 Duo is perfection. I just think you forget how much code is serial.

Quote:

---

Originally Posted by saaya

and tri channel mem is confusing...
the board has 4 slots... so... hows it supposed to work? :confused:

---

I found what you are looking for I guess.

http://www.hkepc.com/database/images...1637230275.jpg

Ehh, I wonder if boards are going to get more cluttered...

Quote:

---

Originally Posted by AliG

Then why don't intel and amd dump x86 and use whatever IBM's using? Makes a lot more sense than trying to max out way outdated technology, I mean that's like keeping with netburst instead of moving with conroe (which thankfully intel did not do, but its time for a change imo)

---

Yeah, right.

You know how many years (decades?) it would take to recode SW to run on another architecture? OSes in particular?

You can't just dump the code into a different compiler and expect it to work.

Quote:

---

Originally Posted by AliG

Since that's taken care of with nehalem's integrated memory controller and csi, then what else can really be done with x86?

---

Plenty.

All this discussion of the death of x86 came up 10 years ago in the CISC vs. RISC CPU wars. Look who is still king of the hill and who runs in niches now.

Quote:

---

Originally Posted by AliG

I agree that seems like the most logical route, that way no one really loses, though it will cost a lot of money, then again no matter how we look at it it will cost a lot of money, better now then later, though I have a feeling the first batch of cpu designs may suck until the engineers and coders start understanding the architecture better

---

Look how long Intel has been developing Itanium (the "successor" to x86). 10 years (and not by themselves either, HP helped for a very long time).

And that architecture still isn't ready for prime-time.

Quote:

---

Originally Posted by mstp2009

Look how long Intel has been developing Itanium (the "successor" to x86). 10 years (and not by themselves either, HP helped for a very long time).

And that architecture still isn't ready for prime-time.

---

i wouldn't really call it so much the successor to x86. it was more or less engineered for very specific workloads. But personally i don't know all that much about this topic so I'll fade into the background and continue to get wood thinking about DP Nehalem platforms with 2 independent 3 channel non-buffered ddr3 controllers worth of bandwidth.

Quote:

---

Originally Posted by Shintai

I found what you are looking for I guess.

http://www.hkepc.com/database/images...1637230275.jpg

---

hmm so still atx form factor, good thing. :)

Nehalem is the biggest change in Intel microarchitecture since Pentium MMX (supposedly) so it will bring a lot to the table :D

Quote:

---

Originally Posted by Zytek_Fan

Nehalem is the biggest change in Intel microarchitecture since Pentium MMX (supposedly) so it will bring a lot to the table :D

---

While it's nice and all with new awesome expectations/promises among new products which this news is FULL of it also sucks a bit for my wallet as I have intended to hold onto Penryn for a while as Nehalem will prolly require a full upgrade for me, and this architecture sounds like it could have a serious lead over Core 2 Duo so it could be difficult holding onto C2D a long time. :D

Nehalem = Intel strenghtening the remaining weak points in Core 2 Duo.

This will probably be my next CPU, I need a complete system overhaul anyway as I'm still running a S939 system and it's starting to show it's limitations.

It says 45nm, but we all now that Penryn is 45nm and Nahelem will be 32nm. If they got that wrong, no telling what else is inaccurate here.

I'm still trying to decide between a q9450 or waiting for Nahelem. I think the wise thing is to wait, as I doubt I will really need a quad before then.

Quote:

---

Originally Posted by RPGWiZaRD

While it's nice and all with new awesome expectations/promises among new products which this news is FULL of it also sucks a bit for my wallet as I have intended to hold onto Penryn for a while as Nehalem will prolly require a full upgrade for me, and this architecture sounds like it could have a serious lead over Core 2 Duo so it could be difficult holding onto C2D a long time. :D

Nehalem = Intel strenghtening the remaining weak points in Core 2 Duo.

---

Well, you have to consider how long LGA775 has been alive. Yeah socket changes suck because you have to get all new stuff, but the change of the socket this time is necessary due the IMC and other new things.

I should be really pissed because I'm getting a new rig in March, but I'm not because I'm spending wisely and am buying as much as I can that can carry over to a Nehalem machine :up:

Quote:

---

Originally Posted by RPGWiZaRD

Nehalem = Intel strenghtening the remaining weak points in Core 2 Duo.

---

Hmm yes and no..thats only half of it. The other half is more SoC design with PCie+IMC and also IGP on the lowend version.

Its just a matter of time before everything is on a CPU and we have to upgrade it all each time.

Quote:

---

Originally Posted by _g0

It says 45nm, but we all now that Penryn is 45nm and Nahelem will be 32nm. If they got that wrong, no telling what else is inaccurate here.

I'm still trying to decide between a q9450 or waiting for Nahelem. I think the wise thing is to wait, as I doubt I will really need a quad before then.

---

Nehalem will initially be 45nm, but then there will be a refresh to turn it over to 32nm.

triple channel ddr3 mmmm 3gigs or 6 :D?
will 3 sticks present oc problems?

32nm isnt until 2010....so intel have stated in their own preezuntayshuns

saving up for nehalem right now.

may get a yorky with some spare change...maybe

Quote:

---

Originally Posted by RPGWiZaRD

While it's nice and all with new awesome expectations/promises among new products which this news is FULL of it also sucks a bit for my wallet as I have intended to hold onto Penryn for a while as Nehalem will prolly require a full upgrade for me, and this architecture sounds like it could have a serious lead over Core 2 Duo so it could be difficult holding onto C2D a long time. :D

Nehalem = Intel strenghtening the remaining weak points in Core 2 Duo.

---

good thing i switched to ddr3 now, i think my 2gb ddr3-1800 stick will also find some use in nehalem. But i dont think i buy into nehelem, maybe i'll wait for sandybridge. :)

WOW that is just killer

Quote:

---

Originally Posted by Donnie27

Please explain Core 2's biggest weakness again?

---

For a good example, have a look at the multi-CPU scaling in Cinebench 10, C2Q averages around ~3.6x IIRC, Phenom is around ~3.95x, almost linear scaling.

Now, I'm aware that end performance is still in Intel's favour, but the fact remains that per core scaling is less than ideal, and can be improved. Nehalem should address that.

C2Q is a strong CPU but it is not perfect. :up:

when does the native octo core come out? Is that with the 45nm refresh or the initial launch? As 16 threads could be very useful, I may even consider folding with one of those

Quote:

---

Originally Posted by AliG

when does the native octo core come out? Is that with the 45nm refresh or the initial launch? As 16 threads could be very useful, I may even consider folding with one of those

---

i think it's being called Nehalem EX externaly right now, and that will be a 4 socket server only product. Due to the die size, pretty much everyone here wouldn't want to pay the margins that will be placed on it by the manufacturing costs associated with it. But i believe it's slatted to come out along side the 32nm refresh of nehalem (westmere if i am remembering right). until then Dunnington with 6 penryn like cores will fill the 4 socket market segment when it makes it out something later this year.

Quote:

---

Originally Posted by Epsilon84

For a good example, have a look at the multi-CPU scaling in Cinebench 10, C2Q averages around ~3.6x IIRC, Phenom is around ~3.95x, almost linear scaling.

Now, I'm aware that end performance is still in Intel's favour, but the fact remains that per core scaling is less than ideal, and can be improved. Nehalem should address that.

C2Q is a strong CPU but it is not perfect. :up:

---

Thanks E, I get it!

I'm not thinking FSB is a great. I just don't think it is that BIG weakness that's all. I'm not saying its layout is great or nothing is wrong with it or even that it couldn't be better. IMHO, I'm NOT seeing the this terrible weakness being complained about. AMD has FAR worse problems than Intel's FSB that desperately needs to be address while folks are complaining about a FSB? Or Dual Socket systems with Two FSBs? Scratches head.

Why do I say this? If FSBs is this terrible, big weakness, then Nehalem should be more than 10 to 25% faster than the results leaked so far. If the FSB is sooo bad, just adding the EV6 like CSI to the Penryn should come close to those Nahalem results, right? I'm talking about 4 cores via MCM. Look at the difference IMC did for 7.5 to K8? K10 flopped because each of the four cores wasn't improved enough. Doesn't matter what kind of a bus it rides or if its native or not. Intel has gotten a lot out of that FSB!

Find something a little more Optimized, so the 4 cores can be stressed. The FSB doesn't choke 4 cores and scale well with most apps. They scale well with software that allows them too, that's an X86 problem, not a FSB problem.

http://www.lostcircuits.com/cpu/intel_yorkfield/

And see which ones I'm talking about.

Nice thing is that current coolers may not have compatibility issues with the new socket. :D

Quote:

---

Originally Posted by Shintai

Oh yes Core 2 Duo is perfection. I just think you forget how much code is serial.

---

And you forgot how much is still Paralelle and Random! Yeah you are right some many times that I learned a long time ago no to argue with ya'.

Just as I said Intel would use 3 (cheap), 6 and 9 slots.

Quote:

---

Originally Posted by Mad1723

They said a new socket would be introduced for Nehalem with the IMC and the new transport bus

---

those sockets are fun. They're huge compared to LGA775 (seen em =D), and CSI has arrived =D

Quote:

---

Originally Posted by Donnie27

Thanks E, I get it!

I'm not thinking FSB is a great. I just don't think it is that BIG weakness that's all. I'm not saying its layout is great or nothing is wrong with it or even that it couldn't be better. IMHO, I'm NOT seeing the this terrible weakness being complained about. AMD has FAR worse problems than Intel's FSB that desperately needs to be address while folks are complaining about a FSB? Or Dual Socket systems with Two FSBs? Scratches head.

Why do I say this? If FSBs is this terrible, big weakness, then Nehalem should be more than 10 to 25% faster than the results leaked so far. If the FSB is sooo bad, just adding the EV6 like CSI to the Penryn should come close to those Nahalem results, right? I'm talking about 4 cores via MCM. Look at the difference IMC did for 7.5 to K8? K10 flopped because each of the four cores wasn't improved enough. Doesn't matter what kind of a bus it rides or if its native or not. Intel has gotten a lot out of that FSB!

Find something a little more Optimized, so the 4 cores can be stressed. The FSB doesn't choke 4 cores and scale well with most apps. They scale well with software that allows them too, that's an X86 problem, not a FSB problem.

http://www.lostcircuits.com/cpu/intel_yorkfield/

And see which ones I'm talking about.

---

FSB is a bottleneck for multiple core chips. If multiple cores all share the same small bus, there's the bottleneck, not just using multiple chips.

And from what I've seen, I wouldn't expect amazing Nehelem leaked specs out since they're still pretty new.... or so I've heard >.> . You can't expect the first few bins to be comparable to retail. But CSI isn't going to be very noticable in the consumer market. Not many consumers use the full bus, but in the server department, the FSB bottleneck is a glaring problem Intel has acknowledged before. Though FSB is highly optimized, there's more potential in the chips than what's already showing.

Quote:

---

Originally Posted by Shintai

Hmm? There is no Bloomfield picture. But it contains 3 DDR3 channels on the IMC.

---

Look at original review, are you blind? I have seen Bloomfield + Tylersburg ...

Quote:

---

Originally Posted by saaya

why do they call flash memory nvram? :confused:

and tri channel mem is confusing...
the board has 4 slots... so... hows it supposed to work? :confused:

---

I see 6 slots ... look at original full review not only for some screens here ...

Quote:

---

Originally Posted by _g0

It says 45nm, but we all now that Penryn is 45nm and Nahelem will be 32nm. If they got that wrong, no telling what else is inaccurate here.

I'm still trying to decide between a q9450 or waiting for Nahelem. I think the wise thing is to wait, as I doubt I will really need a quad before then.

---

Nope... Nehalem is the tock of the 'tick-tock' model. It will be 45 nm. Intel's manufacturing strategy is to offset architectural revisions 1 year from process revisions, and introduce new architectures every 2 years instead of every 4-6 years.

http://download.intel.com/technology...ence-paper.pdf

It started with cedarmill/presler/yonah at 65 nm, basically shrinks with minor archiectural tweaks on 65 nm from 90 nm (the tick), about half-way through merom/conroe/woodcrest were introduced on 65 nm (the 65 nm tock), next comes penryn/wolfdale/harpertown at 45 nm which is a shrink of merom/conroe/woodcrest with some minor architectural tweaks (the tick), and about 1/2 through (toward end of 2008) Intel will introduce the tock, a new architecure (Nehalem).

In the PDF I show, the next tick would be a 32 nm Nehalem-c, this has since recieved a new code name I believe called westmere, westmere will be a similar shrink and minor revision to Nehalem, and then Gesher will appear 1/2 through 32 nm for the tock.

It is a very rapid cadence, in one year Intel will introduce a new arch. to boost performance via IPC, the next year they will introduce a new process tech to help boost clocks or lower power.

I have my doubts that they will be able to keep up this rapid pace.... it is very agressive.

Jack

Quote:

---

Originally Posted by Shintai

And the change is? For me its still 30% less power. even tho 5 or 10% may come from a chipset.

I really dont care about where its saved. Just that it is saved.

---

yep.. and power consumption of nehalem looks especially good because they are integrating more stuff in the cpu (IMC).. so its really good that they can keep power usage "low".

Quote:

---

Originally Posted by OBR

Look at original review, are you blind? I have seen Bloomfield + Tylersburg ...

---

Uhm..no..Maybe you should follow the context of the thread. I was answering Saaya about it. There is a picture in the review, but not in the start of the thread.

Quote:

---

Originally Posted by naokaji

yep.. and power consumption of nehalem looks especially good because they are integrating more stuff in the cpu (IMC).. so its really good that they can keep power usage "low".

---

Moving things around dont change power consumption.

Quote:

---

Originally Posted by Donnie27

And you forgot how much is still Paralelle and Random! Yeah you are right some many times that I learned a long time ago no to argue with ya'.

Just as I said Intel would use 3 (cheap), 6 and 9 slots.

---

Please...you are on deep water it seems.

Random code? lol...thats a new. Also parallel code aka multithreaded is usually guided by a serialcoded thread that can only run on 1 CPU. So the others will have to share some data with that thread.

Also I dont know if you actually know. But its kinda normal for also shifting threads around udner workload between cores. Yet again an effect of why the FSB is a weakness.

Do you think its for fun that they write up to 2x performance boost with Nehalem over Penryn for multithreaded on a single chip? But only up to 1.25x with singlethread code? Thats one major leap in difference....

Quote:

---

Originally Posted by Shintai

Moving things around dont change power consumption.

---

thats a big fat :owned: for me...

i was just thinking integrating more stuff in the cpu without a increase in power usage = good. but your right, i somehow forgot that its stuff that would just be elsewhere...

Quote:

---

Originally Posted by Shintai

Do you think its for fun that they write up to 2x performance boost with Nehalem over Penryn for multithreaded on a single chip? But only up to 1.25x with singlethread code? Thats one major leap in difference....

---

That's partially due to SMT (aka HyperThreading) (and of course the fact that it's a single die solution.)

Am i the only one that noticed "Direct NAND"? :yepp:

Quote:

---

Originally Posted by Shintai

Moving things around dont change power consumption.

---

It does.

A typical Intel NB has 3 things : PCI-E controller , MC and DMI.
Nehalem gets all on die.The difference?

Until Nehalem NBs were typically 1 or 2 process generations behind. ( CPUs on 90nm NB were 130/180nm , CPUs 65nm NBs were 90nm/130nm ).

A NB typically burns 8-25w.Moving it inside the CPU and using the latest process tech will probably cut the power by 2-4x.

Quote:

---

Originally Posted by Shintai

...
Do you think its for fun that they write up to 2x performance boost with Nehalem over Penryn for multithreaded on a single chip? But only up to 1.25x with singlethread code? Thats one major leap in difference....

---

When Intel states performance boost they typically refer to SPEC_INT/FP for single threaded performance and SPEC_INT/FP_rate for multithreaded.

Nehalem getting a 25% boost on single threaded code over Penryn is formidable.Why ?

Because compilers are tunned so well for Spec that Penryn's major weakness isn't affecting the single threaded stuff , in other words , they manage to keep the execution units full.Since Penryn is so wide and capable of issuing 4 DP FLOPs per cycle , I'm surprised Nehalem is able to increase the perf by such a margin.
It would make a Nehalem be almost 2x as fast for Spec_FP vs. a 3GHz K8.If that ain't an improvement , I don't know what it is.

Quote:

---

Originally Posted by savantu

It does.

A typical Intel NB has 3 things : PCI-E controller , MC and DMI.
Nehalem gets all on die.The difference?

Until Nehalem NBs were typically 1 or 2 process generations behind. ( CPUs on 90nm NB were 130/180nm , CPUs 65nm NBs were 90nm/130nm ).

A NB typically burns 8-25w.Moving it inside the CPU and using the latest process tech will probably cut the power by 2-4x.

---

You can already get 65nm chipsets today to use with your 65nm CPU. So thats basicly just pragmatics. Also I dont hope a NB uses 25W...
If you note most of the powersavings is from a faster core. 30% less power consumption for the same performance as a Penryn. And if you have a scenario with 10-100% boost (Lowest single to highest multi). Then you have your 30% there.

Quote:

---

Originally Posted by savantu

Nehalem getting a 25% boost on single threaded code over Penryn is formidable.Why ?

---

Assuming the PR material is refering to absolute performance rather than a per clock figure, and Nehalem is being touted as unlocking 45nm High K/metal gate potential wouldn't most of the increase be from a clock boost, possible even drawn from the turbo mode?

Quote:

---

Originally Posted by Shintai

Moving things around dont change power consumption.

---

Dont off chip drivers consume very large amounts of power relative to on die buses? Elimination of a FSB link to the memory controller should reduce overall power consumption shouldn't it?