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K8L sooner then you think... So they showed K8L die shots in the presintation for opteron quad cores, hmm 65nm talk, L3 and so forth. More real info about K8L In the AMD's presintation. Intresting. There is no delay. Still 2007. And more info is out on the core.
This looks awesome.
~Mike
Lots of good information! :)
Nice find...
It says K8L will still have a 128KB L1 cache. If AMD doubles the bandwidth and associativity they'll have a major L1 cache advantage. This alone should raise performance a lot. Doubling the L1 cache size is the main factor what gave the pentium-m its tremendous IPC leap over the P3.
It also says they can do 4 fp instructions per clock. Hopefully there's a 4th decoder too.
I'm wondering how much of a boost the 128bit loads will give. It may be a lot since loads are by far the most common instruction (usually 33% of all instructions)
Load out of order execution should be around a 5% boost overall, and around 10% for integers.
It really seems like K8L is going to beat out Conroe. The only deciding factor left is how many decoders K8L has.
Oooh, more slides.
Thats what im talking about Fugger!
~Mike
with my luck K8L will come in laptops soon as well.
The egg is going to fly when AMD releases new chips.
Fugger will be the first to get a good dose of it on his face! :)
No ES for you!
Bottom Line, Intel needed almost 3 years to respond to K8, AMD will respond in 8-10 months to c2d, Intel then will take another year and a half to respond to K8L with nehalem, in the most optimistic projection, probably K10 then will follow suit, so yes AMD is having a lot of trouble in following Intel amazing roadmap and has only slides to show :slapass:Quote:
Originally Posted by FUGGER
I just hope that Intel didn't use slides to explain to its investors how can be possibly that AMD stock as already recuperated form the plunge that it took after acquiring ATI, and Intel stock despite having a new product that have taken the performance crown, showed zero improvements. :fact:
thats simple, amd is still riding the opteron wave, while intel is trying to get rid of netburst stock and cutting jobs... both sides know, you dont win with just pure performance.
Very interesting. I might have a reason to upgrade sooner than I thought. But that may still depend on how far away AM3 is - I was planning to skip AM2. We'll see.
AM3 is late '07 early '08.AM2 supports K8L(DC and QC) and coupled with good DDR2 modules can deliver enough bandwith to feed AM3 CPUs.
Later in 2008,you can sell your mobo and go AM3 all the way with good DDR3 memory.
Delivery dates from AMD typically lag advanced roadmaps by about 2 quarters. That said, frankly we need K8L, for market reasons. As much as it is risky to show, we need to see results, from working chips. A lot of people could likely accept current AM2 performance, and wait for a promised upgrade if they had better understanding of what they were going to get.
I'm not sure I buy into the triple layer cache as the sure way to performance. It seems even contradictory to the basic theme of AMD architecture (looking at the on die mem controller) which is to cut out middle layers and give as many portions of the overall system as possible, direct connections.
They also mention one of the cache advantages as lowering memory latency, which, while true, doesn't seem to be much of AMD's weakness really. Maybe the creator of the powerpoint just needed something to say on the topic and picked that. It also appears that the shared cached designs are something AMD would like to mimic, while retaining L2 on the cores themselves, so possibly that's the real answer.
Direct cross connects, 3 cache levels, and out of order executions seem like a lot of things to keep straight without errata cropping up all over the place. AMD is the one to pull it off if it can be done though. Could be one expensive chip however.
I guess I'm really hoping they manage to get this pulled into late Q1 early Q2 07. Again, so this race has two more equal competitors.
Charlie backtracks.
In brief (from AMD, via Charlie):
Q2 2007: K8L "Barcelona", quad-core, HT 2.0
Q4 2007: K8L "Budapest", quad-core, HT 3.0, 12xx
Q1 2008: K8L "Shanghai", quad-core, HT 3.0, 22xx, 82xx
65nm seems to be on track for end of this year.
Also, K8L = rev H.
Theres even a 4th decoder in the 65nm K8's.Quote:
Originally Posted by Khenglish
really? i was under the impression that revG was going to be a dumb shrinkQuote:
Originally Posted by Serge84
http://129.15.202.185/athlon_rev_g/6...hancements.jpgQuote:
Originally Posted by ozzimark
Here is rev G and its changes shown here have been added. Rev F is different then rev G, compare it with rev F die shots.
http://129.15.202.185/athlon_rev_g/a64_rev_f.jpg
This is rev F. See the difference? Only 3 decoders. And some parts missing compared to a rev G that has improvments. Also the new SiGe will be used in them with a few new fab prosesses in the mix. It will allow AMD to hit higher clocks. FX-64 and 66 will use SOI-3 as well to improve transistor speed but stay on 90nm for awile.
http://www.c627627.com/AMD/Athlon64/
if AMD work out Pacifica so that i can use the PC as HTPC and gaming machine separately & independently i'll be all over it like a rash because Intel VT ain't up to it
it is still TOO EARLY to make such claims........let's see these products out on XS with people testing them. Only then will we know how good or not they really will beQuote:
Originally Posted by DoubleZero
Yeah. We really don't know how the real-world performance of K8L will be. It's too soon to make any claims. Once we see these chips out and about, being tested, then we'll know the truth. My prediction is that K8L will give about 15-20% performance boost over Conroe in real-world situations, maybe quite a bit more in benchmarks. We simply don't have enough apps that utilize multiple cores...maybe if AMD hurries up with their "anti-hyperthreading."
i'd love to know how you could come up with sucha conclusionQuote:
Originally Posted by Zardokk
if indeed 65nm added another decoder it should merely make it even with performance of Conroes depending on the L2 cache and RAM performance.........What will give them a leap ahead..........i could understand such prognosis had there been an inclusion of L3 cache in large size but don't see how it is possible otherwise.......
he gave his prediction , not a conclusionQuote:
Originally Posted by dinos22
i would hope that he is close to his prediction and it becomes a conclusion ;)
Please don't make me post another topic on explaining what the K8L arc can do. Physicly the die shots show a 2nd FPU giving it 2x the FPU performance and more ALU's giving it about 25% to 40% performance. Its more then just that, it will use dual 128-bit processes and wide pipes. The Cache is 256-bit. All this simply allows conroe like processes. It will be faster then conroe period. K8L will give 50% to 80% more performance then K8's. If you want to get all the info on why this is possible look at my past posts on all my K8L responces. I don't feel like making another speech.Quote:
Originally Posted by dinos22
Look at die shots and look at the ones that tell exactly what everything is. Nothing is if anymore. AMD showed the die shots and specs. It will do what we think it will who can understand what the parts do just by looking at the die. It will perform 2 128-bit instructions in one cycle so it will match conroe right there not including the other parts. The only thing that can compete is DUO3.
that's what i thought :p:Quote:
Originally Posted by Serge84
there is no such thing, that was just a rumor... :stick:Quote:
Originally Posted by Zardokk
Thx for the info... looks good.
link - this link is to Inquirer with news of K8L and 65nm K8 - title is: 'AMD quad cores: the whole story unfolded'
Oh man...I was hoping anti-hyperthreading was real. Making 4 3GHz Conroe-speed cores work as one core...sure you wouldn't have a true 12GHz of power; some would be lost, but you would be within the neighborhood of 10GHz or so I would imagine. Oh well, I knew it sounded too good to be true. And to the people who are criticizing my predictions, keep in mind that they're just pedictions. I have absolutely no clue how K8L will perform and neither does anyone else. I would assume that it would have a 15-20% increase simply because that's about the rate at which computer components increase in speed. Every year (just about) we get another 15-20% faster. And I'm sure AMD isn't going to even bother releasing something that can't perform at least on par with Conroe. I'm just assuming that they will release something that can outperform it by a decent margin. But this is all just SPECULATIVE.
I´m quite sure AMD will release whatever they can and have nomatter if it can beat C2D or not. I doubt K8L will beat C2D, but instead close the gab. K8L also gonna fight 45nm C2Ds and less than 1 year after K8L is introduced Core 3. Its more important for AMD to produce cheap chips for Dell etc than it is for them to have the performance crown. As it is right now, C2D is not only faster than anything AMD got, its also cheaper to produce than a P4D was. So hopefully we see K9/K10 soon.Quote:
Originally Posted by Zardokk
What does the price of a C2D compared to a P4 have to do with AMD competeting with it? Your whole logic is flawed and should refrain from posting. Thanks. :wierd:Quote:
Originally Posted by Shintai
Quote:
Originally Posted by DuceGT
No, he does make some sense. overclockers/performance whores only make a very small % of AMD sales. Therefore its not as important to them to beat C2D outright as you may think..
at the end of the day, AMD makes their $$ from selling semprons cheaply in huge volumes, and from their opteron sales. Its not all about being top dog..although having bragging rights are an advantage.
Exactly.Quote:
Originally Posted by Obi
That's the reason why they are willing to give the first couple million CPU to Dell for free, on top of marketing dollar rebates, just to get into the Dell business.
BTW, there's nothing really new from the presentation slides. Perhaps more detail will be out during IDF later this month. No one really have more information about AMD besides Intel, and vice versa.
Rev.H will be insane. i think Rev.G will be good enough for a nice performance boost (if they do add a fourth complex decoder and that OOO stuff) but Rev.H sounds like another 3-4 steps ahead.
antiHT..
in russia we say:
no smoke without a fire ;)
I hope it won`t be to expensive:rolleyes: :rolleyes:
AMD can react and make changes to it's chips much faster than Intel can; with the exception of a die shrink of course.
If anyone thinks that AMD only cares about supplying Dell with cheap chips, you're sadly mistaken.
Not that my opinion counts, but from what I've seen, the K8L will surpass C2D in performance.
I hope AMD will do the same to Barcelona as they did when introducing Dual coreQuote:
Originally Posted by galimim
Also prices range from 300$ and up:toast:
Slides and pictures impress me NOT.
I need to see NUMBERS. BENCHMARKS.
Call me shrewed, but this is a game for KEEPS. Not for ALMOST.
FWIW: expect K8L to be roughly on par (+/- 5% at same clock) with Conroe on integer workloads, but for FP workloads it should beat Conroe soundly at the same clock. I'd expect the dual core versions to work with AM2, but I'd be suprised if the QC versions could work on socket AM2, they'd probably draw too much power hence socket AM3/HT3 intro. at end of 2007.
Barcelona(QUAD CORE) willl work as well since they will be produced at 65 nm, which means that AMD will able to ship them in 89 power envelope just as the dual cores today:woot:Quote:
Originally Posted by mesyn191
Here is a qoute from an interview with Phil Hester from hardocp.com where he tells Barcelona will keep the same power envelope
Here is a graphical slide from Amd pointing that outQuote:
IPC and Power Envelope
When talking to both Phil and Pat, we got some interesting answers about advancements in Instructions Per Clock with the Barcelona Pat Conway said that we will see a “performance improvement of 150% over the next two years that will be within the same power envelope.” If you take into account that you can back off frequency and add more cores, some of this can be achieved now if you are counting IPC across all cores. (See below how simply pulling back on frequency by as little as 16% can have a huge impact on power draw.) Intel is bound by the same principles as well.
http://enthusiast.hardocp.com/image....BfMV8xX2wuZ2lm
I remeber seeing that K8L is going to be drawing as much power as the FX series.
~Mike
Look at this site
http://www.ixbt.com/editorial/amd-gu...nf-part2.shtml
If you scroll down you will notice that the Amd slides tell that Barcelona will use the same Power as a Opteron 200 dual core:toast:
here is another link of the K8L , looks like the desktop version gets put back a little for the release of the server one
http://www.pcpro.co.uk/news/93934/am...computing.html
AMD outlines its quad-core computing 7:18PM
AMD has been revealing details of its technology roadmap, specifically what lies ahead with quad-core computing.
Scheduled to appear in the first half of 2007 - first for servers, but then rolled out across AMD desktop and laptop offerings - this will be the next step for AMD multi-core processing.
AMD does not care about high end users or overclockers, not that that matters -- we are all @ intel now.
I do not see how or why AMD is going to change anything, they are selling lots of AM2 stuff and none of it is any faster than 939, let alone conroe! :slap:
If I was a gamer on a limited budget(and no 939) I would buy AM2, because it is cheaper than C2D and it will save me $$ to spend on video cards :)
AMD + crossfire or SLI is faster in 05/06 than conroe and single VGA :)
Speak for yourself :p: I for one am NOT going intel, I won't support them and their business practices.Quote:
Originally Posted by fhpchris
Sure they sell alot of AM2 stuff now, but if they got something faster than C2D then they could sell even more stuff.Quote:
I do not see how or why AMD is going to change anything, they are selling lots of AM2 stuff and none of it is any faster than 939, let alone conroe! :slap:
Exactly, that is why I thought everyone going to C2D for their gaming but not changing GPUs was almost wasteful because the performance increase in a game was minimal. Games are more GPU limited.Quote:
If I was a gamer on a limited budget(and no 939) I would buy AM2, because it is cheaper than C2D and it will save me $$ to spend on video cards :)
AMD + crossfire or SLI is faster in 05/06 than conroe and single VGA :)
Sooner than...
Teroedni, arisythila: they're referring to TDP in those numbers... expect something along the lines of the issues with Conroe and the D975XBX mobo where rev. 304 had to be used to run Conroe just due to some minor spec changes in the way it used power.
me have rev h eng sample us irish are lucky what can we say
cant say mu ch about it until releas but its everything these guys say it is in a good way never though 4 cores wou d make such a difference you usa guys are so going to flip the am2 users are going to start loving this
its is better to be green then blue when this junk comes out its better then irish sex the cony is history
please forgive my language im forin
You only got the quad core? I already got the double octacore Rev. H with 64Mb L3 Zram. sub 1 second Pi 1m.
and how long until we see mainstream software showing up for these quadcores?
Probably late 2007/early 2008. Devs have known for quite a while quad core and up is coming, I'd be shocked if they haven't planned ahead to start making use of it by now for games scheduled to come out around that time period.Quote:
Originally Posted by punisher69
Quote:
Originally Posted by punisher69
I think it will take some time perhaps 1 year or more, so for the time being Quad core is for thoose that wanna run WCG , multimedia work,sound proccessing work, etc , database ,server use or extreme multitasking(Whatever that means;)
To say its simple
If you dont know if you need it your probably dont
16% increase in cpu speed should not make that big of a differance, unless they had a crappy cpu and had to up the voltage. if my venice was on stock volts at 2.7ghz (stock speed 2400) i doubt i'd have that much more power consumption than it did when it was stock, for example, how can they put a certain power rating(i.e. 89w) for cpus ranging from 1.8 ghz to 2.4 ghz, which mind you is much more than 16 percent clock increase.
Because,Quote:
Originally Posted by i found nemo
they design, test and measure the 2.4Ghz model to produce in work case scenario (with poorly calibrated motherboard giving +5% voltage, and bad operating conditions, and sequence of instructions rarely/never encountered).
then, simple assign all models with slower clockspeed to this same category. simplifies system design.
Is there? There sure is the shady 4th box in the CAD'ed pics AMD has released on K8L...Quote:
Originally Posted by Serge84
But the shady box isn't necessarily a marker of a 4th decoder. It is just a instruction ROM (memory) after all. Not a decoder.Where does it say that's an Rev.G? Certain interviews claim this blue die is a nonproduction prototype. :confused:Quote:
Originally Posted by Serge84
Die shots? Where?Quote:
Originally Posted by Serge84
You mean those drawn CAD core layout schemes?
Doubled FPU doesn't mean doubled performance. Doubling things don't always translate to 100% performance increase.Quote:
2nd FPU giving it 2x the FPU performance
More ALUs?Quote:
and more ALU's giving it about 25% to 40% performance.
According to AMDs slides (1, 2) there's an identical amount of ALUs/core on K8L as on K8.
3 to be exact.
There goes that 25-40%...
K8L L1 cache has dual 128bit entries. Not 256bit.Quote:
Its more then just that, it will use dual 128-bit processes and wide pipes. The Cache is 256-bit. All this simply allows conroe like processes.
As per to Phil Hester's slides, K8L L2 cache is identical to K8 with a width of 128bit.
The L1 on C2D on the other hand iss 128bit wide for instructions and 256bit wide for data. And it also has a real 256bit wide L2.C2D has 3 SSE units of which 2 are symmetrical.Quote:
It will perform 2 128-bit instructions in one cycle so it will match conroe right there not including the other parts.
Thus C2D does 3 128bit SSEs ...
I find the huge 32byte instruction fetch and OoO more interesting on K8L...
thanks for debunking someone's irrational hype, largon,
I'm also excited about the larged instruction fetch, as well as more flexibility with loads and stores.
To those like Serge84, who like to focus on the width/number of execution units.
I can personally design for you a processor with not jut 3 ALU, but 300 ALU. Even if running at 3Ghz, it will have the incredible awe inspiring performance of a 486. There's a lot more to CPU's than just the execution units!
Nice find! Lots of info on there :D .
You are simply wrong in most things. But I did say this was hypothetical. You didn't see my evidence slides proveing you wrong. I aready have backed up my clames in past posts so I don't need to say the same thing twice. You debunked nothing. I will not repeate myself any longer.Quote:
Originally Posted by largon
We will see whos wrong and whos right when it comes out. Besides I dou't you can read phyisical blueprints of arcs with just looking at the parts in a microscope like some of is can. Prob fanboy just afrade of K8L's power. You can't deny anything if you can't understand it.
Some people just think 90nm is 90nm, some people think 65nm is just 65nm. Well the new AMD 90nm FX's will have Germinanium and SOI-3 as a example. This is better then COMS 65nm intel, I can't beleave they just use Cu and COMS 65nm thats real ceap intel. And the AMD 65nm vers just blows their processes away useing like 6 processes in all. None are the same, the processes make them way more capable. Its fasinating.
Serge84,
what specifically that largon stated do you say is false.. everything?
Re:65nm etc
I certainly hope everyone here realizes that different FAB companies have different technologies, and thus transistors and chips will behave differently. You are quite right that AMD has invested a lot of research and development into enhancing existing processes. However, you must also admit that Intel was very smart to quickly switch to 300mm wafers and 65nm, since both dramatically reduce manufacturing cost per chip, and allow many more chips to be made.
Its not just who can produce the better technology.. they're publically traded companies competeing in a market.. its whoever can secure larger marketshare, and larger profit margins.
I'm itching to hear more about this.Quote:
Originally Posted by Serge84
Err...Quote:
Prob fanboy just afrade of K8L's power. You can't deny anything if you can't understand it.
I just corrected your fictional numbers.
No need to flame.
[Refering to the poster before the last poster] Okay, there's not much helpful with 90nm to 65nm in terms of performance. It just makes it a hell lot cheaper per cheaper, mainly. So AMDs 90nm really doesn't pwn 65nm at all...
lets see, similiar power usageQuote:
Originally Posted by brentpresley
plus superior Integer/Clock performance (floating point is a different matter)
obviously it worked very well , because it competed with intel's 65nm before the conroe , both on performance and heat , and i'm not sure that intel has amd beat on heat nowQuote:
You HONESTLY THINK that AMDs 90nm SOI doped w/ Ge is in the same LEAGUE as Intel's 65nm process technology? If that is the case, then WHY would AMD even bother switching to a 65nm process if they are already better than the competition?
i guess amd must be a special company to be able to work with siGe
please dont confuse design with production technology!Quote:
Originally Posted by The Ghost
i'm notQuote:
please dont confuse design with production technology!
and that would be about the same amount that you knowQuote:
Ghost, it is PAINFULLY apparent you have ZERO knowledge of process technology.
if you think so , that is why intel tried to go to ibm when it had the problem with the prescott , the problem was that intel did not like what the payment wa going to be , the payment was that ibm would have a license to every patent in the prescottQuote:
In terms of process technology, no one even comes close to Intel right now.
you might have convinced people that you know what you are talking about , but you messed up on this statement , while ibm has a large presense here in my home state also , remember i just live down the road from you , ibm's residence is actually in NYQuote:
EDIT - and FOR THE RECORD - IT IS IBM (HERE IN GOOD OLE NORTH CAROLINA) THAT IS BLAZING THE TRAIL WITH GERMANIUM PROCESS TECHNOLOGY, NOT AMD (THEY SIMPLY LICENSE IT FROM IBM).
the work that ibm does with soi and siGe is also done in NY
Corporate offices
International Business Machines Corporation
New Orchard Road
Armonk, New York 10504
914-499-1900
Mailing address
IBM Corporation
1133 Westchester Avenue
White Plains, New York 10604
United States
by the way , amd and ibm have a cross license deal , just like ibm had with motorola
so what makes you think that amd has to pay for using ibm's siGe patents ?
IBM has the world's largest IT research organization, with more than 3,000 scientists and engineers working at eight labs in six countries. (5/05)
· With 3,248, IBM earned more U.S. patents than any other company for the twelfth consecutive year in 2004. Over the past four years IBM inventors received more than 13,000 patents -- approximately 5,400 more than any other patent recipient. (5/05)
· Software accounted for more than 40 percent of the 3,415 U.S. patents awarded to IBM in 2003. IBM received nearly three times as many patents as Microsoft, and twice the combined total awarded to its four closest software industry competitors. (2/04)
the story is a old story and is hard to find links on it , but it was a true storyQuote:
Care to back the up w/ some FACTS?
is that why the P4 was hot too ?Quote:
The reason Prescott was SO HOT was not that IBM had better process technology than Intel, it is that the pipeline was SO BLOODY LONG that they had to ramp up the core speed above what 90nm process tech could reasonable do without LARGE current leakage. This was simply a design FLAW on Intel's part (31 stage pipe vs 18 for Willamette).
it is not the long pipelines that made the prescott to hot
the P4 northwood was 20 stages , and yes the prescott was 11 more stages
the reason why apple dropped ibm , was because ibm would not make enough cpu's for them , apple wanted a bigger supplyQuote:
IBM was having the SAME problems with their 90nm tech. I had a friend who worked on the design for the PowerPC G5 core and he said that this was the underlying reason why Apple dropped Motorola/IBM and went to Intel. IBM simply could not scale up the GHz with their 90nm technology. The chip got WAY too hot.
remember it was ibm who was responsible for amd opteron getting fixed , that is how ibm ended up with amd's hypertranport
that is pure bull , have you even been in any of the buildings that ibm has in the rtp ? by the way , what do you think that rtp stands for , i thought that it was funny how you had to use the intials after you used the full nameQuote:
Not NEARLY as much work as is done in the RESEARCH Triangle Park Facility in RTP, NC.
ibm has about 20 sites in RTP not just the one , i have been around to a few of them
as far as their siGe work , none of it is done there
i use to get tractor trailer loads of computer from with in the triangle when the companies was upgrading , i built them up for kids for free in my count on the coast , back then they was paying companies to haul them off , it is not that way now , but i made a lot of kids happy
who said it was free ?? when ibm and motorola was together , do you think that mororola charged ibm for it's patents , or apple ? how do you think that apple had hypertransport in their systems before they went to intel ? how do you think that ibm has hypertransport on thier cpu's ??Quote:
Because I know a few of the patent lawyers HERE at IBM. IBM gave NONE of that away. Companies have to PAY to license technology (whether in terms of cash, or returned licenses - none of it is free).
the companies are doing their R&D together is why they are sharing patents
you do know that ibm does not even have a fab in NC ?
well i think that there is a lot more to the story then that , like apple wanting the cpu's cheaper , and ibm was working closer with MS and the xbox , which was designed right there is raleighQuote:
IBM couldn't make enough CPUs because they couldn't get good yields at the speeds Apple needed. It was NOT a matter of Fab capacity (Apple has NEVER sold that many computers).
you are a funny little boy , the question was why you had to use research triangle park and RTP like they was two different placesQuote:
YES, I have in fact. And the PO for RTP accepts mail labeled as BOTH RTP and Research Triangle Park. I think it is so funny when you resort to being a jack a $ $ when you have no facts to backup anything you spout (and that is ALL you do - spout anti-Intel propaganda all day long)?
and where am i spouting anti intel propaganda ? i think that intel does a good enough job of that them selves
and just how do you think that it is free ?? , i never said free to these companies , they have to have something to trade , plus they are doing thier R&D together , in NY in the catskillsQuote:
You DID with this statement (2 posts up):
no they are notQuote:
YES boy genius, I know this quite well. But they ARE working on SiGe technology here. You don't need a fab to work on the materials.
same to you , we will wait for you to prove that siGe is being tested in a non fab enviroment , never mind even being tested in NCQuote:
I'm done w/ your BS until you link some FACTS to backup the crap you spew out here.
TheGhost, BrentPResley, please settle down.
both of you are right somewhat regarding prescott vs athlon64, and Intel's 90/65nm vs AMD/IBM 90nm.
Die shrinks used to have a set forumal of constant scaling for various parameters. However, at 130nm, 90nm, and going even further down to 45nm, scaling down becomes difficult. What's 2/3 of 10 atoms. 6 atoms or 7 atoms. Whats 2/3 or 2 atoms, 1 atom or 2 atoms... I hope you get the picture. Strange quantum mechanics type things start happening that are totally unexpected. So, whereas in the past it was certain each successive die shrink would increase transistor density by about 30% and increase transistor switching speed by about 30%, that is by far no longer the case. Old rules out the window.
I believe Intel's prescott suffered from both manufacturing and design problems. Inherently adding extra (non execution stages) with lots of dynamic control logic made the design not just less efficient in IPC terms, but also as well in terms of power/heat.
At the time, Intel was agressively upgrading to 300mm wafers, and 90nm. Until stepping D or there about, many months later, Prescott was very hot. Its somewhat understandable. Intel needed time to master and fine tune the production process. I think from the beginning, Intel engineers under-estimated the special requirements for deep sub micron short channel effects, in particular the leakage through gate oxide causing dramatic escalation in unwanted static power. Intel again had these problems with 65nm. It seemed with each die shrink they were taking two steps back, and then through several new stepping and many months, taking three steps forwards.
Thus, if hypothetically you could make a prescott die using AMD/IBM 90nm, and compare/contrast to Intel's 90nm, you perhaps might have improvements, but not quite the power efficiency of Athlon64, and especially not Core 2 Duo.
In conclusion, a few more words about 65nm and beyond. I imagine Intel engineers spent many difficult rigorous years perfecting and tuning the design of Core 2 Duo. And then, on top of that, many more months and years researching, developing and fine tuning the manufacturing process. The culmination of all their pain staking work is remarkable but by far it was not easy. Its very important to take note that there are well over 40 adjustable transistor parameters, and dozens of strange effects that become prevalent as you shrink more (90nm->65nm etc..)which until recently were neglected, and with which scientists and engineers have little experience with.
If I could provide a rough analogy from traditional lithography scaling (180nm, 130nm) to now (65nm, 45nm) it would be the difference between car assembly used for old Ford model T vs 2007 Ford GT. On the outside it seems they are both just cars, made on assembly lines. But, there are thousands of differences. Not just how fast things are done, or even the design, but a completely different approach to manufacturing.
I dug up first sighting of 65nm P4 for you:
http://www.tomshardware.com/2005/10/...tel/page3.html
seems Intel did remarkably well at 65nm, all things considering. (Load power consumption for SYSTEM dropped from 200W to 186W, compared with P4 Prescott L2=2MB)
You're right, AMD's 90nm isn't in the same league as Intel's 65nm process technology... it's better. That's why AMD can make a dual-core desktop with a maximum tdp of 35w of a old architecture in 90nm, and intel can only deliver a desktop dual-core with typical tdp of 65w of a new architecture in 65nm.Quote:
Originally Posted by brentpresley
K8L in 90nm would still kick the crap out of conroe in 65nm, period.
This question it's so ignorant at so many levels.Quote:
Originally Posted by brentpresley
As i pointed out, you don't have a clue of what you're talking about, like alwaysQuote:
Originally Posted by brentpresley
So intel 65nm it's best because it was the first? Wow really technical.Quote:
Originally Posted by brentpresley
And sorry no Intel don't have 2 fabs in 45nm right now. They have only one and there's no way you would know what stage they are.
really?
but i use my comp mostly for games , so unless k8l is like cheap and stuff. i prolly wont get it ...
G80 7950GX2 equivelant or RD600 is where i will burn my moeny.
so how will this compare to kentsfield?? is there a difference between packaging 2 dual core quad core cpu and a native quad core cpu??? can someone explain?? kentsfield is too expansive anyway, $1000 + for X6700 2.66GHz and prolly $600 for Q6600 2.4GHz
well is it cheap?? like below $500USD maybe $400?? heh
i thought that intel did good when it went to the pressler , the thing with the pressler was that intel never would raise the mhz over 4ghz with itQuote:
Originally Posted by ***Deimos***
i think that intel would have done better taking the P4 northwood and just shrunk the die , intel didn't have to worry about 64 bit for a while , and a shrunk northwood would have lasted intel until the conroe came out , intel in my opinion would have been a lot better off
by the way , i'm always settled down , and don't get excited
i know exactly what you are saying , they are going to hit a wall directly , and will have to find another way around it for performance that they think that they needQuote:
Die shrinks used to have a set forumal of constant scaling for various parameters. However, at 130nm, 90nm, and going even further down to 45nm, scaling down becomes difficult. What's 2/3 of 10 atoms. 6 atoms or 7 atoms. Whats 2/3 or 2 atoms, 1 atom or 2 atoms... I hope you get the picture. Strange quantum mechanics type things start happening that are totally unexpected.
they are moving so fast with die shrinks that neither of them are going to make a whole lot of money , especially the price that they are selling for , the smaller the die , the less your percentage of good dies , i know that while the atoms get fewer and thinner you are going to have more leakage , and that you can just go down but so far with voltage because you need to have a certain voltage for the minimum bandgap , which i think what they are using is 1.1 volts for silicon
i would say that amd is having the same problem , but i also believe that ibm has been great help to amd to solve these problems , this also helps ibm out also , if it wasn't for ibm , i do not think that there would have been a opteron that is as good as it is , both companies now work closely with their R&D departments , one reason why i believe that amd is going to build a fab in NYQuote:
In conclusion, a few more words about 65nm and beyond. I imagine Intel engineers spent many difficult rigorous years perfecting and tuning the design of Core 2 Duo. And then, on top of that, many more months and years researching, developing and fine tuning the manufacturing process. The culmination of all their pain staking work is remarkable but by far it was not easy. Its very important to take note that there are well over 40 adjustable transistor parameters, and dozens of strange effects that become prevalent as you shrink more (90nm->65nm etc..)which until recently were neglected, and with which scientists and engineers have little experience with.
but it seems that sometimes some people try to enjoy them selves at the expense of others in a amd thread to try and show why intel is so much better , this the reason why i do not post in intel threads unless i am asking a question here
i enjoy a good conversation , especially on the abilities of amd and what they are trying to do :)
AMD is switching thier value chips to 65nm process.. I believe those chips will not be SiGe. Only the FX chips on 90nm process will be SiGe. Just an assumption, But I think this is what AMD is going to do.. In this case it would make sense.
~Mike
Quote:
Originally Posted by brentpresley
Wha?
and amd's 45nm test was done 3 months after intels was done , but there is a difference doing it on sd ram and doing it in a cpu that will work
" the smaller the die , the less your percentage of good dies "
huh? Defects appear statistically per wafer area. If die is smaller, then there is less chance of defect. Also manufacturers try to make square dice so more can fit on circular wafer.
arisythilia,
usually when I hear "SiGe", I take it to mean SiGe substrate used for high performance bipolar transistors.
to be perfectly clear, you mean SiGe used to strain silicon..
http://www.research.ibm.com/resource...rainedsilicon/
i know that wafers have a certain amount of errors on it , that is why the wafer that amd uses costs about $200 more then the wafer that intel uses , but the errors i was talking about was the process of the apm actually making the chipQuote:
huh? Defects appear statistically per wafer area. If die is smaller, then there is less chance of defect. Also manufacturers try to make square dice so more can fit on circular wafer.
this is what i was told anyway , the person that told me could be wrong , except the wafer price is right , or close to it , intels price is about $64 and amd's price was about $258
No arguments to contradict the well know facts that i pointed, right?Quote:
Originally Posted by brentpresley
So thread-crapping again, right?
You know what's funny, i've already insulted you in every possible way and not even a warning i've got, and yes i was banned and registered with the same nick... god you're dumb.
Thanks for the link proving again that you know jack :banana::banana::banana::banana: and are a liar.Quote:
Originally Posted by brentpresley
Google and you find out that the second fab received a significat delay and the third, well probably not happening.
Intel's quad core comes at quite a premium.
Anything out yet about AMD's pricing? (I want one no matter what :) )
- lk
Good going DoubleZero....you've earned yourself a bit more than warning: a ban.
And a closed thread until further notice.
EDIT: btw brentpresley and The Ghost...you're not getting off free either.