Printable View
well that lookes pretty promising.
checking the pins isn't usefull at all.
imagine what IF you find a difference between let's say 15pins.....what to do now? °_°
this registerything looks much better to me. i hope someone can figure it out (maybe author of CBI).
let's have a look
mfg
Why would AMD put that footnote there if multis greater than 25 are supported?
At least we could try and see how would it react to a faulty FID code.
Quote:
Originally Posted by largon
Any idea how we are gonna go about programming this?
Tom
The only way I can think of is to somehow mod a BIOS to perform this write at startup.
but it also should have error handling (not sure how its done within the BIOS) in case this fails, and these MSRs are write-protected even at POST.
Depends whether its programmable. It should be. Just need to load the new bios into it. might not be able to do it when its running as its using that value then?
Maybe a special rig will need to be made up just to load the value into the chip
Tom
The FIDVID_STATUS registers ARE programmable, that how you lower the multiplier. The trick is finding out how to keep the proc from comparing the NewFID with the internal MaxFID, internally. You could either try to circumvent this comparison, raise the MaxFID, or block the proc from seeing the MaxFID value.
First question is: through what pin(s) is the NewFID written, and is/are the pin(s) used for anything else?
it should only take a few assembly lines of code, the problem is to handle the error it might case. Its not a problem in windows as there's a built in error handler, but if the EH isn't used it would BSOD when I tried to write to MSRs that were not there or write-protected.
So in windows you just reboot, in bios you can't, you must have error handling to be able to at least have a POST.
So have you tried to write code for this coolest?
Tom
No, there are two MSRs. The C001_0042 is the status MSR, it tells you the current settings.
When you want to change something you do it using the FIDVID_CTL register (control) which is the C001_0041. You set a new FID and/or VID and apply, if the values are within the specific range (CPU checks by values in FIDVID_STATUS) it changes, if not it ignores.
GCPUID can change the FID and VID on the fly. That's why I know what I'm talking about. the problem is that you have to use the FIDVID_CTL MSR to set new values, the FIDVID_STATUS MSR is Read-Only.Quote:
Originally Posted by welshtom
Try and point it toward a new MaxFID location perhaps?Quote:
Originally Posted by Mr. Tinker
everyday we get more informations..i wonder how close we are now :banana:
But what about the 'connections' between the pins on pirs CPU, have they anything to do with the FID controls?
I think we must give up on pirs cpu, no way we can tell what the difference is. If we can come up with a piece of software that will do the trick i think it will be a more useful solution
TOm
They are most likely only fibers/dust/hair or something alike.
btw. FnF, could you compress those pics you posted earlier or edit them to be links?
Well, 'we' aren't that close yet.Quote:
Originally Posted by |SiLA|
Those techdocs have been hanging around for this long, and no1 was able to do something with it.
I doubt if we will tbh.
It could be well possible that some registers are only writable once, or that the pins needed to do the trick are to far off to connect them nicely.
The only solution that does sound usable is to reroute the check, so that it never takes place. But have we got the knowledge to do so?
Edited to links :DQuote:
Originally Posted by largon
I have a board coming back from malves that i wouldn't mind sending to someone who knows how to do this. but would like it back. but would need to find a processor.
that is my donation to this
Nice donation, now we only need to find a CPU :)
i have an offer to buy a dead venice 3200 for $60.
LOL, 60 bucks is a bit much for a dead CPU... Should be more around 10 bucks :)
well, the thing is he was trying to take the ihs off and cut 2 pins off a register or whatever they are on top.
What's the plan? Compare resistance values of all pins with those of an unlocked cpu? I think uwackme's plan was good too: scrounging for bridges.
Edit:
Try and talk him down. We can raise the funds. I am weary of buying a dead CPU because things like "the chips on top aren't connected" could throw off pin resistance.Quote:
i have an offer to buy a dead venice 3200 for $60.
EDIT: HOLY CRAP! COULD THE MAXFID VALUES BE KEPT IN ONE OR MORE OF THOSE CHIPS ON TOP?! THAT MAKES SENSE! IT WOULD BE LESS OF A DESIGN CHANGE FROM THE AXP'S!!! It's also a likey place that could have been accidentally messed by Pirs.
AFAIK, those "chips" next to the CPU die are all capacitors and they can't store any info concerning the cpu-multi. ;)Quote:
Originally Posted by Mr. Tinker
What are they for? Where did you hear/read that? I want to make sure. It's worth a try. Doesn't it make sense though?