Yoh guys,
thank you for replying. Some friends told me too not to change the jumpers.
But what are those jumpers for when the overclockers shouldnīt touch them?:confused:
Yoh guys,
thank you for replying. Some friends told me too not to change the jumpers.
But what are those jumpers for when the overclockers shouldnīt touch them?:confused:
Has anyone here got the DKT3RS+??? I am looking into purchasing one, although it looks like it may have to come from across the pond....
Suppose your right indeed, so you reckon i should fiddle around with the GTL's? for the High FSB testing, i was using 61-61-58 , normal computing im using 63-63-61. Any suggestions perhaps? or is it a wild shot anyway?Quote:
Originally Posted by angoholic
I'm starting to hate mine...
Can't even hit 450FSB...it will boot...it won't post...God knows what is wrong...
1.3V VTT
+100 mV vcore
1.3V NB
Crucial Ballistix - D9GMH - 2.1V @ 4-4-4-12 - not the problem :)
Any ideas on where to go and what to do?
LE: The cpu is a E8200
For 0/2>>61Quote:
Originally Posted by thijs
For 1/3>>61
NB >>>>>58
???:confused:
Indeed, thought almost everyone was trying it like that?Quote:
Originally Posted by ViViD
Just tried 63-63-58 aswell , but not much of a difference.
How do you think of the Skews anyway?
OC PDF guide of DFI says above 580Mhz 100 on #1 and 200 on #2 ( NB ),
How do you guys think about that?
Still trying to figure out what the best FSB ref is, always sticked to 28, but perhaps 2B or so is fine aswell?
Yoh guys,
I am just sitting in front of my new DK P45-T2RS Plus and ask myself where to connect my two Samsung HDDs. There are 6 SATA connectors (SATA 0 to SATA 5, ICHIOR) and two JMB363 supporting SATA 6 and SATA 7.
I donīt want to create RAID. But which connectors are the best for my HDDs?:confused:
I Thinck First & Second Sata Is Better For HDD
I Almost Set In Both No Diffrence Between But In Setup For Boot From Master HDD U Must Set HDD In Sata0
well, i did an hour Prime95 SmallFFt. What is that test like ? :shrug:
However, any less voltages or a different GTL's combo and it won't work for me
http://images3.hiboox.com/vignettes/...cdab0f72ab.bmp
http://images3.hiboox.com/vignettes/...68ebd5b43c.bmp
:)
u have to test that with large ;)
Ok thanks, i'll try that
Hope it does not need a lot more voltage cause i don't wanna blow that thing :D
Yoh guys,
I am happy to get my new DFI started. I am trying to get my head around all these bios setting. I set 450 MHZ fsb but I havenīt found the 3:4 divider yet to run my memory at 1200 MHz. How high should be the nb voltage.
Should I run 0,67 GTL or what?:shrug:
Fritz, i think your best bet would be 333/800 divider... and set 500MHz fsb :D
or maybe 400MHz fsb with 266/800 divider, it's up to you
PrimeLarge @600x6 with a small boost on Vcore and VTT
http://images3.hiboox.com/vignettes/...3a3f8694c4.bmp
Holy board, always on air. i 'll give her a well deserved break now
(i've just received my m3h5 :banana:)
max@prime large should be ~625MHz (and for the M3H5 354MHz HT :D)
angoholic what % of gtl vs vtt is your e8600 liking?
depends on board (tested 3 of them) and fsb ;) you cannot take the same, just find it out.
I just don't know how you guys get the best out of this board because mine is a pain in the a**.
This was by far the worst day of overclocking I ever experienced. It's 5:41 in the morning and I've been up all night trying to get it to do 450FSB.
No luck.
I'm using Crucial Ballistix PC2-6400 with D9GMH chips, so the RAM shouldn't be the problem (I was using the 400/800 strap the whole time).
I got to the point where it was relatively stable (almost one hour prime95 blend stable, I stopped it) @ 445FSB.
But from there all hell broke loose.
446 - semi-stable
447 - not stable at all
448-449-450-451 - insanity
The board would boot...crash...wouldn't post anymore, I had to shutdown and poweron and the problem would go away.
I raised the voltage on the NB a bit and this wouldn't happen anymore, but I started getting 26 code post errors.
I upped the voltages but nothing worked...
These would be the settings and hw:
E8200 @ 2.25 ~ 2.36 V
DFI DK P45+ : nb : 1.3V (voltage reading, the setting in bios was larger)
vtt : 1.26 ~ 1.3V
GTL : 0.67 0.67 0.67 also tried : 0.61 0.61 0.58 as the DFI oc guide suggested, but no luck.
PLL : stock
Everything else stock.
RAM : 4-4-4-12 @ 2.2V and also 5-5-5-15 - nothing...
GPU : stock everything, 8800GTS G92
PSU : antec earthwatts 430. Could this be the problem?
Any ideas?
Any help would be appreciated.
Thanks!
LE : the CPU shouldn't be the problem either. I've seen the same FPO used on other boards that did 475FSB with no problem...
You haven't tried enough GTLs. Every board and CPU is different, when my GTL values were wrong, I couldn't even do 420FSB :P
Or maybe FSB hole. Just skip over and try something higher like 460.
Intel Dualcore E6300 - 2,8GHz(10.5*266) with Zalman 9700NT
DFI DK P45-T2RS Plus
Training :D
E6300 @ 4,45Ghz - PI 32Mb - Vcore 1,425V
http://i245.photobucket.com/albums/g...32Mb_1425v.jpg
Realy Hard Over 500 FSB On Quad With Air Cooling :D
http://valid.canardpc.com/cache/screenshot/575657.png
Well, there is a strange thing.Quote:
Originally Posted by sabe
The only settings I have for the GTL are 0.58 0.61 0.63 0.67 and these are for the NB and for one of the GTL 0/2 or 1/3, I can't remember, but for the other one I have a huge selection of GTLs.
What would be a good way of finding the right GTL for the CPU?
Here's my new E8400 E0 and my new DFI P45 UT (sorry couldn't find another thread for the UT version)
Both seem to be pretty good clockers. These are my 24/7 clocks so far, achieved pretty easily.
http://img33.imageshack.us/img33/900...0stable.th.jpg
Yoh guys,
Iīve got my system prime95 stable using the follwing bios settings:
Boot Up Clock 350
CPU Clock Amplitude 800mV
CPU Clock 0 Skew 100 ps
CPU Clock 1 Skew 100 ps
CPU VID Special Add +100mV
DRAM Volt. 1,908V
NB Volt. 1,4200V
CPU VTT 1,31V
Clockgen Voltage Contr. 3,45
All GTLs 0,67
FSB VRef. Auto
Ajust CPU Temp. +5
DLL and RCOMP Setting By Menu
CH1 DRAM Default Skew Model 3
CH2 DRAM Default Skew Model 3
RComp Setting Model
PL 9
RAM Speed 1176 MHz
Thatīs the good news so far. But I really want to enhance the "read" and the "copy" data throughput. Everest shows me right now:
Read: 8773 MB/s
Write: 10333 MB/s
Copy: 8095 MB/s.
What am I supposed to change in the bios to improve the data throughput?:shrug:
Subtimings & Fine Delays ;) Also Data transmitting
http://img2.abload.de/img/cachemem3u0e.jpg
the copy is bad i know... ;)
absolutely sickQuote:
Originally Posted by angoholic
:yepp: copy suks n read should be higher:D
but i like da write speed:p:
i just got my dk+ i be torturin her a bit next week
i'll eat my sticks of ram if a gigabut board can get them scores
Angoholic you should post these in d9 thread for all to see
WoW :eek: It's Fantastic M8 :shocked:Quote:
Originally Posted by angoholic
664 MHZ FSB 99% FSB OverClock:clap: Congrat Man
whats the best bios for the board please
i loaded bios 320 funny stuff lol
booted @ 512fsb .everest and cpuz tell me i'm @330
setfsb tells me i'm @ 512:rofl: i know i'm @ 330 cause of everest scores
I'm using D45PDC29, worked best for me, especially with 2:3 divider
i loosened timings like crazy n i cant get to 500fsb
i think the board dont like either of my 4870 cards i get blue screen
put in my 8800gt i think my board is a flake cant hit 475fsb stable
i can boot @ 500 but rofl
tried 812 to newest bios
damn board needs 67% gtl setting to be stable:eek:
67 In Bios Is Default GTL Yes?
Quote:
Originally Posted by ViViD
:yepp:
but my cpu needed less than 63% on my other dfi boards
Yoh guys,
I am running my system with the settings below.
My goal is to set the bios option enhance data transmitting from fast to turbo.
Every time I am changing from fast to turbo the computer takes a while to start and if the pc finally starts the multipler has been changed from 8.5 to 6.:confused:
The other question I have is how to change the tRFEs in the bios from 3120T to 16.838T. I know I could use memset vers. 4 to reach this goal but I want to understand the memory bios options. It was hard enough to get my head around all the other stuff in the bios.
BIOS v. 03.10.2008-D45PDA03
CPU Feature Page
Thermal Management Control................Enabled
PPM (EIST) Mode............................Ensabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Enabled
Execute Disable Bit.......................Disabled
Virtualization Technology.................Disabled
Core Multi-Processing.....................Enabled
Main BIOS Page
Exit Setup Shutdown......................Mode 2
Shutdown after AC loss....................Enabled
AC Shutdown free..........................Enabled
O.C. Fail Retry Counter...................1
O.C. Fail CMOS Reload.....................Disabled
CPU Clock Ratio........................... 8.5 x
CPU N/2 Ratio.............................Disabled
CPU Clock.................................470
Boot Up Clock.............................375
CPU Clock Amplitude....................... 800mV
CPU Clock0 Skew........................... 100ps
CPU Clock0 Skew........................... 100ps
DRAM Speed................................333/800=1129 MHz
PCIE Clock................................100MHz
CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
Voltage Setting Page
CPU VID Control........................ +100mV
DRAM Voltage Control......................1.95V
SB Core/CPU PLL Voltage...................1.55V
NB Core Voltage...........................1.295V
CPU VTT Voltage...........................1.25V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
CPU GTL 0/2 REF Volt......................0.67X
CPU GTL 1/3 REF Volt......................0.67X
North Bridge GTL REF Volt ................0.67X
FSB Vref.................................. Auto
DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Disabled
Clock Setting Fine Delay..................look in the list below.
Flex Memory Mode..........................Auto
CAS Latency Time (tCL)....................5
RAS# to CAS# Delay (tRCD).................5
RAS# Precharge (tRP)......................5
Precharge Delay (tRAS)....................15
All Precharge to Act......................6
REF to ACT Delay (tRFC)...................54
Performance Level.........................8
Read Delay Phase Adjust...................Auto
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR).................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)...............Auto
Ranks Write to Write (tWRWR)..............Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................Auto
ALL PRE to Refresh........................Auto
Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto
Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto
Clock Setting Fine Delay Page
DLL and RCOMP Settings .................ByMenu
Ch1 DRAM Default Skew.....................Model 3
Ch2 DRAM Default Skew.....................Model 3
RCOMP Setting.............................Model 1
Fine Delay Step Degree....................70ps
Ch1 Clock Crossing Setting................Nominal
DIMM 1 Clock fine delay...................Current 1924ps
DIMM 2 Clock fine delay...................Current 1924ps
Ch 1 Control0 fine delay..................Current 194ps
Ch 1 Control1 fine delay..................Current 194ps
Ch 1 Control2 fine delay..................Current 110ps
Ch 1 Control3 fine delay..................Current 96ps
Ch 1 Command fine delay...................Current 134ps
Ch2 Clock Crossing Setting................Nominal
DIMM 3 Clock fine delay...................Current 1924ps
DIMM 4 Clock fine delay...................Current 1882ps
Ch 2 Control0 fine delay..................Current 152ps
Ch 2 Control1 fine delay..................Current 152ps
Ch 2 Control2 fine delay..................Current 70ps
Ch 2 Control3 fine delay..................Current 56ps
Ch 2 Command fine delay...................Current 152ps
Ch1Ch2 CommonClock Setting................Auto
Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto
Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto
http://www.abload.de/img/timings-fast_fast1dqi.jpg
http://www.abload.de/img/timings-fast_fast1dqi.jpg
You can't change tREF in bios. tREF of 16838T is far too long and will only cause memory corruption. The reason you get a drop in memory latency is because you are reducing memory subsystem bandwidth from overextending Self Refresh period. This is for benching only. It's not something you can use for every day. Enable all PL phase pull-ins and set PL to 1 higher. Your bios is pulling phases in on auto. See Read Delay Fine Adjust is +17T, that means Channel A PH1 + PH5 are both pulled in. PH1 = +1T, PH5 = +16T.
Thank you Mike,:up:
would it be a great difference if I leave the Pl on 8?
http://www.abload.de/img/pull-ins3ub7.jpg
i noticed if i dont set ALL PRE to Refresh to 8 on 500+fsb my fsb reverts to 333
anyone else get this?
fritz dont enable all pulls do eaeee eaaee
angoholic can you share bios setting for that nice cas4 run
Well PL9 with all phase pull ins enabled is same as PL8 :)
what is tREF and how does it affect memory performance?
tREF is memory ic self refresh period. it's basically the turnaround for refreshing all blocks of memory. Basically self refresh goes through all addresses and checks if data is valid or not, if its valid it refreshes it, if its invalid it precharges it. It uses idle memory bandwidth, but setting its value to the maximum you can fit in the register, you decrease memory latency by 1-2ns at the cost of killing actual memory performance under heavy utilization (since you now need to fetch lost memory data through FSB instead of accessing locally) and risking losing data in memory. It's a benchmark hack nothing more nothing less.
The correct value is calculated by:
REF[T] = REFI[ns] / Ck[ns]; where REFI[ns] is Refresh Interval in NS of ICs (usually 7800ns / 7.8us) for performance memory, Ck[ns] is clock period of current frequency (1000/bus_frequency) bus_frequency is half DDR.
So usually at 1066mhz, tREF is 4171T. 4171T = 7800ns / 1.8666ns, where 1.8666ns is clock period at 1066mhz DDR, 1000/533.
The 16838T value mentioned is simply the largest value the tREF mchbar register can hold. its a 4bit register, so FFFFh is largest timing you can use.
ok thanks for the info.i dont ill mess with this.
16838T is too high even for a bench the odds of corrupting windows is high
has anyone ever had orthos blend have one core fall behind?im not talking 2 or 3 thread but
like this.im on fft 640 and core 1 is at thread6 and core 2 is at thread 2 of 512 fft
Does this mobo like quads? Anyone hit 500+fsb 24/7 with quads?
And can it work properly with 1200mhz 2x2gb memory?
i gonna get a set of lv 9600 soon i did 1140 on my redline and 1300+ with d9Quote:
Originally Posted by Hu13caP
only weak point i see is running 4 sticks but my board is not as strong as the others ive seen
500fsb is no problem
but 4 sticks @ 1200mhz :down:
i thought i read somewhere that dfi boards setup(optimized) for 2x2GB configuration.
:yepp:dfi boards love 2x2 kits especially the x48Quote:
Originally Posted by radaja
newest bios supports 16 gigs lol
@mikeyakame,
Yesterday, I enabled all the Channel Phases Pull-Ins running a Pl of 9 and Everest showed me the very same memory datas like I had with Phases Pull-In set on Auto running a Pl of 8.
Dear Mike, your knowledge about all that stuff is really legend:clap:
Later I tried to run all Phases Pull-Ins on enabled plus a Pl of 8 but my system refused to start. That means I could not run my system with all Phases Pull-Ins on Auto combined with a Pl of 7.
Looking back to the tFREs of my system the value of 4,399T should be the magic number (7800/(1000/564)= 4,399 isnīt it. That means I could change the tFREs with Memset vers. 4 to this value without causing memory instabilities, right?
But there is still another thing that really bothers me- I am having two sticks of the F2 9600 memory but with my settings right now I am running under the default speed. This board doesnīt have a 3:4 divider so I am not able to run a fsb of 460 MHz or higher combined with a high memory speed.
Do you have a recommandation -except reducing the fsb- to run a high memory speed plus a high fsb (460 Mhz or higher)?:shrug:
try to run higher than 500fsb:DQuote:
Originally Posted by Fritz_the_germ
Higher FSB you go the looser you need to go with PL.Quote:
Originally Posted by Fritz_the_germ
www.jedec.org/download/search/JESD208.pdf
If you're interested in tREF (Self Refresh) and other memory info, take a read of that PDF I linked. It's Jedec DDR2-1066 standards. It's got a lot of really useful info and diagrams on the fundamentals. There should even be a section explaining what Self Refresh does and how it works. :)
There is no real performance gain from changing tREF so forget about it. It's just a method of self refreshing memory ics during idle clocks to improve bandwidth.
Thank you Mike,
your reply and your link is precisely what I īve been looking for.
I know this rule of a thump, the higher the fsb is the higher has to be the PL.
the higher fsb the higher has to be the plQuote:
Originally Posted by Fritz_the_germ
Yes, you are right. The higher the fsb the higher has to be the PL.:yepp:
the board has surprised me
it will boot 500x9 1.18v :rofl: and needs 1.33v to be fully stable:eek:
Was bored for a bit today again, so i tried some more and came up with the following. all benching done at air, batch is Q822A435
with vid of 1.0250. havent really looked in to superpi tweaking to much yet, so i suppose there is some room for improvement :
http://www.thijskramer.nl/tweakersdo....063-E8600.JPG
Nice!
What cpu skews have you used?
I have a question. Do you think that this mb will be able to run 1200MHZ with 2 kits 2x1GB of Mushkin d9 ram? One kit is Mushkin 2GB XP2-8000 Redline with 4-5-4-11 latencies (996528) (D9GKX chips) and the other one is Mushkin 2GB XP2-8500 5-5-4-12 (996535) (D9GMH). Both kits do 1200MHZ with about 2.32V set in bios on my Gigabyte EP45-UD3P but I can't get them to work togheter. Maybe my UD3P doesn't like because they are different (D9GKX and D9GMH).
I will use this mobo and memory with my E8400 cpu :).
Zsamz I hope u will try and post a response to this ... because u seem to have much knoledge on DFI mobos ... I will get the mobo in about 10 days (a friend will be coming home from SUA and I asked him to grab one for me ... newegg has them for 115$ and I think that's just great price :D)
no way you gettin 4 stix stable on the board @ 1200Quote:
Originally Posted by kagula323
and memtest your 996535 set when i used gigagut boards it killed 4 of those :rofl:
Thank you zsam. Just canceled the order on the DFI LP DK P45 T2RS Plus. If that mobo can't do 4x1GB DDR2 1200 than it's no use for me. Any P45 mobo out there that would be able to do what i need that u can think of?
If you mean that the OP won't get 4 different sticks stable, that would be correct. If however you mean that he won't get 4 sticks stable at 1200, period, then i'm afraid you are wrong. As a quick look here, would confirm.Quote:
Originally Posted by zsamz_
i'm sure the ut p45 canQuote:
Originally Posted by kagula323
was my mistake to buy a dk
kitfit we both know how much better the ut is;)
Yoh guys,
my system acts a little strange in the last days.
I am able to run prime95 (custom) for more than six hours without errors but as soon as I start up LinX 0.6.0 I am having a bluescreen after the fifth loop. First I thought there is something wrong with my memory sticks. Memtest86+ vers. 2.11, test#5, runs for more than 2 hours without errors.
Does anybody have an idea what could be wrong?
How is LinX testing the system compared to prime95?
My settings are:
Exit Setup Shutdown......................Mode 2
Shutdown after AC loss....................Enabled
AC Shutdown free..........................Enabled
O.C. Fail Retry Counter...................1
O.C. Fail CMOS Reload.....................Disabled
CPU Clock Ratio........................... 8.5 x
CPU N/2 Ratio.............................Disabled
CPU Clock.................................470:shocked:
Boot Up Clock.............................375
CPU Clock Amplitude....................... 800mV
CPU Clock0 Skew........................... 100ps
CPU Clock0 Skew........................... 100ps
DRAM Speed................................333/800=1129 MHz
PCIE Clock................................100MHz
DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Disabled
Clock Setting Fine Delay..................look in the list below.
Flex Memory Mode..........................Auto
CAS Latency Time (tCL)....................5
RAS# to CAS# Delay (tRCD).................5
RAS# Precharge (tRP)......................5
Precharge Delay (tRAS)....................15
All Precharge to Act......................6
REF to ACT Delay (tRFC)...................54
Performance Level.........................8
Read Delay Phase Adjust...................Auto
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR).................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)...............Auto
Ranks Write to Write (tWRWR)..............Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................Auto
ALL PRE to Refresh........................Auto
Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto
Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto
Clock Setting Fine Delay Page
DLL and RCOMP Settings .................ByMenu
Ch1 DRAM Default Skew.....................Model 3
Ch2 DRAM Default Skew.....................Model 3
RCOMP Setting.............................Model 1
Hello. Great result i think. Can you give us the memory settings which do you use?Quote:
Originally Posted by thijs
Hey, where are jumper on the motherboard or bios I can change the strap to go with lower voltage ? Thanks
this thread is almost dead :( so..
PUSH :D
O.K. I will push it.
I had a converted Rampage Formula and set my PL respecting the math. fomular in this site: http://www.anandtech.com/mb/showdoc.aspx?i=3208&p=1
But the point I am still wondering about is if I can take the AnandTech. article just for my P45 chipset. Right now I am running a fsb of 470 MHz and a PL of 8. If I lower the PL to 7 my system wouldnīt start.
If I had a X48 Chipset the formular says I could because: [tRD-(tCL/N)]>[x/N]
N= FSB-RAM-Divider => 7-(5/4)= 5.75 is greater than 2.75/(5/4)=2,2
2.75 is for fsb> 466 MHz.
I doubt that the formular works for the P45 chipset.
Does any math. fomular exist for the P45 too ?
I want to catch the math. relation between the fsb and the PL about the P45 chipset.
Is it possible to run a PL of 8 together with a fsb of 470 by increasing the vnb?
My vnb right now is 1.2950v (=1,26v real), CPU VTT is 1.23v.
Every time I do so my system wouldnīt start and I have to pull the jumper.
pl8 8 is easy even at 500fsb;)Quote:
Originally Posted by Fritz_the_germ
x48 can do pl6-7 at 500;)
only 1 thing is needed more juice:D on nb like 1.38+ get ready for some heat if you got no fans on nb
Thank you for your reply.
That means I could try a PL of 7 by increasing the nb core up to 1.38v (and even more). I will do so.
Where is the temp. limit for nb to make the system unstable ?
temps are what you comfortable with lolQuote:
Originally Posted by Fritz_the_germ
just keep em in the 40s
just dont forget to put a fan on nb
Within the limits of summertime bench-sessions XtremeLabs.org , it was possible to subdue on motheboard DFI LanParty DK P45-T2RS PLUS the FSB in 685MHz:
http://img263.imageshack.us/img263/1267/cpu4114.th.jpg
http://valid.canardpc.com/show_oc.php?id=604832
Northern bridge was cooled only stock!. Memory obviously is not capable higher 1370MHz. The reserve for the further advancement is also very quite good)
In connection with problems arisen with mb, it was not possible to check up more the processor in other tests.
In general memory 1400 + and a LN2 Pot on a chipset) is necessary.
To be continued :)
Higher the NB voltage, lower you need to keep the temps as a rule of thumb. Voltage alone won't kill electronics, but voltage & heat make for a pretty potent destructive force :)Quote:
Originally Posted by zsamz_
Low - Mid 40s for high FSB/tight PL latency is fine if you don't get 30+C days. The hotter your ambient temp gets the lower your NB temp will need to be to maintain stability. In constant temperature mid 40s is adequate, but with variations from day to day, you want to aim for low 40s so when you get that odd day when its warmer than usual, blue screens or hard locks won't drive you crazy or make you waste hours readjusting bios settings.
As much as I love my DFI X48 board, it doesn't like heavy temperature swings when I've adjusted every bios setting to near their limit. If I set everything up in 18-20c temps then I can run everything at its limit as long as the ambient temp doesn't go above 25c or so in my room. If it does then I get random crashes and the only solution is to back off GTLs/DLL Skews/Vrefs/PL until they stop.
I've done it so many times that now I just run my Q9550 at 8.5x400 PL8 and ~61-62ns mem latency, and other than not having to deal with occasional crashes, I don't notice that great of a difference for day to day usage compared to 450+ FSB with PL7. For benchmarks my timings/gtls and such are crappy, but I spent some time tweaking the "relaxed" settings I use day to day with Linpack and OS responsiveness and while Everest cache benchmark tells me I suck, gaming/general use tells me the complete opposite.
You can get good performance from relaxed settings if you spend the time learning them to play nice and get along with together! DFI bios adjustment is so flexible that you can pull off great performance with much lower voltage/heat/frequency cost. Just takes some patience and a keen eye for small details to help you make fine adjustments.
well i do notice a difference in daily usage fom 400-450fsb thats why i'm @ 500+ 24/7@pl7Quote:
Originally Posted by mikeyakame
and if need be pl6;)
Australia isn't very high FSB friendly for at least 6-8 months of the year. Can I go ahead and assume that Europe is a lot more forgiving and clock friendly all year round?
I've done 495MHz FSB PL=7 on P45 at ~1.45V, just needs excessive cooling.Quote:
Originally Posted by Fritz_the_germ
Well, during summer it's quite hot here too, and our houses don't have air conditioning! But our winters are better than yours for sure! ;)Quote:
Originally Posted by mikeyakame
E8400 overclocked to 4GHz, I got an 80mm fan attached to the North Bridge and the NB still hitting temps of 58c
Quote:
Originally Posted by Don_Dan
That sounds pretty good!:clap::clap:
Just tell me how you adjusted the CPU VTT by using the 1.45v on nb.
Did you set FSB Vref on auto, were your DRAM Timing Page on "fast, fast" and did you set "Model 3, Model 3 , Model1 ?:confused:
I'm on my UD3P, don't know what the last settings you mentioned are, sorry... :(Quote:
Originally Posted by Fritz_the_germ
VTT was 1.30V.
Ei horsch eh mol:
Unter dem Kapitel Clock Setting Fine Delay is to find DLL and RCOMP Seetings "By Menu" just down there "Ch1 DRAM Default Skew... Model 3, Ch2 DRAM Default Skew Model 3, RCOMP Setting Model 1.
How was your FSB Vref :confused:
fritz use the pulls its much easier;)
O.K. I will try so.
Is it possible to enable just a part of the Channel Phases (for example Channel 1 Phase 0 Pull-in until Channel 1 Phase 4 Pull-In on "enabled" and let Channel 2 Phase 0 until Phase 4 on "Auto") or do I have to enable all the Channels?
Is there a rule of a right combination?
I know one thing for sure: If a adjust all channels on "enabled" I will lower my PL for just one step.
no not allQuote:
Originally Posted by Fritz_the_germ
i do
eaeee eaaee
it leaves it some breathin room
you wont see pl goin down in windows but it will be -1 pl;)
do an everest test an d you will see
Thank you for your advise. The data throughput on "read" is about 250 MB/s higher than having all Channels on "auto".
It workes really well::clap::clap:
http://www.abload.de/img/read_delay_eaeee_eaaeeih4j.png
But do you have something like a rule of thumb for adjusting the Channel 1 and 2 Phases auto or enabled. I want to understand what I am doing.;)
@zsamz_
I did not try much channel fine tuning yet but did you test that at high fsb too? would do it but currently no DK to test there for me
Quote:
Originally Posted by angoholic
did you kill all them boards?:rofl:
i think i got her to around 500 with phases for pl7
i havent played with ddr2 since i got my rampage
my goal is pl6@500fsb+
i was primin @600fsb last week lol
fritz: see if you can run 5-4-4-9 @ that speed;)
and set your multi to x9
no rules on phases just tighten untill it doesnt boot or unstable lol
i always do eaeee or eaaee or eaaae
secong phase always a bit looser to give some breathing room
@zsamz_,
you tell me so because I am not even running my sticks on default, donīt you?
O.K. I will give it a try CL 5-4-4-9.
your gskills can do 1020mhz easy cas 4 and 1300 cas 5Quote:
Originally Posted by Fritz_the_germ
test then 4-4-4-12-4-42 and 5-4-4-9-4-42 and see whats better forget 5-5-5-15 at that speed
btw when testin max clocks i always do a pass of test #5 with memtest iso before i even enter windows
In my experience with pull-ins it normally goes like this.
eaaaa -> eaaae -> eaeae -> eaeee -> eeeee
ch2 should always have less pull ins at tight pl, also ch2 dll clock fine delay (which ever slot you are using) can be delayed within 15-20ps of ch1 if your memory can handle it. normally ch1 fine clock delay will be 30-40ps advanced of ch2.
so ie ch1 dll clk delay = 330ps, ch2 dll clk delay = 370ps, that is considered advanced.
so ie ch1 dll clk delay = 350ps, ch2 dll clk delay = 325ps, would be advancing ch2 and can make a slight improvement if the pull ins are setup with that in mind. something like ch1 = eeaae, ch2 = eaaee.
you can basically use both dll clk/control delays and phase pull-ins hand in hand if you don't mind doing a lot of adjust, test and repeat, and a full memory test each time before you boot windows so if there is any major problem it'll crash that instead of your OS install :D
it takes a little stress off the nb under load, and puts a little more on the memory subsystem, it helps when the nb clock gets a little skewed under high freq/heavy load because the memory clock delays on that channel will be a little more advanced.
Thank you Mike for your advise,
I am not sure if I got your recommanded combination right.:confused:
eaaaa(=CH1) -> eaaae (=Ch2) -> eaeae(=Ch1?) -> eaeee (=Ch2?)-> eeeee
Does it mean eaaaa should be for Channel 1 eaaae for Channel 2 and so on?
i have been try P45 T2RS PLUS and suffer from VDroop
i want to know P45 T3RSB PLUS have same VDroop??
thank you
Order of changing any channel, or at least that's what I recall it is. You cant just change 1 2 3 4 5, you need to alternate in a certain way between ch1 and ch2 and sometimes dll clk skews.Quote:
Originally Posted by Fritz_the_germ
Yoh guys,
yoh Mike,
I have tried a lot of "Read Delay Phase Adjust" combinations.
Some of them worked, some of them caused bluescreens or C1 faults.
The one I am using right now is on Channel 1 eaeae combined with Channel 2 eaaae. That pushes the Read Delay Adjust +21T as you see below:
http://www.abload.de/img/ram_21tcmus.png
Using the combination CH1 eaaae Ch2 eaaae the Read Dealy gets pushed to +17T. That means as long as the combination is right the setting "enabled" instaed of "Auto will push +4T, right??
So far the easy thing.
Mikeyakame, you mentioned in your last post that "so ie ch1 dll clk delay = 330ps, ch2 dll clk delay = 370ps, that is considered advanced.
so ie ch1 dll clk delay = 350ps, ch2 dll clk delay = 325ps, would be advancing ch2 and can make a slight improvement if the pull ins are setup with that in mind. something like ch1 = eeaae, ch2 = eaaee".
Could you be so kind and give me a little more explaination to that part?
The fine Delay Step Degree shows me 70 ps by using the upper Read Delay Phase combination. The Ch1&Ch2 Clock Crossing Setting is both "nominal" the values below are:
DIMM 1 Clock fine delay...................Current 1924ps
DIMM 2 Clock fine delay...................Current 1924ps
Ch 1 Control0 fine delay..................Current 194ps
Ch 1 Control1 fine delay..................Current 194ps
Ch 1 Control2 fine delay..................Current 110ps
Ch 1 Control3 fine delay..................Current 96ps
Ch 1 Command fine delay...................Current 134ps
Ch2 Clock Crossing Setting................Nominal
DIMM 3 Clock fine delay...................Current 1924ps
DIMM 4 Clock fine delay...................Current 1882ps
Ch 2 Control0 fine delay..................Current 152ps
Ch 2 Control1 fine delay..................Current 152ps
Ch 2 Control2 fine delay..................Current 70ps
Ch 2 Control3 fine delay..................Current 56ps
Ch 2 Command fine delay...................Current 152ps
So where do I have to change the values to get "ch1 dll clk delay = 330ps, ch2 dll clk delay = 370ps, that is considered advanced.
so ie ch1 dll clk delay = 350ps, ch2 dll clk delay = 325ps" ?
I hope you donīt mind my penetrating curiosity but I am pretty amped to understand what my pc is doing when Iīm adjusting "some letters".;)
Yoh guys,
whatīs up? Is there anybody out there?:help:
To bad that mikeyakame is still shooting kangaroos:shoot:
my 24/7 daily use
http://i68.photobucket.com/albums/i1...aprapnewoC.jpg
i just reached 4.1ghz:) too lazy to change the voltage ahhaha
http://i68.photobucket.com/albums/i1...9/supernew.jpg
hawk999: what memory do you use? :)
Team Xtreem Dark 4gB ddr2-1066 5-5-5-15 @ 1.9v (stock volts)
Does anyone know where i can find a LP DK X48 T2RS thread around here????
I happen to have one for some days and i d like to find some volt mods,measuring points etc...
ANY HELP???
Thanks in advance!
@Theorw try this http://csd.dficlub.org/forum/index.php
Yoh guys!
Here is another oced Q9650@DFI DK P45-t2RS Plus:
http://www.abload.de/img/fsb495pl8nan2.png
And some Everest report:
http://www.abload.de/img/fsb495pl8windows7yx56.png
:surf:
fritz i'm gonna play with q9650 +dk can you post bios settings and wich bios you used
ty
Yoh zsamz_
here you go with the BIOS settings. I am using the latest beta (8.19)
Donīt forget the germans mention at first the day and then the month (19.08=german; 08/19 is english) Can you relay to that?
BIOS-Settings des DFI LANPARTY DK P45-T2RS Plus
BIOS v. 19.08.2009-D45PDA819
30.08.2009
CPU Feature Page
Thermal Management Control................Disabled
PPM (EIST) Mode............................Enabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Auto
Execute Disable Bit.......................Disabled
Virtualization Technology.................Disabled
Core Multi-Processing.....................Enabled
Main BIOS Page
Exit Setup Shutdown......................Mode 2
Shutdown after AC loss....................Enabled
AC Shutdown free..........................Enabled
O.C. Fail Retry Counter...................1
O.C. Fail CMOS Reload.....................Disabled
CPU Clock Ratio........................... 8 x
CPU N/2 Ratio.............................Enabled
CPU Clock.................................495
Boot Up Clock.............................345
CPU Clock Amplitude....................... 700mV
CPU Clock0 Skew........................... 100ps
CPU Clock0 Skew........................... 100ps
DRAM Speed................................333/800=1190 MHz
PCIE Clock................................100MHz
CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
Voltage Setting Page
CPU VID Control......................... 100 mV
DRAM Voltage Control......................2.001 V
SB Core/CPU PLL Voltage...................1.55 V
NB Core Voltage...........................1.4075 V
CPU VTT Voltage...........................1.34 V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
CPU GTL 0/2 REF Volt......................0.67X
CPU GTL 1/3 REF Volt......................0.67X
North Bridge GTL REF Volt ................0.63X
FSB Vref.................................. 24
DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Disabled
Clock Setting Fine Delay..................
Flex Memory Mode..........................Auto
CAS Latency Time (tCL)....................5
RAS# to CAS# Delay (tRCD).................5
RAS# Precharge (tRP)......................5
Precharge Delay (tRAS)....................15
All Precharge to Act......................Auto
REF to ACT Delay (tRFC)...................60
Performance Level.........................8
Read Delay Phase Adjust...................Auto
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR).................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)...............Auto
Ranks Write to Write (tWRWR)..............Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................Auto
ALL PRE to Refresh........................Auto
Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto
Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto
Clock Setting Fine Delay Page
DLL and RCOMP Settings .................ByMenu
Ch1 DRAM Default Skew.....................Model 3
Ch2 DRAM Default Skew.....................Model 3
RCOMP Setting.............................Model 1
Fine Delay Step Degree....................70ps
Ch1 Clock Crossing Setting................Nominal
DIMM 1 Clock fine delay...................Current 1924ps
DIMM 2 Clock fine delay...................Current 1924ps
Ch 1 Control0 fine delay..................Current 194ps
Ch 1 Control1 fine delay..................Current 194ps
Ch 1 Control2 fine delay..................Current 110ps
Ch 1 Control3 fine delay..................Current 96ps
Ch 1 Command fine delay...................Current 134ps
Ch2 Clock Crossing Setting................Nominal
DIMM 3 Clock fine delay...................Current 1924ps
DIMM 4 Clock fine delay...................Current 1882ps
Ch 2 Control0 fine delay..................Current 152ps
Ch 2 Control1 fine delay..................Current 152ps
Ch 2 Control2 fine delay..................Current 70ps
Ch 2 Control3 fine delay..................Current 56ps
Ch 2 Command fine delay...................Current 152ps
Ch1Ch2 CommonClock Setting................Nominal
Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto
Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto
Where the hell is mikeyakame? He hasnīt shown up for weeks. The last thing I`ve heard about him was he is going to hunt some kangaroos...
thanks fritz
hopefully i get some time soon