well yeah for nb voltage im down to 1.36 which is not to bad imo.. i am going to play with the gtl's after i get the voltages as low as i can for now. then once i get them setup maybe ill be able to lower them even more
Printable View
well yeah for nb voltage im down to 1.36 which is not to bad imo.. i am going to play with the gtl's after i get the voltages as low as i can for now. then once i get them setup maybe ill be able to lower them even more
[QUOTE=zfactor;3170966]here is the 714 one for you get it from this page: http://www.dfi.com.tw/Support/Downlo...FLAG=B&SITE=US]
Thank`s m8:up:
Here are my settings
Code:CPU Feature Page
Thermal Management Control................Disabled
PPM (EIST) Mode...........................Disabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Disabled
Execute Disable Bit.......................Disabled
Virtualization Technology.................Disabled
Core Multi-Processing.....................Enabled
Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss....................Disabled
O. C. Fail Retry Counter..................0
CLOCK VC0 Divider.........................Auto
CPU Clock Ratio...........................9.5x
CPU N/2 Ratio.............................Enabled
CPU Clock.................................453 MHz
Boot Up Clock.............................Auto
DRAM Speed................................333/667
PCIE Clock................................100MHz
PCIE Slot Config..........................1X 1X
CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum......................Disabled
Voltage Setting Page
CPU VID Control...........................Auto 1.1825V
CPU VID Special Add.......................109.21%
DRAM Voltage Control......................2.190V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...........................1.304V
CPU VTT Voltage...........................1.210V
VCore Droop Control.......................Disabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Weak
GTL REF Voltage Control...................Enabled
CPU GTL 1/52 REF Volt.....................72
CPU GTL 0/3 REF Volt......................70
North Bridge GTL REF Volt ................53
DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Disabled
Clock Setting Fine Delay..................Listed Below
CAS Latency Time (tCL)....................4
RAS# to CAS# Delay (tRCD).................4
RAS# Precharge (tRP)......................4
Precharge Delay (tRAS)....................4
All Precharge to Act......................Auto
REF to ACT Delay (tRFC)...................Auto
Performance Level.........................Auto
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR).................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)...............Auto
Ranks Write to Write (tWRWR)..............Auto
Ranks Read to Read (tRDRD)................Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................Auto
ALL PRE to Refresh........................Auto
Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto
Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto
Clock Setting Fine Delay Page
Ch1 Clock Crossing Setting................More Aggresive
DIMM 1 Clock fine delay...................Current 1924ps
DIMM 2 Clock fine delay...................Current 1074ps
DIMM 1 Control fine delay.................Current 1012ps
DIMM 2 Control fine delay.................Current 1012ps
Ch 1 Command fine delay...................Current 1474ps
Ch2 Clock Crossing Setting................More Aggresive
DIMM 3 Clock fine delay...................Current 1800ps
DIMM 4 Clock fine delay...................Current 837ps
DIMM 3 Control fine delay.................Current 786ps
DIMM 4 Control fine delay.................Current 124ps
Ch 2 Command fine delay...................Current 24ps
Ch1Ch2 CommonClock Setting................More Aggresive
Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto
Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto
wait... how did you do that with special vid add i thought you could only add special vid with more than 1.2volts?? if i go below 1.2vcore than i cant use the special vid??? so how is that possible for you??
No idea. It just works. :) I'm using the 30/05 beta.
If i use 1.2v instead of auto then setting any special add that will go above 1.3v will result in a no post for me. I can only increase voltage over 1.3v with the VID set to Auto.
hmm maybe ill put mine back to auto and use the full add vid feature..but i cant pick add vid unless i set it to 1.2 or higher?? the feature is physically disabled
i wonder if i can drop the voltage some
As we all know, ever since the release of the DFI P35 Cell Shock PC28000 4-4-4-12 memory has been hit n' miss on DFI boards. As good as the memory is 1060MHz - 1080MHz was about tops regardless of voltages or timings. Oskar had done several alpha BIOS releases but nothing really improved.
Things are a bit different now with the release of the 07/14 BIOS. By allowing manual manipulation of DS/DDS and the DLL Modes the board can be tuned for just about any memory. The following screenshots are the first time my Cell Shock sticks have seen anything over 1100MHZ since the P965 board.
Once again Oskar, job well done.
DFI LP UT X48-T2R, 07/14 BIOS
500x8, Memory 1200MHz
E8400
2x1GB Cell Shock PC2-8000 1000MHz 4-4-4-12
OCZ Core SSD - Operating System
2x Hitachi SATA RAID 0 - Aplications/Storage
SAPPHIRE 4870
Green Slots Used For Memory
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http://www.edgeofstability.com/image...ios/main_s.jpg http://www.edgeofstability.com/image...ios/volt_s.jpg
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http://www.edgeofstability.com/image...s/dram_1_s.jpg http://www.edgeofstability.com/image...s/dram_2_s.jpg
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http://www.edgeofstability.com/image.../clock_1_s.jpg http://www.edgeofstability.com/image.../clock_2_s.jpg
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http://www.edgeofstability.com/image...os/phase_s.jpg http://www.edgeofstability.com/image.../feature_s.jpg
Code:CPU Feature Page
Thermal Management Control................Enabled
PPM (EIST) Mode...........................Enabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Auto
Execute Disable Bit.......................Enabled
Virtualization Technology.................Enabled
Core Multi-Processing.....................Enabled
Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss....................Disabled
O. C. Fail Retry Counter..................0
CLOCK VC0 Divider.........................Auto
CPU Clock Ratio...........................8x
CPU N/2 Ratio.............................Disabled
CPU Clock.................................500 MHz
Boot Up Clock.............................Auto
DRAM Speed................................333/800
PCIE Clock................................100MHz
PCIE Slot Config..........................1X 1X
CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum......................Disabled
Voltage Setting Page
CPU VID Control...........................Auto 1.2200V
CPU VID Special Add Limit.................Disabled
CPU VID Special Add.......................108.74%
DRAM Voltage Control......................2.100V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...........................1.530V
CPU VTT Voltage...........................1.180V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Strong
GTL REF Voltage Control...................Disabled
CPU GTL 1/2 REF Volt......................113
CPU GTL 0/3 REF Volt......................100
North Bridge GTL REF Volt ................100
DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Enabled
Clock Setting Fine Delay..................Listed Below
CAS Latency Time (tCL)....................5
RAS# to CAS# Delay (tRCD).................5
RAS# Precharge (tRP)......................5
Precharge Delay (tRAS)....................15
All Precharge to Act......................4
REF to ACT Delay (tRFC)...................30
Performance Level.........................8
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................1
Write to PRE Delay (tWR)..................14
Rank Write to Read (tWTR).................11
ACT to ACT Delay (tRRD)...................3
Read to Write Delay (tRDWR)...............8
Ranks Write to Write (tWRWR)..............4
Ranks Read to Read (tRDRD)................5
Ranks Write to Read (tWRRD)...............4
Read CAS# Precharge (tRTP)................3
ALL PRE to Refresh........................4
Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto
Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto
Clock Setting Fine Delay Page
DRAM CLK Driving Strength............... Level 6
DRAM Data Driving Strength................Level 8
Ch1 DLL Default Skew Model................Model 5
Ch2 DLL Default Skew Model................Model 5
Fine Delay Step Degree....................5ps
Ch1 Clock Crossing Setting................More Aggresive
DIMM 1 Clock fine delay...................Current 1628ps
DIMM 2 Clock fine delay...................Current 434ps
DIMM 1 Control fine delay.................Current 578ps
DIMM 2 Control fine delay.................Current 523ps
Ch 1 Command fine delay...................Current 578ps
Ch2 Clock Crossing Setting................More Aggresive
DIMM 3 Clock fine delay...................Current 345ps
DIMM 4 Clock fine delay...................Current 389ps
DIMM 3 Control fine delay.................Current 612ps
DIMM 4 Control fine delay.................Current 534ps
Ch 2 Command fine delay...................Current 612ps
Ch1Ch2 CommonClock Setting................More Aggresive
Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto
Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto
Common CMD to CS Timing...................Auto
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http://www.edgeofstability.com/image...mtest_xp_s.jpg
XP SP3
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http://www.edgeofstability.com/image..._occt_xp_s.jpg
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http://www.edgeofstability.com/image..._3d06_xp_s.jpg
http://www.edgeofstability.com/image..._crysis_xp.jpghttp://www.edgeofstability.com/image...200_ut3_xp.jpg
3dx Max w/V-ray
Time to render: 14min 19sec
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http://www.edgeofstability.com/image...chmark_680.jpg
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http://www.edgeofstability.com/image...erest_xp_s.jpg
Vista 64 Bit SP1
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http://www.edgeofstability.com/image..._occt_64_s.jpg
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http://www.edgeofstability.com/image..._3d06_64_s.jpg
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http://www.edgeofstability.com/image...3dvan_64_s.jpg
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http://www.edgeofstability.com/image...pcvan_64_s.jpg
http://www.edgeofstability.com/image..._crysis_64.jpghttp://www.edgeofstability.com/image...200_ut3_64.jpg
3dx Max w/V-ray
Time to render: 15min 39sec
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http://www.edgeofstability.com/image...chmark_680.jpg
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http://www.edgeofstability.com/image...erest_64_s.jpg
The Special VID add was disabled below 1.3v, because of some instability. This was addressed in some bios update by DFI. The newest BIOSes have this setting fixed. That's how I recall it. So in essence, you're risking your CPU and MB using an older BIOS and the special VID add.
Praz: I see you use Host Slew Rate strong! I have allways used weak. What does it improve?
At times setting Strong brings stability to 45nm dual core processors when approaching 500+ FSB without the need to increase NB or VTT voltages. If GTLREF values are being manually set usually this setting will make no difference. This is assuming the values are being set correctly.
^^ thanks for the explanation praz. im learning to like this mobo and still learning what everthing extra is for i have the template ill post i forgot to do it yesterday ill do it when i get home today
any1 tried 725 alrdy?
Thanks for the link:up:
Ok i want to flash to this 725 BIOS, what is the proper way of clearing CMOS? ( if need to use jumpers, where are those located on this board?)
And do I need to clear the CMOS after/before ( or both) Flash.
Has any1 seen this b4 ??? it happened when i tried to get in the bios.
http://i249.photobucket.com/albums/g...7/P1010755.jpg
Hey wilson was that after the 725 flash:confused: