I'm seriously thinking about freezing myself, then unfreeze when it's launched..
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I'm seriously thinking about freezing myself, then unfreeze when it's launched..
that was a really bad idea for cartman with the Wii
i betting you should invest your money into LN2, cause im thinking demand will go up and so will prices and you might turn a big enough profit to buy a second BD :up:
Yeah, I was thinking it wouldnt be too bad waking up in about, 200~300 years, then I could be some old, ancient chip wiseman. In that time, they have probably invented CPU's(or probably just APU'S) which is basically modified atoms(not intel atoms, those small atoms were kind off made of) then there will hopefully be some kind of chip museum or something, where they will hopefully have some kind of AMD section, and BD hopefully not their last chip. :)Quote:
Originally Posted by Manicdan
Dont have mobo :(, my Gigabyte broke while overclocking :(.Quote:
Originally Posted by memmem
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Originally Posted by rintamarotta
Sorry about that...
Don´t want you to brake a NDA, but don´t you know the numbers to compare?
Zambezi numbers yes i know, i5 2500k or i7 2600k numbers no, ran only graphics benchmarks.
Where is the quote from :confused:
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Originally Posted by rintamarotta
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Originally Posted by rintamarotta
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Originally Posted by rintamarotta
http://tof.canardpc.com/view/0b1c7ad...14904816b8.jpgQuote:
Originally Posted by rintamarotta
Olivon I agree with you. If he really had BD I would be surprised.
I dont know..., what I know, the right true we will see soon.
I smell an HFR private joke ... :DQuote:
Originally Posted by TESKATLIPOKA
Anyway, I never said that Rintamarotta has no BD, if you look back onto this thread it really seems he got one :
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Originally Posted by rintamarotta
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Originally Posted by rintamarotta
FlanK3r probably something new will be presented this Friday at Hot chips conference of course no benches but maybe some new info about the architecture.
Olivon maybe I am wrong and he really has BD samples but thats something only he knows.
His post about how he can't compare BD to SB or Gulftown despite the fact so much reviews with different tests are out didn't add to his credibility, but maybe I am just misunderstanding.
Is it retail or ES Bulldozer then?Quote:
Originally Posted by rintamarotta
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Originally Posted by TESKATLIPOKA
I hope that, at Hot Chips, they can explain the performance degradations on the Software Optimization Guide:
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Note: For best performance, do not mix streaming instructions on a cache line with non-streaming store instructions.
The following performance caveats apply when using streaming stores on AMD Family 15h cores.
•When writing out a single stream of data sequentially, performance of AMD Family 15h processors is comparable to previous generations of AMD processors.
•When writing out two streams of data, AMD Family 15h version 1 processors can be up to three times slower than previous-generation AMD processors. AMD Family 15h version 2 processor performance is approximately 1.5 times slower than previous AMD processors.
•When writing out four non-temporal streams, AMD Family 15h version 1 can be up to three times slower than previous AMD processors. AMD Family 15h version 2 processor performance is comparable to previous AMD processors.
•Using non-temporal stores but not writing out an entire cacheline may cause performance to be up to six times slower than previous AMD processors.
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It seems that this problem will even be (at a lower rate) on BDv2.
How will this affect BD performance on benches and "real world"?
I hope that is rare situations where prefetchnt instructions are critical. Maybe it could be critical when CPU works with high data paralelism and SIMD instructions. However it is crictical when we have data stream conflicts. When we use one single stream, writiong out data is comparable to 10h.
Probably lower performing prefetchnt instructions is caused by WT data cache policy. Bacause L1D is WT, every write to the cache causes a synchronous write to the backing store.
To avoid performance drop, AMD designers included WCC (Write Coalescing Cache) cache for WT stores for both integer cores.
In general, PREFETCHNTA instruction hints processor to fetch the data non-temporally (i.e. this data is not to be used again or used only once). e.g. You're copying data from one location to another you can use this instruction in that case. And PREFETCHTn instructions hints processor that these data are needed repeatedly. e.g. You're doing calculations on same data.
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Originally Posted by drfedja
Thanks drfedja,
Do you think playing games on bulldozer will be affected by this?
memmem: maybe they meaning "version 2" revision number 2...
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Originally Posted by FlanK3r
But FlanK3r, then there were no need to mention it on the Guide.
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Originally Posted by rintamarotta
Would you say the Bulldozer is worth waiting for?
its more likely you would wake up in a borderlands / fallout period and you'd be lucky to get your hands on an Am386 :p:Quote:
Originally Posted by andos
Yes there is misunderstanding, i do not look at other peoples results or if i look i wont take notes of them.Quote:
Originally Posted by TESKATLIPOKA
Cannot compare SB or Gulftown to BD since i dont have working X58 or Z/P67 board at the moment. I have 980X and 2500K and 2600K cpus tough and 980X is pretty close 990X.
I lost alot of hardware at thunderstorm this summer, servers and my main pc is behind ups unit but other pc's and benching hardware isnt.
I didnt loose BD and 990FX since they werent plugged in at that moment.
Lost 6000$ worth of hardware and im not going to risk that again, now everything is behind ups units.
Id say yes, need see its price first tough.Quote:
Originally Posted by Baam
I hope not. Maybe there could be exception, but in general I think that the BD will be much faster than Thuban. If you write some memory cpy routine to avoid standard C/C++ library you can use these NT - non temporal instructions.Quote:
Originally Posted by memmem
A typical use for non-temporal stores is copying memory regions that are too large to fit in the cache. Using ordinary stores for that would waste memory bandwidth by unnecessarily fetching all the data in the destination region into the cache before overwriting it. Any useful data that is in the cache before the copy would also be replaced with data from the source and destination regions.
Another typical use is initialization of data structures too large to fit in the cache, for example, setting a large array to all zeros.
A major drawback of non-temporal stores is that they are fairly complex to work with. If they are improperly used they can easily cause performance degradations, or even hard-to-debug bugs in the case of multithreaded programs. There is a main reason to think that BD performance could not be sacrificed because of streaming conflicts - that is improper usage of NT store instructions.
hmmmm i read next thread
FM2 socket ? very confused
well they're getting rid of AM3 socketQuote:
Originally Posted by PatRaceTin
One of the most objective articles I've seen on FX performance...
I'm not sure how true it will turn out to be, but it does seem to make sense, and would
explain some of the wild swings we've seen from pre-release "benchmarks :rolleyes:"...
http://www.extremetech.com/computing...s-next-gen-cpu
Maybe it's just me, but these chips look like a blast to play with even if they can't crush BigBlue in all situations... ;)