lucky.. :) hope DFI send me one.. :) I sell DFI here in my country..
hey eva2000 can you do a side by side comparison with asus blitz formula.. :) same proc same memory same tweaks.. :) hehehe
please please ^_^
i doubt i'd have time to do side by side comparisons with exact hardware but i do have it setup to have Asus Blitz Formula, Blitz Extreme and DFI P35-T2R all running side by side but with different hardware and cpu cooling.. right now have E6600 L709A958 on Blitz Formula with corsair nautilus, E6750 G0 ES on DFI P35-T2R with scythe infinity and still trying to find a high FSB cpu for Blitz Extreme with swiftech g4 storm hehe
George see how high you can get the fsb, i hit 520 with a 6800 and 475 with a 6850 and all stopped :(
There must be some trick but I have not found it yet
what is a good FSB for quads?
looking at MAX FSB. My E6750 on Asus P5K Deluxe maxed out at 495-500FSB with CPU PLL 1.8v voltage. I suspect this is a cpu FSB wall as it's pretty much the same on DFI LP UT P35-T2R maxing out FSB around 495-500FSB but needing CPU PLL 1.95v since next option below it was 1.75v with clockgen voltage at 3.75v. I could boot into memtest86+ v1.70 at 506FSB but it would hang in test #7 (which might be a good test for max FSB for cpus ? ).
System
- Intel Core 2 Duo E6750 ES - L710A438 G0
- Scythe Infinity with modded mount + 120x25mm Spire 96cfm fan
- Transpiper heatsink NOT installed
- DFI LP UT P35-T2R 8/10 bios flashed from 7/27
- 128MB Gainward FX5200 PCI
- 2GB Crucial Ballistix Tracer PC2-8500 naked modules Green dimm slots
- 80GB Hitachi 7K80 SATA
- LiteON CD-RW
- 700W OCZ GameXStream
- WinXP Pro SP2
7x500FSB 1:1
Single Super Pi 32M needed 2.19v bios set vdimm but dual Super Pi 32M needed 2.27v vdimm
http://fileshosts.com/intel/DFI/DFI_...3m35s516ms.png
Half way mark for dual 32M
http://fileshosts.com/intel/DFI/DFI_...al_halfway.png
Dual Super Pi 32M complete
http://fileshosts.com/intel/DFI/DFI_...pi32m_dual.png
Everest Bandwidth & Cinebench R10
http://fileshosts.com/intel/DFI/DFI_..._bandwidth.png http://fileshosts.com/intel/DFI/DFI_...enchr10_tn.png
Bios Settings Used:
Quote:
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled
Exist Setup Shutdown: Mode 2
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 7x
- Target CPU Clock: 3500Mhz
CPU Clock: 500FSB
Boot Up Clock: AUTO
DRAM Speed: 333MHZ/667MHZ
- Target DRAM Speed: DDR2-1001Mhz
PCIE Clock: 100Mhz
Voltage Settings
CPU VID Control: 1.4625v
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.19v
SB 1.05V Voltage: 1.15v
SB Core/CPU PLL Voltage: 1.95v
NB Core Voltage: 1.50v
CPU VTT Voltage: 1.40v
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.75v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110
DRAM Timing
- Enhance Data transmitting: FAST
- Enhance Addressing: FAST
- Channel 1 CLK fine delay: 14
- Channel 2 CLK fine delay: 14
(values in brackets next to AUTO is what memset sees)
CAS Latency Time (tCL): 4
RAS# to CAS# Delay (tRCD): 4
RAS# Precharge (tRP): 4
Precharge Delay (tRAS): 9
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance Level: 7
Read delay phase adjust: AUTO
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 11
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 3
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): 3
ALL PRE to Refresh: AUTO 4
PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
7x500FSB 5:6 divider
Notes:
- With 5:6 didvider tWR and tWTR actually show same values in memset as what's set in bios which differs from 1:1 divider where tWR and tWTR show 1 value below in memset compared to what is set in bios.
Single Super Pi 1M & 32M
http://fileshosts.com/intel/DFI/DFI_...m_14s296ms.png
http://fileshosts.com/intel/DFI/DFI_...3m28s531ms.png
Half way mark for dual 32M
http://fileshosts.com/intel/DFI/DFI_...2m_halfway.png
Dual Super Pi 32M complete
http://fileshosts.com/intel/DFI/DFI_...pi32m_dual.png
Everest Bandwidth & Cinebench R10
http://fileshosts.com/intel/DFI/DFI_..._bandwidth.png http://fileshosts.com/intel/DFI/DFI_...enchr10_tn.png
http://fileshosts.com/intel/DFI/DFI_..._validated.png
Bios Settings Used:
Quote:
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled
Exist Setup Shutdown: Mode 2
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 7x
- Target CPU Clock: 3500Mhz
CPU Clock: 500FSB
Boot Up Clock: AUTO
DRAM Speed: 266MHZ/667MHZ
- Target DRAM Speed: DDR2-1201Mhz
PCIE Clock: 100Mhz
Voltage Settings
CPU VID Control: 1.4375v
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.27v
SB 1.05V Voltage: 1.15v
SB Core/CPU PLL Voltage: 1.95v
NB Core Voltage: 1.53v
CPU VTT Voltage: 1.40v
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.75v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110
DRAM Timing
- Enhance Data transmitting: FAST
- Enhance Addressing: FAST
- Channel 1 CLK fine delay: 14
- Channel 2 CLK fine delay: 14
(values in brackets next to AUTO is what memset sees)
CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 4
Precharge Delay (tRAS): 9
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance Level: 7
Read delay phase adjust: AUTO
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 11
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 3
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): 3
ALL PRE to Refresh: AUTO 4
PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
Eva, can you run please for me a winrar bench?
With 7x500FSB 1:1 divider and with 7x500FSB 5:6 divider too.
Thanks :).
How about 5:6 with 4-4-4-12 ?
I don't have any had that can do 600mhz 4-4-4-x without shoving 2.6+ vdimm so unlikely to be doing tests until i figure out each memory dividers behavioral characteristics for this board ::)
Also looking back at original first post in this thread windwithme's 7x500 5:6 600mhz 4-4-4-x 32m times were very slow compared to mine... probably loose subtimings allowed <2.0v vdimm heh
Then run with 5-5-5-x :).
I`am curious for a winrar bench..
7X500FSB 1:1 4-4-4-9 and 5:6 5-5-4-9
Winrar v3.70 Trial
http://fileshosts.com/intel/DFI/DFI_...inrar_1789.png
http://fileshosts.com/intel/DFI/DFI_...inrar_1837.png
Without other cpuz/memset/SG windows open a bit higher
http://fileshosts.com/intel/DFI/DFI_...837_window.png
What would you guys recommend a good HSF for the proc on this monster board? so far the Thermalright Ultra-120 Extreme would be fitted sideways so as not to hit the NB...the Arctic Cooler needed to be modded, as well as the Scythe. Would the Zalman 9700 fit without any mods?
Thanks all! :)
What about the IFX-14 - anyone tested this one on the board so far?
I don't know if it will fit but you might check this new Thermalright cooler.
http://www.anandtech.com/casecooling...oc.aspx?i=3068
@msgclb: thanks man! :) but how high is the NB of the DFI? any clearance issues with the HSF?
@erwin
contact me when ul be getting the x38 version. :D hehehe
500/1200 CL5 5-5-9 1.85V
2 Super PI 32M stably
http://img120.imageshack.us/img120/9...200185vmy4.png
E6700 555Mhz
2 Super PI 32M stably
http://www.twcarpc.com/photo/wwm/DFI...DP35555PID.PNG