10% faster on average at the same clockspeed ? Better be since it will be 25% slower wrt to clockspeed. ;)
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10% faster on average at the same clockspeed ? Better be since it will be 25% slower wrt to clockspeed. ;)
A 10% average boost in performance over Conroe, doesn't seem like much, but when you think about it, it's very impressive because Conroe already has very high IPC.
It will be tough for AMD to beat Intel though. Even though there IPC may be higher, Intel's manufacturing process is second to none, and Core 2 can scale very well.
For quad core, AMD will probably exceed Intel though, because the monolithic design and higher bandwidth counts for more than in dual core.
Now now, don't get out your pram over it m8......I'm an AMD FAN...so what?Quote:
Originally Posted by GMX
I ain't being rude to anyone, and I don't blindly slate INTEL products. I own 2x INTEL pc's and 3x AMD aswell as numerous cpu's from both manufacturers. I merely prefer AMD is all.
No one in their right mind would insist C2D are garbage, or INTEL are useless. I've implied no such thing, only that I believe AMD's new architecture will run circles around the competition. Nor am I doubting the AMD GUY who posted figures, I am merely stating I think there will be even more of a performance gap come launch.
As for the remarks about joining other forums, you really need to get a grip of yourself and stop acting like a little INTEL FANBOY yourself. Jumping in and flaming ppl simply for expressing their opinion :mad:
I doubt he will be either. Why on earth would he be embarrased after claiming X% of performance gain if it actually turns out to be higher when the benchmarks are released? I just don't get that.Quote:
Originally Posted by GMX
Did your intel fanboi friend say on air? No.Quote:
Originally Posted by GMX
Besides, You also seem to be living in a time where air = stock cooler. :rolleyes:
I was not exagerating, go read the various Ocing threads. AM2 Rev 2's +3s will surpass 3ghz for most people. It's nothing special, just progress, and still typical SOI 'hit a wall' behaviour moved up a notch.
I am all for what you say. Don't listen to the BS of some other ppl who try to put you down. People who tend to do that are only insecure with themselfs and have problems. :rolleyes: Some people need to go to anger management classes rather then taking it out on somebody else just because they want to think what they want to think about a subject.Quote:
Originally Posted by SOLDNER-MOFO64
Ha... hypocrite.Quote:
Originally Posted by Serge84
All i stated was I'm waiting for overclocking results then I make my decision (for eg whats the point of 10%+ more performance if early samples are crappo, like winchester almost). ANd these ppl, joining in 2007, and nov 2006, dec 2006 and the one in nov 2005 who is extremely weird and makes hideous comments are all so blind and oblivious to fact i state, and conclude i'm an Intel fanboy. Ha, I cannot believe this. THe sanctuary i thought would never turn into another "ordinary" forum.
I also looked some OCs in the AMD section (boy has this section been jumbled the f!!ck up since AM2, where is the organization we had with S939?) and no, not many are getting over 3.1-3.2 so easily.
Jesus, I didn't know there was so many "girls" on this forum! :rolleyes:
So you think that AMD will take the lead for a bit at first, and as Intel ramps up the clocks, the gap will close? (like P3 vs. K7)Quote:
Originally Posted by brentpresley
GMX, yeah those threads are a real mess. I couldn't tell where you're supposed to post results anymore.
Anyway, I'm not gonna have an OCing aergument with you, it's way off topic. The threads are a mess enough as it is.
My comment was, in response to Shintai. 3-3.2 is normal for higher end Windsors. It may have been superchip clocks before, but it's pretty damn common now on GOOD air, or water. We can agree to disagree.
Back on topic. It would be great to see another K7 vs P3 performance scenario.
I don't think we will EVER see p4 vs A64 again. Intels blind pursuit for clockspeed is dead and buried. We're back to solid clock for clock competition. with intel clearly in the lead again. To be honest, the last few yrs have been dead boring, hence I prettymuch lost interest there for a while with AMD no longer fighting for a competitive product. I think, as someome mentioned this yr and 2008 will be very interesting. like good old times :)
umm not exactlyQuote:
Originally Posted by mAJORD
Nitpicker!Quote:
Originally Posted by nn_step
I'm sure he means the path of solely following netburst is completely dead. Sure they may extract some good points out of it and implement it later on.
Personally, I said you were acting like a fanboy with the manner in which you slated me for expressing an opinion. You accused me quite openly of being a fanboy for being of the opinion performance advantage will be higher than stated for AMD's BARCELONA cpus. Yet immediately whine about being labelled a fanboy yourself. Then comment on this forum being full of nOObs and whiners:confused:Quote:
Originally Posted by GMX
Back on topic.......
AFAIK another factor which will make INTEL's life that much harder is that AMD have already produced 45nm samples and therefore have basically nuetralised any advantage intel may have had in that area.
actually no because Intel is going to have the advantage of 45nm and High-k over AMD for about 6-9months; at a price, much lower yields and a higher R&D costQuote:
Originally Posted by SOLDNER-MOFO64
Yes, thats exactly what I meant. Thanks GMX
Soldner. Intel have done that and more with 45nm. (taped out, shown running systems of penryn) and are going to ramp up production later in the year. So I think neutralised is a bit of an overstatement.
Dilluted the advantage I'd agree with though, as it seems, for once AMD may not be quite so far behind intel with process shrinks. IF they start producing in Q2 08 as claimed.
Actually you can thank the world's largest R&D company for AMD having a superior process (at the same nm), IBMQuote:
Originally Posted by mAJORD
Yeah true, I guess one should probably refer to it as AMD/IBM when talking about process alone :)
speaking of which AMD's current 65nm process is the same one that IBM is using for their 5Ghz 16 Stage Power6 processorQuote:
Originally Posted by mAJORD
Your right, perhaps it is a little.Quote:
Originally Posted by mAJORD
Yeah, K10's frequency numbers seem low to me. I know it's a different design 'n all, and call it a hunch but i'm thinking it's going to clock alot higher. I don't remember seeing much documentation with an AMD stamp on it (such as the ones gOJDO posted) about clocks. I can't imagine AMD designed silicon that would only scale a few hundred Mhz for their server chips.Quote:
Originally Posted by nn_step
whats the deal with Intel, last i heard something like q1 '08 for 45nm chips now? :( they can't give AMD too long to compete on 65nm with em. They need to get quad desktop chips under 200 bux by christmas ;) so i can buy one :P haha and everyone else.
Even though the IBM 5ghz 16 stage P6 CPU and AMD's upcoming K10 may be on the same process, it largely depends on the architecture for how it clocks. Let's hope its great.Quote:
Originally Posted by nn_step
In this thread, we avoid reality.Quote:
Originally Posted by Serge84
reality has nothing to do with Rumors :p:Quote:
Originally Posted by Anonymous
45nm has been delayed till 2008 for the other side. No advantage. Both will come out at nearly the same time agenst the 2 companies. Fab techniques give no real big advantages. Its the same arc. Not C3D. Besides AMD will use SGOI High K metal gates in their 45nm tech like IBM will. So infact Intel will be behind in fab processes. (It seems useless not bringing up intel in the forums because everybody else doesn't seem to get this is a AMD FORUM so I give up.)
We are talking about IBM giving technology to AMD so AMD is no better then IBM and we know IBM is number 1. They arn't worth 80billion for nothing. Intel can never compare to IBM. AMD is with IBM so if you mess with AMD you mess with IBM.
Again I already explained why they have lower clock speeds a few pages back and I will not repeat myself. Unless you care to give proof of any cpu that did not stat at its lowest cpu speed at launch? Pentium 1 did not start at 266mhz did it? P2 did not start at 500mhz did it? P3 did not start at 1.5ghz did it? P4 did not start at 3.8ghz did it? AMD K6 did not start at 550mhz did it? K7 did not start at 2.2ghz did it? K8 did not start at 3ghz did it nor did dual cores? SO NO NO NOOO!!! (So I like repeating myself)
Conroe never started at its max. 2.9ghz is not conroes stock limit at launch. They will rase it to 4ghz with wolfdile. So what makes you think K10 is some how limited to clock speed? This would be a 1st in history I would say. Cus every cpu starts its life at a very low clock speed and never its max. Unless you completly want to disregard the course of history? You bring down your IQ level each time you say K10's max is what they show now. Its just rediculess and illogical. Sometimes I think they should put more of these logic transistors into ppls heads rather then C2D's 45nm die smirk.
Quote:
Originally Posted by brentpresley
K8 over P4 was much more than this.... depending on the app.... P4 just blew chunks when it came to IPC. I will dig some papers, but 0.9 to 1.2 IPC range was about average. K8 was getting significantly higher than this.... which, of course, is how AMD put the :slapass: on Intel in the P4 days.
I can't believe i'm seeing this :),pro-AMD info coming from JJ from thg :eek: :DQuote:
Originally Posted by JumpingJack
Brent likes to put P4 to only 10% ipc slower than K8 just to ease the pain from the days of AMD :slapass: intel :p: .Hopefully those days are ahead of us again as it means competition is continuing to bring the best CPUs be it intc or amd :thumbsup:
Easy there tiger. I'm not trying to crash your world down around you. What i'm suggesting is that there could very well be alot more room at the top than on the prior process.Quote:
Originally Posted by Serge84
Don't get your panties in a bunch.
Really ? What are does samples ? SRAM or CPUs ? Are they working ?Quote:
Originally Posted by SOLDNER-MOFO64
It doesn't matter that Intel is well underway with building 2 45nm FABs from the ground up and moving one from 65 to 45nm or that they tapped out Penryn months ago , does it ?
Interesting display of logic from you nonetheless.North Korea detonated a pseudonuke ,therefore they have basically neutralised any advantage the US may have had in that area.
Are you able to see the monumental stupidity behind such a claim ? :stick:
Another brain fart from you.The worlds largest R&D company is ...ummhh...only that because it sucks badly at one thing : manufacturing.Quote:
Originally Posted by nn_step
They are extraordinary in theory , too bad practice says otherwise.
Intel had better process characteristics with cheaper and simpler process than AMD&IBM.What does that say about the "prowess" of IBM ?
Secondly , if rumours turn out to be true ( that Power will be outsourced to Taiwan ) it means IBM's board won't renew the deal with AMD ( which they have to do by sept 30 this year IIRC ) => IBM will say goodbye to advanced process technology.Why ? Because the game is simply too expensive to play anymore.TI has already said bye bye to digital logic process advances and laif off its R&D staff.
And somehow AMD manages to mitigate all that..Have you considered that AMD might be experiencing all the above with 65nm as we speak , not to mention 45nm ? ;)Quote:
Originally Posted by nn_step
Really ? Not even Conroe manages 1-1.2 except on few codes.Quote:
Originally Posted by JumpingJack
P4 was around 0.3-0.7 and K8 0.5-0.9 at least for SPEC IIRC.
what are does samples? Sorry you've lost me. I'm talking CPU's at 45nm. Ofcourse they work, what do you think, they've produced non-working samples to sit and look at?Quote:
Originally Posted by savantu
C'mon, I already agreed I went a little far with the neutralised statement. Now you wanna go to the other end of the spectrum and insist it's gonna give INTEL some huge advantage.Quote:
It doesn't matter that Intel is well underway with building 2 45nm FABs from the ground up and moving one from 65 to 45nm or that they tapped out Penryn months ago , does it ?
In short, your right with your sarcasm. It virtually doesn't matter that INTEL is underway with 45nm fabs. INTEL needs to be on 45nm process and looking at 25nm cause if they keep on neglecting the FSB issue they have 45nm ain't gonna be enough for them to surpass AMD in the near future, nevermind keep up with them.
Yes, I can see you are monumentally stupid for making such a ret**ded comparison.Quote:
Interesting display of logic from you nonetheless.North Korea detonated a pseudonuke ,therefore they have basically neutralised any advantage the US may have had in that area.
Are you able to see the monumental stupidity behind such a claim ? :stick:
If not mistaken IBM were the first cpu manufacturer in existence. As a result they're the oldest and longest serving cpu manufacturers of all-time. They've pioneered most of the technology we have today. They've probably created more cpu's than AMD & INTEL combined.Quote:
Another brain fart from you.The worlds largest R&D company is ...ummhh...only that because it sucks badly at one thing : manufacturing.
They are extraordinary in theory , too bad practice says otherwise.
I'm sure they must be doin' something right.
HmmmmmQuote:
Originally Posted by brentpresley
A. I didn't say integrated circuit.
B. 1958-59? Try 1880
http://www-03.ibm.com/ibm/history/hi...ory_intro.html
That happens very often , but what does a smartass like you really knows ?Quote:
Originally Posted by SOLDNER-MOFO64
You don't even know the f***ing codename for a 45nm AMD core and you tell me that it has taped out ?
And does it not ? Converting a FAB to 45nm while building 2 others while your competitor is 3 quarters away from reaching the 90nm to 65nm transition isn't a huge advantage ?Quote:
C'mon, I already agreed I went a little far with the neutralised statement. Now you wanna go to the other end of the spectrum and insist it's gonna give INTEL some huge advantage.
By the time AMD reaches the crossover between 90nm and 65nm Intel starts 45nm production.
That was also said at 130nm.Now we're at 65nm and Conroe stomps the IMC K8 all over.In short you have no clue on how performance can be achieved.Quote:
In short, your right with your sarcasm. It virtually doesn't matter that INTEL is underway with 45nm fabs. INTEL needs to be on 45nm process and looking at 25nm cause if they keep on neglecting the FSB issue they have 45nm ain't gonna be enough for them to surpass AMD in the near future, nevermind keep up with them.
Too bad you're monumentally stupid to see it applies perfectly to your claims.Quote:
Yes, I can see you are monumentally stupid for making such a ret**ded comparison.
That's hilarious but looking at your past performance it was kinda expected.Quote:
If not mistaken IBM were the first cpu manufacturer in existence. As a result they're the oldest and longest serving cpu manufacturers of all-time. They've pioneered most of the technology we have today. They've probably created more cpu's than AMD & INTEL combined.
I'm sure they must be doin' something right.
If you think being the oldest and longest player with a presence in "all the markets" is a sign of permanence then perhaps you should consider where
IBM is today in PCs, disk drives, DRAM, printers, networking gear , etc.
Do you know what's next ?
Let me offer you a hint :linkQuote:
"SANTA CLARA, Calif. — The semiconductor industry is projected to experience moderate growth in the near term — with only three IC-manufacturing business models evolving over time, warned Wim Roelandts, president, chairman and chief executive of Xilinx Inc."
"Meanwhile, during the interview, the executive also predicted that the IC industry would see only three chip-manufacturing business models in the future: Intel, memory and fabless/foundry.
Intel Corp., of course, will continue to build its own fabs and develop processes that are tuned for its processor lines. The memory makers will continue to build plants, although many are turning to partners to share the risks and costs.
Needless to say, the fabless/foundry model has been a smashing success, he said. Xilinx and a plethora of other fabless chip makers have prospered during the revolution.
What could get squeezed in the middle is the traditional fab or integrated design manufacturing (IDM) model. Over the years, this has been evident following the IDMs' shift towards the ''fab lite'' model.
But IEMs are under pressure to reduce their fab costs, forcing some to move what Gartner Inc. call a ''process lite'' model. Texas Instruments Inc. last week said that it will cease development of its internal logic process R&D at the 45-nm and will more closely with foundries."
How does this relate to IBM ? Simple : the performance of the logic manufacturing group inside IBM has been poor financially wise and costs are at an all time high. And beancounters see everything with cost-coloured glasses...
AMD 10-Q filling.Quote:
"Total non-cancelable purchase commitments as of October 1, 2006, were $1.3 billion for periods through 2020. These purchase commitments included $698 million related to contractual obligations of Fab 30 and Fab 36 to purchase silicon-on-insulator wafers and purchases of energy and gas and up to $171 million representing future payments to IBM pursuant to our joint development agreement. As IBM’s services are being performed ratably over the life of the agreement, we expense the payments as incurred. In August 2005, we amended this agreement, and among other things, extended its termination date through December 2011. However, capital purchases by IBM necessary for the continued development of process development projects past December 31, 2008 are conditioned upon the approval of IBM’s board of directors. If such approval is not received by September 30, 2007, either party has the right to terminate the agreement effective December 31, 2008 without liability.
Why are rumours appearing about IBM outsourcing Power production to Taiwanese foundries ? Why is Power 7 build socket compatible with Opteron ?
Quote:
Originally Posted by brentpresley
nup. a CPU and an intergrated circuirt can be 2 totally different things :P
for example, a simple FET driver is an intergrated circuirt, doesn't mean it's a CPU, obviously
CPU's date back to god knows when, but Intel made the first microprocessor , the type of CPU we recognise today.
i believe that there was a post about amd has already made a 45nm cpu , intels lead on die size shrink , is shrinkingQuote:
And does it not ? Converting a FAB to 45nm while building 2 others while your competitor is 3 quarters away from reaching the 90nm to 65nm transition isn't a huge advantage ?
By the time AMD reaches the crossover between 90nm and 65nm Intel starts 45nm production.
Quote:
Originally Posted by savantu
Where are you seeing these rumors? I've seen this one, but that is about outsourcing Power server assembly, not CPUs. To my knowledge the company that would likely receive their business, Winstron, isn't even a foundry.Quote:
Originally Posted by savantu
The article also includes this quote:
"Once RISC (reduced instruction set computer) sever OEM orders are released to Taiwan manufacturers, industry players noted that OEM orders for Itanium 2 servers from Hewlett Packard (HP), ultra SPARC IV servers from Sun Microsystems and Fujitsu-Siemens to Taiwan makers would follow in the future."
I think we are now several degrees removed from K8L.
oook , what facts ?Quote:
Originally Posted by brentpresley
amd isn't going to use high k on it's 45nm cpu's , instead it has changed it's way of manufacturing the cpu
so you think that amd still has to incorperate high k into it's cpu ?
In fact, it is unlikely that IBM's solution, the one used by AMD, will see any contribution from high-k or metal gates at the initial 45 nm node. Later 45 nm parts might, as will the 32 nm node.
http://www.geek.com/news/geeknews/20...0206002327.htm
Grose inferred in a brief interview that the initial 45nm process will be similar to the last modifications expected on its 65nm node, set for the second quarter of 2008. However, he was quoted as saying that such new materials could possibly be introduced in late 45nm renditions or not until the 32nm node, not expected until the second half of 2009 at the earliest, according to current speculation.
http://www.fabtech.org/content/view/2440/2/
The new chief of manufacturing at Advanced Micro Devices said the company has already made first test chips using 45nm process technology, however, he said the new fabrication process still does not employ high-k dielectrics and similar innovations that IBM and AMD developed collaboratively. The new technologies, however, may still be a focus for AMD, the new production chief joined AMD from IBM.
Douglas Grose, who has been appointed to the role of senior vice president of technology development, manufacturing and supply chain at AMD, said that AMD’s Dresden, Germany manufacturing facility has been producing test chips using 45nm for some time now and the company has a very strong focus on rapid development of the new fabrication technology.
Mr. Grose indicated that the 65nm process technology – which went commercial in early December, 2006 – is already fully developed and ready to ramp up. The main target for AMD today is 45nm fabrication process.
It is still under review what kind of 45nm process technology AMD will use along with its chips. On the one hand, AMD might develop a version of its silicon-on-insulator (SOI) fabrication process to ramp up 45nm chips quickly. On the other hand, AMD and IBM already announced that they “expected” to make commercial products using technology that features immersion lithography and ultra-low-K interconnect dielectrics in 2008. In addition, AMD and IBM developed 45nm process technology with high-K dielectrics.
“It really is going to depend on what makes most sense and on our product roadmap. It could be late in the 45nm timeframe or the 32nm node application,” Mr. Grose said
http://www.xbitlabs.com/news/cpu/dis...205223539.html
so , just what are the facts ?
No it hasn't.Quote:
Originally Posted by The Ghost
They produced 45nm test chips , that is silicon-functional circuits.
In other words SRAM test vehicles which are mostly made of SRAM ( duh' ) and a little logic.
Even then, intel's lead is still shrinking. 9-12 months is still less than 18 months :)
More and more OT... Cant resist... =)
Whats all this about IBM suddenly being so big in chipmaking? Last time i heard (ok, its probably a year ago) IBM was rated #18, and Intel was and still is up there in the #1 spot way ahead of the rest. IBM remains a smaller maker and one of Intels big customers. If talking about CPUs only and not chips in general then its not exactly a secret that IBM lost the Macs to Intel. Well, IBM had some good times with Xbox360 and also Cell lately, so they have grown, but suddenly to the level of Intel?? No way...
:D Nice one. Too bad that your point wont go home where its needed most, there are some lost cases here.Quote:
Originally Posted by savantu
Anyways, is it Intel or IBM who will make the K8L and will it be 45nm, with or without high K? I thought its AMD and 65nm, so what about saving some space in this thread for coming news and rumors about K8L? Maybe there will even be a benchie or 2, anything is better than "my dad makes smaller chips than your dad".
The K8 was over 1000mhz slower then the P4 and K8 would just blow it away. A FX-60 would just blow away the highest end dual core P4 back in the day even at 3.8ghz it couldn't even compare to the power of a FX60.Quote:
Originally Posted by JumpingJack
I agree with you.
XDD No, its cool.Quote:
Originally Posted by flippin_waffles
umm To say that Conroe stomps all over K8 is kinda of a misnomer, because at stock clocks AMD is neck and neck with Intel, while still being much cheaper.Quote:
Originally Posted by savantu
Also in the 4+P computer world Intel is still a joke
Sorry but Intel only used BULK silicon witch is only a Si process that consists of with SS, Cu, and CMOS with Ge processing and thats really sucky because its done so quickly making a cheaper yet more fragile construction, no Dual Liners On any of the long term SS processing like AMD does why there cpus take 2 times longer to build. Makes them stronger and gives a 40% transister leakage reduction on top of the transistors being able to last longer under great stresses. On the other side, Intel's some 40 years established bulk silicon production process is leaky enough to make Intel's standard SiO2 process ridiculous compared with AMD's SOI standards even with high K metal gates.Quote:
Originally Posted by savantu
AMD uses Ge-SSOI on low k in 65nm. Later to do SGOI high K metal gates on 45nm's. Same time IBM will. Both are used by IBM currently having the best FAB processing power known to man. Allowing AMD to be ahead of intel by a large margin in fab complexity. AMD is at SOI-3 wile Intel is just moving to SOI-2 copying off of AMD but just getting there at only 45nm when AMD has been useing this since the 90nm hit Rev F3 witch includes SOI-3 in 90nm and G1 65nm.
Also AMD's 90nm standards where far ahead of bulk silicon by a long shot. Even with intels 65nm lead currently EE vers of K8 can compete just as good as C2D can in price performance gaps. AMD's processes have gotten cheaper as well so they are selling CPU's at half the price with conroe only giving a average 10% performance advantage. AMD's prices just make it hard for intel to keep their price performance edge specially now that AMD has gone to 65nm. Intels SOI-2 can not even compare to Perfected 90nm SOI-2. They still have a lot to learn. Thats why Intel delayed 45nm until 2008. Fab process problems with the transission. Intel may have all the fabs and can manufacture things quicker then AMD. But AMD has the better technology by a long shot. They deal with more complex fab processing then Intel's bulk silicon. Intel doesn't have much experionce beyond that.
Die smirks do not make the fab process automaticly more advanced just because of their size. It also matters what type of fab processing is used. Just because Intel was at 65nm before AMD doesn't make them better. AMD used SOI-2 before Intel ever did and even then 65nm P4's leaked like there was no tomarrow. AMD was just way head of them in that area Specially fab processes.
i believe that if you actually look it up , you will find out that amd had made it's s-ram test 3 months after intel made it's test s-ram, no where in the article does it say that amd's test chip is a test s-ram chipQuote:
Originally Posted by savantu
what amd has produced right now is a test chip to test it's circuts , it is no where near a tapeout yet
i copied this post from some one else because it says what i am trying to get thru to you
A test chip is a sufficent and necessary thing to have to develop a process. Once one is sucessfully produced in a fab, the time to the A0 samples of a lead vehicle is ~1 year. It takes that long to figure out how the patterning/substrates interact to get halfway decent models to enable the design of circuitry (RC delay comes to mind, as does resolving killer defect modes, transistor design.....) for tape in. There's really no way around that. You can have all the nifty circuit block diagrams you want. Until you see them in silcon (on a test chip) you can't be sure how they will actually perform.
son, the best thing for you to do is keep your money , i can tell that you will need it making bets like thisQuote:
Originally Posted by brentpresley
Oh yes...in your alternate reality world maybe.Point me the AMD chip equivalent in performance to a E6600 and how it is "much cheaper".If you want we can also do a performance/w analysis.Quote:
Originally Posted by nn_step
Put up or shut up.
In the 4+P there are 3 players :Quote:
Also in the 4+P computer world Intel is still a joke
-Sun Galaxy servers which scale up to 8P
-IBM x460 which scales up to 32P
-Unisys ES7000/one which scales up to 32P
You can guess who is the "joke" in the 4+P server space or maybe you won't , were it for you to have a clue you wouldn't have said such a stupidity.
And to put gasoline on fire , I challenge you to provide industry standard benchmark results so we can compare which is the bigger joke in the 8P space ( since the "non joke" can't scale higher )
8P's will only be out when K8L opterons come out in quad's. Intel can not touch AMD in the 4P and 8P world because they can not get past their FSB issues. 16-ways with 32 cores or even 8-ways with 16 cores on quad chips being 4 or 8 sockets. I'm sorry but it is humorous for you not to know this. Thats what direct connection 2 is their for.Quote:
Originally Posted by savantu
Half the server space, half of the energy consumption, more performance with less blades. What do you think will happen then? BTW it does scale that high because of the new arc. This isn't K8, its a whole nother ball game boy. Talking like you know everything when apperently you don't Intel can not go past 2P's means limited to 8 cores. And 8 cores can not compare to 16 or 32 on one board.
the really funny thing is I don't think savantu realizes that Intel still is using only Prescotts and smithfields on their 4+P market and that he is saying that Prescott is better than K8 :cheer2: :bounces: :eleph: :wierd: :lol2: :rotf: :hitself: :rehab:Quote:
Originally Posted by Serge84
Ma hahahaha... I love coming here to see the comity in the forums every day. :lol: Specially on my days off. :rotf:Quote:
Originally Posted by nn_step
Blal bla bla....I don't know if I should feel sorry or laugh. :stick:Quote:
Originally Posted by Serge84
For 90nm
Vdd=1.0V
IBM/AMD
NMOS=0.96mA @ 100uA Ioff
PMOS=0.48mA @ 100uA Ioff
Intel
NMOS=1.15mA @ 100uA Ioff
PMOS=0.67mA @ 100uA Ioff
Intel advantage 20% for NMOS , 40% for PMOS.
For 65nm
Gate Length: 35nm, Vdd=1.0V
IBM/AMD*
NMOS=1.14mA @ 200uA Ioff
PMOS=0.7mA @ 200uA Ioff
Intel
NMOS=1.21mA @ 100uA Ioff
PMOS=0.71 @ 100uA Ioff
Extrapolating Intel to 200uA should give around NMOS/PMOS ~ 1310/760@200uA.
Intel advantage 15% NMOS , 8.5% PMOS.
Drain leakage current is the current that still flows when the transistor is fully turned off. A good process has both high drive and a high ratio of max on-current to off-current.
For the IBM/AMD the on/off ratio is:
1.14 mA/200 nA = 1140 uA/0.2 uA = 5700:1
For the Intel the on/off ratio is:
1.31 mA/200 nA = 1310uA/0.2 uA = 6550:1
*If someone has newer values pls post them.
Actuallly Paxvilles and Tulsas , but I don't expect you to know the difference.Quote:
Originally Posted by nn_step
Put up or shut up , let's see if the K8 is indeed better in the 4+P space...
This is for 4P/8 way scores compiled by Michael_S
TPC-C:
1. Power5 (2200MHz) - 100 (estimated from 8-way score)
2. Montecito (1600MHz) - 67
3. Tulsa (3330MHz) - 61
4. Opteron (2400MHz) - 46
SAP-SD 2-tier:
1. Power5+ (2200MHz) - 100 (estimated from 8-way score)
2. Tulsa (3400MHz) - 77
3. OpteronF (2800MHz) - 72
4. Montecito (1600MHz) - 55
SPEC Jbb2005:
1. Tulsa (3400MHz) - 109
2. Power5+ (2200MHz) - 100 (estimated from 8-way score)
4. Montecito (1600MHz) - 85
3. OpteronF (2800MHz) - 77
link
I see that Tulsa is better than Opteron by :
- 32% in TPC-C
- 7% in SAP-SD
- 41% in Spec Jbb
paxville+tulsa = prescott (smithfield) + cedar mill (presler)Quote:
Originally Posted by savantu
i''ve never seen a fanboy THAT arrogant :p:
saying that netburst in its current state outperforms K8 in 4p situations is not just arrogant IT IS DUMB
But as the above enterprise benchmarks, all of which are important, it can and does. Which goes to show, a big cache and smart logic are just as important as the processor in bigger socket servers.Quote:
Originally Posted by generics_user
Sorry to say, I've seen a 4 SOCKET ES c2d board running quad woodcrests with clovertown support. There's probably a reason why this board never made it to retail as performance was absolutely horrid.....:p:Quote:
Originally Posted by Serge84
P.S. The performance advantage that I stated earlier was @ a speed = to one of Intel's current PRODUCTION quads, not @ 1ghz or anything like that :p: And don't forget, this result was from a desktop cpu....I haven't yet said anything about sF yet ;)
given those numbers:.Quote:
Originally Posted by s7e9h3n
2.93Ghz x 1.10 (or 110%) = 3.223Ghz.
Which is pretty good
Quote:
Originally Posted by s7e9h3n
Well hurry up and say something about it!! heh, j/k!! really, j/k.
I was thinking he meant desktop quads. Therefore he meant 2.66 or 2.4 not 2.93.Quote:
Originally Posted by nn_step
Seeing as 32nm immersion lithography is still not settled without double exposure or doubling masking I think Intel should tackle 32nm before jumping right to 25nm. EDIT: actually this little roadbump could help AMD close some more gap a few years down the road depending on how well resist manufactures react, what immersion fluid is found with correct refractive index and Canon(not so much), Nikon, ASML's time to market after this is settled.Quote:
Originally Posted by SOLDNER-MOFO64
All I had to say gentlemen...please continue...
You're 2 days behind. I for sure dont want a NN-step processor :DQuote:
Originally Posted by nn_step
Don't make up numbers with your intel fandum bozo BS. Show links? :rolleyes:Quote:
Originally Posted by savantu
I'm pretty sure this is a joke because currently they can not make this type of board. It is impossible only in your wet dreams. Get a girl friend. You didn't see jack SH*T. The FSB would be so limited each chip would only have about 266mhz of bus per socket or less. That wouldn't scale silly. :slap: :stick: Whats wrong with you? :rolleyes: Please show what you clam or stop showing BS on my forum.Quote:
Originally Posted by s7e9h3n
actually he is speaking of how Conroe's Prefetch compete against each other, which is why Tigerton is so delayed ;)Quote:
Originally Posted by Serge84
:) :) .... good one...Quote:
Originally Posted by savantu
here is the link referencing that data, it is extracted from IEDM reported results:
http://www.realworldtech.com/page.cf...005001504&p=14
Shown above.... also, most all this data can be found by simply spending an afternoon in the library at your nearest university. All IEEE sponsored journals and proceedings from conferences are published there.... savantu has posted accurate numbers and the appropriate analysis.Quote:
Originally Posted by Serge84
All I know is, C2D is basically the P3 architecture with lots of cache thrown at it, while the K8L/K10 is a big change, and that's why I believe the K10 will bring back the performance crown to AMD.
You may want to re-evaluate what you know about C2D.... it was just as a major overhaul or more so.... and it should have been, in order to leap as far forward as it did. Deeper TLB buffers, wider SSE and FPU units, extra decoder etc. etc. It was a bit more.Quote:
Originally Posted by ramenchef
http://www.extremetech.com/article2/...2027633,00.aspQuote:
What is known is that Barcelona—as AMD has dubbed this first iteration—isn't so much a brand-new architecture as it is a highly refined, tweaked version of the existing AMD x86-64. Those tweaks are numerous and significant. It's probably fair to suggest that Barcelona is to the current Opterons as Intel's Core 2 is to the Pentium M—designed from the ground up, on a base of the old with a lot of new stuff rolled in.
The magnitude of the revision, I believe is roughly the same, and yes K10 will be a massive step forward. However, to deride C2D's improvement over the P3 as just larger cache is unfair to C2D as well as K8 --- and even K10, for if all it ended up being is a larger cache then it would not take much to surpass K10.
well C2D was the logical improvement of P6 architecture (the design from Pentium Pro til Pentium3) but yes there are many many improvements from the P3 to C2D. Adding cache has diminishing returns until the point where the application entirely fit into it than any extra is completely wasted.Quote:
Originally Posted by JumpingJack
Are you actually dumb enough not to see what numbers tell you ?Quote:
Originally Posted by generics_user
You're the best example of rabid fanboys who have taken their beliefs to religious status.
Welcome to the real world , where Xeon has 60+% of the >=4P market and where real companies do benchmarks before they buy something.AMD can say what they want about their 4P solutions , SUN the same.Reality says otherwise you win some , lose others.
To prove that you don't know sh*t allow me to quote Randy Allen...If you don't know who Randy Allen is , Google is your friend.Quote:
Originally Posted by ramenchef
linkQuote:
AMD redesigned the Barcelona core, marking the biggest changes since the company made its 2003 transition from its 32-bit Athlon chips to the current 64-bit lineup. The magnitude of the transition is about halfway between the small tweaks AMD has made to Opteron over the years and the clean-sheet redesign Intel employed in moving from NetBurst to its current Core design, Allen said.
It's good to know that Intel's biggest competitor admits that Core is a clean-sheet redesign , that's worth more than all the shouting from a specific crowd who likes to call Core a "P3 with cache".
It simply shows their level of understanding or its lack thereof...
Me come back after a lonG timee to see this. Dudez whow thatz a bummer for him. Got wiped out... just like that. Well "You're as bad a troll as Serge."
http://www.amd.com/us-en/Corporate/V...103048,00.html
http://www.amd.com/us-en/Corporate/V...114609,00.html
I think AMD has the upper hand here in this game of tag.
I'm sorry but for once somebody here is right and the other person is wrong. No offense brow. Woooh I wouldn't want to get booted out of here like the krock hunter does to a dingo on a satterday night MAN. But this is about now K10 is it not?
Can we stop talking about other people and get back on track so we can be rad man? Cuzzzz K10 is theE BOMB. Like the man said stick on topic and stop getting personal. Its like Sooo NOT COOL Bro!
Try comparing history not just one sample of conroe bro. AMD's FAB capabilities are more like not comparing ratios but complexity of techniques and materials used Intel Lacks mate. Netburst was a frigin jk on a croks tail over a camp fire. Leaked like a sharks mouth is wattered 24/7 dingo. FAB VS FAB AMD's just going to flat out win because SOI-3 as said before is like trying to compare a warthog to a cheetr catz The big cat in the outback will always win with the more complex tech mate. ;)Quote:
Originally Posted by savantu
http://fab36.amd.com/en-us/tech_silicon.aspx Read this.
:toast: Funny how they don't ban all flamers mate? That was my Bro and I'm sure he can if he was here to defend himself. But I guess he needs other ppl to do that for him because some ppl just can't talk to somebody head on and half to talk behind their backs. Cool off brent. You take things far too seriously. Its just a forum calm down. Now lets get back to the bebobing in the outback with this K10 stuff boy's and gals... are there any I wonder sometimes? :P The Tech is as new as a 1st born pocket jumper. So may we treat it as such? Who knows.Quote:
Originally Posted by LOE
more on the bacelona from the inquirer
http://www.theinquirer.net/default.aspx?article=37574
At the International Solid State Circuits Conference in San Francisco, which kicks off Feb. 11, the company's engineers will demonstrate new technology that will make AMD's first quad-core chip more power-efficient than previous dual-core processors.
http://www.channelinsider.com/articl.../200885_1.aspx
Nice move :)Quote:
In addition, AMD engineers will also demonstrate a feature in Barcelona that allows the four cores to be powered down independent of the system memory interface. This, according to AMD, will still allow peak memory performance, while saving on power.
The memory interface will also allow the read/write memory to power down. The result, AMD said, will allow a power savings of 80 percent with the memory controller.
soo ok guys was readin tru and im abit confused.is k8l a new chip that will run on am2 or its own new board??
just so much amd stuf happen like the fx-74 and stuf :D
desktop version should be out in the third quarterQuote:
Originally Posted by awhir
supposedly it will run on am2 motherboards , with probably a bios update , but you would probably be better off to get a am2+ motherboard which would allow it to power down the cores and parts of the cpu that is not being used , another words it should be more power effivient in a am2+ motherboard
the barcelons is a server cpu , but amd may allow some to be used in the quad father motherboard
any more questioons? just ask away
Basically K8L/K10 chip will work on AM2/S1207 sockets (without split power planes, so it will be less energy efficient in old motherboards).Quote:
Originally Posted by awhir
to fully utilize its potential you will need AM2+/S1207+ sockets. Purely performance wise I can't see any significant differences between old/new variant of same socket (at least in 1P-2P motherboards).
K8L just like K8 is going to be featured in a few sockets.Quote:
Originally Posted by awhir
and Like always, any socket that it fits into (without the removal or bending of pins), it will work though not always at optimal efficiency
Interesting:) ....I have to get more info on this AMD stuff.
the way K10 will achieve 40% advantage
http://img201.imageshack.us/img201/8...taskingzq7.png
:)
We've already had confirmation that 40% overall is simply not happening
Randy Allen and Patrik Patla (AMD directors) told us about 40per cent, and suddenly brentpresley appears and tells us
look better at the pictureQuote:
that 40% overall is simply not happening
40 % advantage is for rough multitasking environment
10 % is for single-threaded appl.
funny in my favorite programming class, the teacher whipped code optimization and code splitting into us. knowing when to use integer approximation and when to do massive parallel floating point. Fun class, but definitely not for beginnersQuote:
Originally Posted by brentpresley
Everyone that owns a C2D depend on how well it OC's!!!.....they'd be 30%-50% less powerful if they didn't scale as well.Quote:
Originally Posted by brentpresley
Well....how many of you power users OC your C2D's? 100% of you?
When you start talkin' OC's then the performance gap will only grow further.
We all know a C2D HAS to be overclocked in order to attain the performance levels everyone talks of, why should it be any dif for AMD?
All we can go off are estimates of Performance and a speculative 10% from s7's under NDA guy.
If this is the only figure we know of, then we expect probably 15% more speed than a c2 (clock for clock). Until other figures are released it is nothing but a pointless argument.
Agreed :)Quote:
Originally Posted by brentpresley
Here, here :)Quote:
Originally Posted by Motiv
Just to finish the SSE FUD that somehow started. Look on C2D vs CD. Is the C2D like 6x faster? C2D got 6x higher potential SSE throughput. But its not really that much of the total code thats SSE.
Less dreaming, more reality please. x87 to SSE patches for games dont even bring that much.
And SSE is still widely missing at many places....MS tries to force this with no x87 in 64bit. But mandatory SSE. However...dont dream...SSE is a nice boost but no miracle. Its more a matter of cleaning up the stupid x87 and get it removed with time from the CPU.
absolutely, fortunately a well made and documented program can be updated rather quickly. I remember helping in a project to convert an Audio encryption from Integer to SSE3, took a couple days but the performance boost was huge.Quote:
Originally Posted by brentpresley
So it ultimately how important performance is to you.
the clue is "estimates"
i hope its atleast half true ;) would still give c2d a run for the money
I definitely agree with you there, heck take ten seconds to look at Microsoft source code and you'll wonder how the hell they got it to run. Some of them just seem to love the "goto statements" But I must admit their Binary interfaces and the assembly they use for it are extremely well made.Quote:
Originally Posted by brentpresley
Unfortunately the technically skilled aren't the ones writing the most code.
And if you really want to see a 300% speed increase, transcribe .Net programs to pure C code. Talk about a huge improvement.
Some interesting bits:
Source:Quote:
A 65nm silicon-on-insulator process is used for producing the near-450-million transistor device, with dual stress liners and a silicon germanium process is used to speed up the pFETs. Eleven layers of copper and low-k dielectrics connect the device.
At 95 degrees Celsius, modelling suggests the processor will run at between 2.2 and 2.8GHz at 1.15 volts. Each of the four cores include eight temperature sensors. The on-chip northbridge contains a further six.
The memory interface is 400 to 800Mbps from a 1.7 to 1.9 volt supply for DDR2, and 800 to 1,600Mbps from 1.4 to 1.6 volts for DDR3.
The HyperTransport interface supports legacy HT1 and 2 modes as well at HT3 at 2.4Hbps with a peak of 5.2Gbps.
http://www.edn.com/article/CA6415782.html?partner=enews
Enjoy!
:)
But it's not slower, sometimes its faster, sometimes its slower depending on the application, just like the K8. Overall, it still remains the fastest 64-bit x86 processor available today.Quote:
Originally Posted by LOE
We see a one or two unrealistic scenarios where this happens and requires specific situations that benefit from the Quad FX's additional memory controller. However, in a single-socket system, the desktop versions of Barcelona will only have 1 memory controller and 12.8GB/s of memory bandwidth.Quote:
heavy multithreading - we already see quad FX running inferior chips outperforming core2quad in heavy multithreaded scenarios, that gap will only grow bigger when K10 comes out
Most other heavy multi-threaded scenarios have the QX6700 beating the Quad FX just as easily as it does in single-threaded scenarios.
A C2D can execute 1 128-bit multiply, 1 128-bit add plus a load, store and jump in the same cycle.Quote:
are you sure? :nono: C2D can process one 128bit sse instruction per cycle, do you mean pentium has a 21.33 (128/6) bit SSE engine :rofl:
:up: :party3:Quote:
Originally Posted by Lightman
All CPUs speed up in 64 bits due to the larger amout of registers and the standard SSE2 instructions.Quote:
Originally Posted by accord99
But Core2 does not speed up as much as K8 since MacroFusion doesn't work in long mode.
On SSE execution K10 has little advantage.
Core2 has 3 SSEs plus one load and one store units.
K8 has 3 FPUs (that do SSE) plus the load/store unit that do two loads/stores per cycle, on K10 the FPUs are widened to 128 bit so it can do 3 128 bit SSE per cycle plus 2 load/stores.
So Core2 does 3 SSE, 1 load and 1 store. K10 does 3 SSE, 1 load and 1 store or 2 loads or 2 stores.
http://www.xbitlabs.com/articles/cpu...amd-k8l_5.html
Quote:
Originally Posted by savantu
I don't know why 0.9 to 1.2 keeps sticking in my head, but in some code base yes, P4 could do that 0.9 to 1.2 (some apps within the SPECINT bench showed this high):
http://www.princeton.edu/~jdonald/re...uck_pact03.pdf
(EDIT: it is reading this paper sometime ago that 0.9 to 1.2 sticks in my head, because my first thought was wow... a P4 can actually do that :) )..Quote:
The benchmarks that perform
best in this environment are mcf, art and swim at 93%, 97%
and 98% of peak respectively. eon and wupwise have relatively
high instruction throughput of 0.9 and 1.2 IPC respectively,
while mcf and swim have relatively low IPCs of .08,
.2 and .4 (all IPCs measured in ��ops). Not unexpectedly,
then, those applications with low instruction throughput demands
due to poor memory performance are less affected by
the statically partitioned execution resources. See Figure 1
for a summary of results from these runs.
The IPC, of course, is very code dependent (compiler optimizations, instruction ordering, etc) and how the architecture handles the ILP efficiency, combined with all sorts of factors. Truth is I have looked over probably half dozen to dozen papers where the IPC is measured/calculated, HT helps, I have seen IPC as high as 1.6 in some code base. However, the original point is that it really really stunk in a general sense.... a long pipeline with unoptimized code for that situation will generally crater the efficiency.
Another example of who well and poor the P4 can do IPC wise:
http://www.geocities.com/ykchen913/p...ions/CAECW.pdf
In h.264, the IDCT chain could get as high as 1.16 (see table 4). This is a good paper, as it also shows FSB utilization on a P4 is quite low even with a high L2 miss rate.... this is on a 533 MHz FSB .... and multimedia is likely to have the highest demand on FSB.
Anyway, C2D I do believe is significantly higher than 1.0 IPC on average (some will be low of course, but others high), but I have not found any studies or data that has measured it.
Barcelona appears to be heading for a good IPC boost, achieving something higher that C2D will be a true accomplishment, C2D did a good job in this department to show the improvements. I am anxious to see the data.
Jack