Apogee Test at Systemcooling

i still don't agree that die sims are the best way to test actual CPU temps. however, given that the thermal diode on the CPU doesn't give temp info for all areas of the CPU then the die sims are really about all we have (unfortunately). i'd be satisfied with using die sims to test performance on a naked core but there is still a complaint from my tent...

some 80% of users use the IHS as they are scared to remove it, they are lazy or they just don't care. they are giong to be sorely dissapointed with the performance on some of these blocks and how much their results vary with the IHS still on. with this in mind, there MUST be a way to test waterblocks with some type of IHS simulation. it has to happen. i realise that the IHS can vary quite wildly due to concavity (my storm block went from producing 31C temps to 38C temps just from a remount before i removed the IHS) but it must be tested somehow.

i don't care how you do it and i don't know how you're going to do it and get repeatable results everytime but it has to be done.

Or wait til AMD Indium-Solder their IHS on, then the whole issue goes out the window *shrug*

nice info Marci, you guys are gods... ^_^

so then that still goes to show that you MUST have a test that somehow simulates IHS.

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Originally Posted by moonlightcheese

i still don't agree that die sims are the best way to test actual CPU temps.

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Umm, you arent testing for CPU temps, you are testing to see the efficiency of the WB. NO WB WILL BE EFFICIENT WITH AN IHS PERIOD.

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Originally Posted by moonlightcheese

some 80% of users use the IHS as they are scared to remove it, they are lazy or they just don't care. they are giong to be sorely dissapointed with the performance on some of these blocks and how much their results vary with the IHS still on.

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Then those users should use any block that fits their budget, Maze 3 whatever it does not matter. Until AMD solders the IHS to the core (even then perhaps a bit iffy) then use anything, you will likely get the same results, otherwise remove the IHS altogether.

OMG...

I just unpacked my Storm. Comparing these two blocks side by side is like comparing a diesel Rabbit... to a Z06 corvette.

If the apogee is the future... I always did like history. The storm is going in my loop.

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Originally Posted by orkan

OMG...

I just unpacked my Storm. Comparing these two blocks side by side is like comparing a diesel Rabbit... to a Z06 corvette.

If the apogee is the future... I always did like history. The storm is going in my loop.

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Hehe, dare I say 'told ya so'. Enjoy it, it is an awesome block, a work of art :D

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Originally Posted by MaxxxRacer

While fluid dynamics software is all well and good, one cannot rely on it to be the end all for thermal transfer. .

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read my post: we used a series of tools.

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Originally Posted by MaxxxRacer

IF the design of the Apogee was indeed designed in this manner, Lee (and hopefully Derek, if he ever does testing again) proved that the software isnt always right. As computer junkies we woud all like to think the computer is always right, but its only as good as the equations we put into it.

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What is this IF all about? I just posted that we did. Design sequence consists in theoratical data first (CFD), then validation (thermal tools).

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Originally Posted by MaxxxRacer

A queston for you Gabe. One of the earlier posts in this thread states that Intel says the TTV is ok for repeat long term testing as long as the proper adjustment calculations are done to the results. They dont state what those are for whatever reason, but does Swiftech have those vital equations? If not, according to Intel Swiftechs TTV testing is just about useless.

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I am not at liberty do discuss any of the above. Please indulge me in assuming that we use our tools as professionals: the way they are suppoosed to be.

Gabe

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Originally Posted by Cathar

Gabe, all I know is this: Attempting to quantify waterblock performance using a "numb" thermal die and/or a variable laden interface is nigh on impossible. Let me know if you don't agree with that.

If you don't agree with that, then we have a fundamental difference of opinion on waterblock performance assessment methodology.

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As I said, we designed with CFD, then validated using three different test benches: TTV, Die Sim, and Real CPU - All the data converged with respect to expected performance of the Apogee.

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Originally Posted by Cathar

but the ranking was not, so most people let it slide. With the Apogee though, now we have an anomoly that no one can ratify. Of course there's going to be complaints now, and not before.

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Now you called it. It's all about ranking. There is no anomaly Stew. The consensus that is developping is clear: some blocks will perform better in some applications than others. Of that I am certain. We are betting on the future of dual core processors.

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Originally Posted by Cathar

I don't care who designed it, especially if it is being used for purposes for which it cannot possibly hope to perform as.

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What purposes? Design or Reporting ? I think I addressed both points in my post. We agree as to design. We disagree as to Reporting. Again, its all about ranking. And again, my point is that we published all three data sets. Emphasizing TTV results in the presentation of the data sets is a more legitimate approach from an industry standpoint IMO.

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Originally Posted by Cathar

I am sorry that we have such a fundamental disagreement about the correct way to assess waterblock thermal performance.

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I will reformulate: You say "it's my way or the highway", and I will reiterate: from a design standpoint we do not disagree, but from a Reporting standpoint, we certainly do. We do not place ourselves ABOVE industry standards. We abide by them. If a better tool becomes available to Report water-block performance that complies with Industry Standards, then we will use it. This discussion reminds me of what happened in the bench testing of graphics cards. Several tools are now necessary to evaluate graphics performance. The same now applies to water-blocks.

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Originally Posted by gabe

As I said, we designed with CFD, then validated using three different test benches: TTV, Die Sim, and Real CPU - All the data converged with respect to expected performance of the Apogee.

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Unsure how one could ever expect to to see convergence on testbeds (TTV & IHS capped CPU) in which there are unknown and unquantified variances. This is the very basis of the point I'm trying to make. It's not much different to expecting to see convergence when spinning a roulette wheel. Sure, you know that something between 00 and 36 is going to come up...

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Now you called it. It's all about ranking. There is no anomaly Stew. The consensus that is developping is clear: some blocks will perform better in some applications than others. Of that I am certain. We are betting on the future of dual core processors.

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You must be reading different independent tests to I then. Both the MCW6000 and the Storm are seen to exceed the Apogee. That is not an anomaly?

Future of dual-core processors? Unsure where you're going with this comment. The smaller of the AMD X2 CPU dies is 147mm^2, no bigger than an old single-core Intel P4 Northwood die, and the largest AMD X2 die is 199mm^2, or about the same size as Lee's "small" test die. If you're referring to dual-core CPU's suddenly getting much larger than that, then Lee's "enormous die" (at 1024mm^2) isn't exactly saying much there either for the Apogee in comparison to the MCW6000. The Intel dual-core CPU's are ~206mm^2, also about the same size as Lee's small die.

It is not economically feasible for CPU makers to produce dies of silicon significantly larger than 250mm^2. Doesn't matter if it's single core, dual or quad core. As processes shrink, CPU makers will continue to squeeze more cores into the same sorts of die areas as historically used by single-core CPU's.

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What purposes? Design or Reporting ? I think I addressed both points in my post. We agree as to design. We disagree as to Reporting. Again, its all about ranking. And again, my point is that we published all three data sets. Emphasizing TTV results in the presentation of the data sets is a more legitimate approach from an industry standpoint IMO.

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Design or Reporting. Both are at issue here. Primarily Design though. Can't design a waterblock and be truly certain that you're making forwards progress on a testbed with unquantified variables. Again that's the fundamental basis of my point. As to the act of Reporting values that a variable laden testbed is providing, we've all seen the sorts of fallout that occurs on various forums when independent testers do that...

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I will reformulate: You say "it's my way or the highway", and I will reiterate: from a design standpoint we do not disagree, but from a Reporting standpoint, we certainly do.

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No, see above. This is why I think you're misunderstanding where I'm coming from. In the past you've dismissed this as all being down to a matter of my professional pride based upon reported results. It is not. It is about my perception that some people are arguing for the dependence upon variable laden testbeds for "proof" that we're making forwards progress, and I see that as bad science, and I will always call it when I see it. Have been doing so for four years now. Doesn't matter who does it. In the scientific community it's called peer review. Right now I see a very concerning trend emerging that bodes ill for any hope of forwards progress. Not just from me. Not just for the Storm. For waterblock development as a whole.

I am sorry that the Storm seems to have clouded people's perceptions about the strength of my message. This has very little at all to do with the Storm. I would be saying the same even if the Storm was not involved.

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We do not place ourselves ABOVE industry standards. We abide by them. If a better tool becomes available to Report water-block performance that complies with Industry Standards, then we will use it. This discussion reminds me of what happened in the bench testing of graphics cards. Several tools are now necessary to evaluate graphics performance. The same now applies to water-blocks.

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I was unaware that Intel had actually produced an industry standard testbed specific to waterblock assessment. Again, hammer and torque wrench anaology. Just because Intel made an industry standard hammer, doesn't mean that it's appropriate to use to do the job of a torque wrench. As the saying goes, when all you have is a hammer, everything looks like a nail. This saying describes this situation perfectly.

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Originally Posted by Cathar

As the saying goes, when all you have is a hammer, everything looks like a nail. This saying describes this situation perfectly.

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Can't get any simpler than that really.

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Originally Posted by nikhsub1

Guys, you need to understand that the AMD IHS 'numbs' the cooling affect of almost all blocks. This is the reason why in Lee's CPU test all 3 blocks are nearly identical (he did read diode of CPU for this test IIRC AND the probe on the IHS). What does this mean to you? Well, If you run with an IHS, anything from a Spiral to a Storm will yeild you similar results as far as temp monitoring goes. Say what then? A Spiral as good as a Storm? Well, for all of you that argue the only valid testing is WITH an IHS, then your answer is YES. Go get a Maze 3 or 4, it will perform just the same as an Apogee or a Storm.

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http://www.systemcooling.com/forums/...ndpost&p=33173

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Originally Posted by nikhsub1

http://www.systemcooling.com/forums/...ndpost&p=33173

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Yep. Illustrates precisely why using IHS bound testbeds for "performance assessment" is a total joke, unless we choose to believe that the last 5 years of waterblock development has all been for nawt, even though testbeds that remove variability and numbness show perfectly well what's going on.

I am not sure whether I am OT or not, but since this thread is related to the systemcooling article...Now Gabe, "Robotech" along with some users have found copper shavings in their blocks after they opened them. How and when will this potentially pump damaging flaw be remedied? If we don't want dust in our loop, we certainly don't want chunks of sharp copper "flying" around in there. If any watercooling hardware is damaged due to the copper shavings how will swiftech handle this? I am asking only cause you seem to be working for Swiftech.

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Originally Posted by situman

I am not sure whether I am OT or not, but since this thread is related to the systemcooling article...Now Gabe, "Robotech" along with some users have found copper shavings in their blocks after they opened them. How and when will this potentially pump damaging flaw be remedied? If we don't want dust in our loop, we certainly don't want chunks of sharp copper "flying" around in there. If any watercooling hardware is damaged due to the copper shavings how will swiftech handle this? I am asking only cause you seem to be working for Swiftech.

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check out the thread in the link at the end of the systemcooling.com review for the Apogee and Lee posted some comments from swiftech regarding QA and extra testing (which were insufficient and barbaric if you as me...)

ROFL at that link nik. that REALLY shows you how useless onboard sensors are and how entirely useless taking temps from the IHS are.

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You must be reading different independent tests to I then. Both the MCW6000 and the Storm are seen to exceed the Apogee. That is not an anomaly?

Future of dual-core processors? Unsure where you're going with this comment. The smaller of the AMD X2 CPU dies is 147mm^2, no bigger than an old single-core Intel P4 Northwood die, and the largest AMD X2 die is 199mm^2, or about the same size as Lee's "small" test die. If you're referring to dual-core CPU's suddenly getting much larger than that, then Lee's "enormous die" (at 1024mm^2) isn't exactly saying much there either for the Apogee in comparison to the MCW6000. The Intel dual-core CPU's are ~206mm^2, also about the same size as Lee's small die.

It is not economically feasible for CPU makers to produce dies of silicon significantly larger than 250mm^2. Doesn't matter if it's single core, dual or quad core. As processes shrink, CPU makers will continue to squeeze more cores into the same sorts of die areas as historically used by single-core CPU's.

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Gabe, after reading your comment that you guys are looking ahead to dual cores, the response that I quoted above from cathar was EXACTLY what went through my mind. The core will NEVER get above 250mm^2 becuase as Stew said, its just too expensive. When Intel and AMD go to four cores it will be on 65nm wich is 30% smaller than the same core today in 90nm flavor. And in 2-3 years Intel will be on 45nm which is 1/2 the size of todays 90nm chips. So as Stew pointed out your comment on the future of dual core is totaly null and void.


As we all have figured out by now, the IHS really puts a cramp on getting good test results out of a waterblock. BUT I believe I have a solution. Rather simple I think.

To fix this problem someone merely needs to test with a die simulator with a real IHS on the die sim and without the IHS. Use the EXACT same equipment, just with IHS and without. Everything else being equal. using the dT (water in to die temp i suppose) divide the IHS temp with the non IHS temp. This will give us a IHS co-effecient. The higher the co-effecient, the WORSE the block performs with an IHS compared to its non-IHS performance. this number would be useful in letting the consumer know which block to choose from if they plan to run IHS or not and if they plan to ever remove the IHS after using a block with the IHS.

I am for better testing methods. Using copper shims under a IHS to simulate core position seems a good idea.

I still prefer my old maze 3 to everything else out there in my chiller loop.

I doubt there will be some magical waterblock that scores so much better than the rest anytime soon. I've tried most of em and the RBX kinda outshines the crowd with the right pump on a room temp setup.

Why would you want to test with an IHS in the system? It is an uneeded variable that will only serve to screw up the results. You only have to look at the systemcooling test using the actual cpu which showed all the blocks very closely grouped. Now, before you all raise heck about the onboard temp sensor used in that test, remember it is the same one used for all the blocks; therefore its temps for block 'a' can be compared to block 'b' ONLY if they were both tested on that rig.

The last few years have been very exciting in the watercooling world. Since the original Maze1 from DD there has been a steady progression of technology employed in waterblock design, all the way up until the Apogee. Here is where for some reason a major company has taken a huge step backwards, and for what reason? Did it have to do with the business deals regarding blocks that were designed outside of the company? Did it have to do with a former employee going to work for a competitor? Why did Swiftec dust off the old 'diamond-pin' design and present it to the world as the new leader in design, unseating the previous holder, a block also produced by them (although not designed in house)? Oh the things that only Gabe knows the answers to.....


PS... Give me any two items and lab full of equipment and I can design tests which will make each item appear the winner.... Think about it ;)

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Originally Posted by lv_dicedealer

PS... Give me any two items and lab full of equipment and I can design tests which will make each item appear the winner.... Think about it ;)

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Exactly.

... and if you stand to profit from one item being the victor over another... it shall be so! ;)

Really the core of the matter if you ask me.

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Originally Posted by lv_dicedealer

Now, before you all raise heck about the onboard temp sensor used in that test, remember it is the same one used for all the blocks; therefore its temps for block 'a' can be compared to block 'b' ONLY if they were both tested on that rig.

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I beg to differ; I have personally observed stupidly abnormal anomalies in ondie sensors; I changed the RAM cooler on my video card and suddenly had -40C RAM temps with air cooling.

much agreed bloody. Onboard temp sensors are nothing short of useless.