Was this with the original Celerons that didn't have L2 cache?
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celeron was actually first to have on die L2 cache. it was to save money and ended up being really fast compared to pentium.
I think there were a couple P2/Xeon boards you could put daughter boards for L2/L3 in but mostly it was just 386/486/P1.
[OT]I have lot of 'em here, if you want a photo of my collection ;) Most PI boards are running :D[/OT]
PIC
The brown slot is for the cache sram extension.:)
looks like production starts in H2!
http://babelfish.yahoo.com/translate...rUrl=Translate
no Llano till 2011? bahhhhh!!
and it will be 32nm, and phenom 3 based parts (zoazma right?)
vietthanhpro: a bit ot, but why is in your signature this fake screen Zosma?:confused:
whoa thia has a lot of info (i have never seen some of these slides before). more info comming monday...w00t!
http://translate.google.ca/translate...%26tbs%3Dqdr:d
heh no i have to say i am not, i understand why you are asking though, but i swear that every time i look for info on amd.....i get some Asian website...lol, damn Asians and their secrets! i think intel and amd like Asians better than Europeans or north Americans???
:shocked:
ps. Google translation really is my savior ;p.
err i dont know about this one; but if they are right...fusion coming first Q or 2010???? they must mean 2011 right?
http://www.ibtimes.com.au/articles/2...processors.htm