Here is dual channel run with adjusted ODT.
http://www.armada.fi/Bearlake/BLP_Tw...CMB_DualCH.jpg
Since ODT cannot be adjusted (on Asus) from the bios and it is impossible to get in Windows without adjusting (if tCL is under 10CLK) it I have to boot with 470FSB and use clockgen to get higher. When booting under 500FSB the transaction booster / performance level must be loosen a bit because otherwise you won´t reach 500FSB. Of course when booting at 500FSB it will be automatically loosen as the "strap" changes at 500FSB.
ODT can actually be adjusted with tools available to public.
I use the good ol' WPCREDIT and Pmem combination for all of the adjustments.
Unfortunately my board seem to get worse and worse.
Few days ago I had no problem doing 2000MHz / 1T in single channel, today I cannot even get in to Windows with the same settings :(
There is no difference in MCH temps or voltage.
The chip just cannot do it any more.
Seems that using 1.8V will damage the MCH really fast. It is not a surprise thou, since it is a 90nm part and even the 975X (130nm) could be damaged with 1.8V+ in prolonged use.
I would like to see if there is any difference in ODT register configuration on Blitz compared to P5K3.

