Intel demonstrated a 80-core, Teraflop CPU!!!

Now where's that demo of AMD quad core for all to see? Intel just made me happy that I brought a new Conroe rig. AMD is going to start losing money again if they don't show something bad ass.

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Originally Posted by safan80

Now where's that demo of AMD quad core for all to see? Intel just made me happy that I brought a new Conroe rig. AMD is going to start losing money again if they don't show something bad ass.

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hm k10 will be soon on the market, i suppose an early q3 launch for the 'stars'.
unless intel bump considerably the speed of its 45nm, the green side will have its thrown back. :fact:

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Originally Posted by zir_blazer

That's my typo. Itanium logical Core (Ignore Cache) is smaller than that of an x86 Core. As it kicks instruction schedule responsability to the compiler, the logical Core itself is smaller and less complex than a similar x86 Core. It is efficient if you have a good team of programmers optimizing by hand an application code, that doesn't means that it is practical for everything though.



If it is not VLIW, what Dailytech is saying that it is?



Again, when doing Transistors-based comparision, remove the Cache, as that 600M Transistors (Montecito I suppose?) monster got obviouly tons of Cache L3 (It will cripple its performance but that is not what I am comparing). Anandtech did an article with a in-depth architecture comparision of IA64 vs x86, but I wasn't able to find it after 30 minutes searching.
Intel did the same with this prototype, it is similar to Itanium as its trades lot of Core logic for simplicity of each them, but goes for massive thread parallelization instead of massive instruction parallelization like Itanium did.

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Technically it is a MPTP (Massively Parallel Threaded Processor) since there isn't an explicit requirement of Instruction level instructions. The parallelism that is exhibits is thread level not instruction level (which is what VLIW is)
I know it is picky but it is a very distinct difference when programming for it.
Itanic was instruction level parallel and this is a Thread machine gun, for lack of a better term.

Link from big anands article on the subject http://www.anandtech.com/cpuchipsets...oc.aspx?i=2925
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Mexico Hotels

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Originally Posted by nn_step

yeah but 8 power connectors doesn't exactly screen energy efficient

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Just seen this on the news...

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Originally Posted by News

There was a prolonged blackout this afternoon of up to 6 hours in some areas said PSEG, the cause according to authorititys was NN_steps new 80 core pc.

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keke :rofl: