First review of Intel Core 2 Duo E4300

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Originally Posted by nn_step

very true, but lets actually wait until after retail before we calculate their New average overclock, since they have made a few Die Changes. Which may mean better or worse average overclocks. But we will see

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nn- Are you sugjesting that Intels newer steppings. Would not be as efficient as their older stepping. Or maybe you believe that Intel corporation did something internially to the core to prevent raising the internal frequency of the core. Could you be more specific in what your implications sugjest.

I have recently read many of your post. They seem to lack substance and seem to be very suspect. After reading the post in this thread your comment seems to lack support.

I am suggesting that intel is going to put process yields and reduction of Die Size over max unstable overclock.

May I assume that a 2mb smaller cache is were the smaller die size comes from of which you inference, Would it also be safe for me to say that a new stepping should provide a small inprovement in the core itself? Combine that with 2mb less cache. Wouldn't it be safe to assume that the core frequency would scale higher?
For a hardware enthusist such as yourself that belief would be logical would it not?
So wouldn't it be safe for enthusist to assume that this stepping would clock even better than the earilier steppings?
I believe I read in the news section. About the new 65nm. AMD core . That you made an inference that as the process matures that it would scale internally to a higher frequency. Is that correct?
So my question than would be to yourself. Why wouldn't you think the same about Intels 65nm core?
It would seem that your tring to degrade Intels core architecture. Do you have anything to gain from said degradation of the aforementioned architecture?

it isn't degradation, it is profit extraction from a successful architecture

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Originally Posted by nn_step

it isn't degradation, it is profit extraction from a successful architecture

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Could you expand or elaborate on that statement?

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Originally Posted by Turtle 1

May I assume that a 2mb smaller cache is were the smaller die size comes from of which you inference, Would it also be safe for me to say that a new stepping should provide a small inprovement in the core itself? Combine that with 2mb less cache. Wouldn't it be safe to assume that the core frequency would scale higher?
For a hardware enthusist such as yourself that belief would be logical would it not?
So wouldn't it be safe for enthusist to assume that this stepping would clock even better than the earilier steppings?
I believe I read in the news section. About the new 65nm. AMD core . That you made an inference that as the process matures that it would scale internally to a higher frequency. Is that correct?
So my question than would be to yourself. Why wouldn't you think the same about Intels 65nm core?

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The reason why nn is speculating why the new C2's may clock worse is probably that they've got a new package, and not because of the new core. Fewer capacitors under the CPU is not really a good sign, and if they could have done this without loosing clockability they probably would have done it with the faster CPU's too. They didn't.

Maybe they have made a "low speed package", maybe not.
So far it's all speculations.

Well it looks like their will soon be 4 Mb L2 cache 6300's and 6400s too. The price of the E6600 is dropping also.

So I really wonder how significant this e4300 will be?

http://www.dailytech.com/article.aspx?newsid=5414

What's the story with the upcoming 45 nm CPU's Wolfdale and Yorkfield, will they use LGA 775 or some new socket?

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Originally Posted by Mats

What's the story with the upcoming 45 nm CPU's Wolfdale and Yorkfield, will they use LGA 775 or some new socket?

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Not sure if they will use LGA 775 or not.....but the chipset is called "Bearlake" and is 1333 FSB. I think this one is meant to work with DDR3.

What I don't understand is how DDR3 will help Overclockers. It seems DDR2 is letting us all hit the max frequency of this CPUs already.

HKEPC

I was looking for an article I recently read. In that article it said that the bearlake chipset would be DDR3 with the X38. It also said you could use either DDR2 or DDR3 memory with this chipset(M/B makers discretion), Since Wolf and Yorkfield are Optical shrinks. With HighK and metal gates. With 30 new SSE4 instuctions . I would assume its they same socket. The only socket change I have seen for intel comes with Nehalem. I do recall reading about a socket change for the notebook but my recollection of that isn't to good. Since C2D is a modular design intel could add more to Wolf/York but I have read nothing on any such changes.

DDr3 should help over clockers but the real improvement will come in Qcores as the higher bandwidth will be desirerable. It has been publicly stated that 1333 FSB DDR3 would be available with this chipset. But it would not make a lot of since for intel not to incude support for DDR3 1600. Which would incude support for a cpu fsb of 400. So DDR2 800 could run at 1:1 and DDR3 at 1:2 multipliers. The Commando Fsbs is said to reach over 2000. So DDR2 1066 could run at 1:2 multiplier. not sure Tony is working on the M/B . But stopped to work with Badaxe 2. But knowing the 965 chipset can reach 2000+ fsb . One can only assume that bearlake will reach a much higher frontside bus speed.

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Originally Posted by Turtle 1

I was looking for an article I recently read. In that article it said that the bearlake chipset would be DDR3 with the X38. It also said you could use either DDR2 or DDR3 memory with this chipset(M/B makers discretion), Since Wolf and Yorkfield are Optical shrinks. With HighK and metal gates. With 30 new SSE4 instuctions . I would assume its they same socket. The only socket change I have seen for intel comes with Nehalem. I do recall reading about a socket change for the notebook but my recollection of that isn't to good. Since C2D is a modular design intel could add more to Wolf/York but I have read nothing on any such changes.

DDr3 should help over clockers but the real improvement will come in Qcores as the higher bandwidth will be desirerable. It has been publicly stated that 1333 FSB DDR3 would be available with this chipset. But it would not make a lot of since for intel not to incude support for DDR3 1600. Which would incude support for a cpu fsb of 400. So DDR2 800 could run at 1:1 and DDR3 at 1:2 multipliers. The Commando Fsbs is said to reach over 2000. So DDR2 1066 could run at 1:2 multiplier. not sure Tony is working on the M/B . But stopped to work with Badaxe 2. But knowing the 965 chipset can reach 2000+ fsb . One can only assume that bearlake will reach a much higher frontside bus speed.

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wow :woot:

i think its a really good year.. :) hehehe.. many money to spend also.. :( hehehe I'll stick with my upcoming setup and just watch you guys for 3 years.. :)

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Originally Posted by Turtle 1

I was looking for an article I recently read. In that article it said that the bearlake chipset would be DDR3 with the X38. It also said you could use either DDR2 or DDR3 memory with this chipset(M/B makers discretion), Since Wolf and Yorkfield are Optical shrinks. With HighK and metal gates. With 30 new SSE4 instuctions . I would assume its they same socket. The only socket change I have seen for intel comes with Nehalem. I do recall reading about a socket change for the notebook but my recollection of that isn't to good. Since C2D is a modular design intel could add more to Wolf/York but I have read nothing on any such changes.

DDr3 should help over clockers but the real improvement will come in Qcores as the higher bandwidth will be desirerable. It has been publicly stated that 1333 FSB DDR3 would be available with this chipset. But it would not make a lot of since for intel not to incude support for DDR3 1600. Which would incude support for a cpu fsb of 400. So DDR2 800 could run at 1:1 and DDR3 at 1:2 multipliers. The Commando Fsbs is said to reach over 2000. So DDR2 1066 could run at 1:2 multiplier. not sure Tony is working on the M/B . But stopped to work with Badaxe 2. But knowing the 965 chipset can reach 2000+ fsb . One can only assume that bearlake will reach a much higher frontside bus speed.

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not that it matters but current 965 boards already do well over 2000, so im not sure why you think commando is anything special.

guys i have a doubt .. let say i have a E4400 cand OC to 3600 speed .. will it perform same as a E6300 that run at 3600 speed?

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Originally Posted by argonmtt

guys i have a doubt .. let say i have a E4400 cand OC to 3600 speed .. will it perform same as a E6300 that run at 3600 speed?

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If you used the same multi they will perform exactly the same

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Originally Posted by kemo6600

If you used the same multi they will perform exactly the same

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That is true except the E4300 lacks some features (I think one of them was VT)

It doesn't really matter for me because this rig has mediocre (non D9) memory which I really don't want to run past 400 FSB (DDR2 800) anyway. That is why I want a E4300 I'll build anther OC specific gaming computer later (possibly with 680i when the bugs get fixed)

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Originally Posted by Revv23

not that it matters but current 965 boards already do well over 2000, so im not sure why you think commando is anything special.

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Its not that I think Commando is great m/B but for use with a cheap E-6400
for O/C looks great.

Than say for a Q-6600 the possiabilty of running DDR2 1066 with a 1:2 divider again looks very promising for a quad core in so much as the high front side bus would be very helpful to quad cores even more so than c2d.
I am still waiting on Tony to test this board . But if it will infact run DDR2/1066 with a 1:2 divider this is a very interesting M/B.

But like I say need Tony to test this M/B . As for a M/B for the e6700/E-6800 I wouldn't get anything but a 975 chipset M/B . Bad AXE 2 looks interesting. But Asus and the other Makers haven't brought out their 3rd generation of the 975 chipset yet. So its all becoming very interesting right now with both Intel chipsets for C2D and beyond.