Hey, I was thinking one of those old antique automobiles, shame shame nn_step!! :slapass: (lol)
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Hey, I was thinking one of those old antique automobiles, shame shame nn_step!! :slapass: (lol)
There aren't many 8S Opteron system to compare first as currently, neither HP or Sun make one. There are 8S+ Xeon MP systems from IBM and Unisys. And its false that Opteron takes no hit, past 4S cache coherency traffic and the number of hops between CPUs begins to heavily impact Opteron's scalability.Quote:
Originally Posted by DilTech
any chance fugger has made enough money to build an 8x opty and an 8x xeon and put it to the test? :D
Having an insane FSB doesn't always help much. I don't see much difference from 1200mhz to 1340mhz, but upwards of 1066mhz would probably be beneficial to the newer more powerful architectures.
Is it just me...or do I see a ~$200 cpu with 4MB Cache :eek:
I understand though that it only uses FB-Dimms ? :(
Perkam
They need to get the price lower...
good jokeQuote:
Originally Posted by nn_step
What you don't like Cheaper products? :rolleyes:Quote:
Originally Posted by onewingedangel
yeah what about the 930D? I've got it speced at 201$ shipped from NeweggQuote:
Originally Posted by perkam
they're already cheaper than the comparative amd product, and by all indications higher performing. so they're already pretty good value comparatively. No real price premiums over the conroe variants.
That would be about $50k for total system ;)Quote:
Originally Posted by VulgarHandle
i know ;)Quote:
Originally Posted by Cooper
Got a link to back that claim up? All I've seen so far is a 2GHz dual Cloverton (8 cores) outperforming an 8 way 2GHz Opteron in Cinebench. Although the Opteron system did scale 1% better from 1 core to 8 than Cloverton, I wouldn't call that an "extreme performance hit".Quote:
Originally Posted by nn_step
Why? Because an 8 core Opteron system isn't far behind a 4 core Woodcrest system in Linpack FLOPs?Quote:
Originally Posted by nn_step
It's about time:up:Quote:
Originally Posted by DilTech
I know it takes somewhat of a hit, but not much. Definitely nowhere close to intels hit...Quote:
Originally Posted by accord99
Scalingwise the bandwidth bottleneck chokes xeons.
The 8S+ Xeon MP platforms also increase memory bandwidth as additional 4S nodes are added.Quote:
Originally Posted by DilTech
This Bad boy is gonna release its fury upon us on June 19th
http://www.theinquirer.net/?article=31843
Pity that the Inq writers can't even keep up with their own rumors. This article contradicts at least two other recent Inq articles. While this one says that Woodcrest's TDP is 80W another recent article claims that Woodcrest's TDP has been lowered to 65W. Where this article says that Intel has merely caught up to Opteron, another recent one says that Woodcrest will own Opteron in the 1 and 2 socket market segment.Quote:
Originally Posted by Pinnacle
BTW, since when does a northbridge take 30W? IIRC a dual socket 3G Woodcrest system draws less power than a dual 2.4G Rev. E Opteron system, even with the northbridge factored in. Rev. F might even that up a bit.
Quote:
Originally Posted by DilTech
Intel has NOT cancelled CSI.
http://www.realworldtech.com/page.cf...05-05-2006#361
BTW, the article also says that the Tukwila will also have an IMC :)Quote:
Tukwila will also feature the debut of the Common Systems Interconnect or CSI. CSI is a low latency, point to point, serial interconnect that uses differential signaling. Tukwila will integrate four full width CSI links and two half width links. Full width links operate at 6.4GT/s or 4.8GT/s in each direction, depending on the SKU. In comparison, current Itanium 2 systems have a 667MT/s bus, that is 128 bits wide for a total of 10.6GB/s of bandwidth. Unfortunately the width of the CSI data path is unknown, so bandwidth estimates are difficult. The most likely scenario is that CSI is 8 or 16 bits wide, which would yield 64 and 128GB/s respectively.
Tukwila also has an on-die CSI router, and cache coherency directories. The router will improve latency for all systems, and the directories should ensure near linear system scalability for large (> 4 socket) systems. It is almost certain that the four full width CSI links will be used for a 2D torus topology, while the half width links will connect to I/O subsystems. This architecture is rather similar to the EV7, which was the first high performance MPU to have an on-die memory controller, router, directories and interconnects. It should hardly be surprising that Intel is following in the footsteps of the EV7, considering that many former DEC architects are now at Intel.
yeah and it is Itanic based meaning, that only about 20 programs run on it :rolleyes:Quote:
Originally Posted by mjp1618
CSI maybe starts already with the Tigerton MP, the Quad-Core MP Version based on the "Core" microarchitecture concept.
With CSI and 4x3,0 GHz it could be a real competitor to K8L. :rolleyes:
mfg Simon
tigerton is the replacement to whitefield, the xeon that was tagged to have csi. Due to problems implementing csi, whitefield was scrapped, and tigerton was hobbled together in its place. Its just a dual die FSB based Xeon.
Its likely that the nehelam architecture will be the first to integrate CSI on the desktop front, and is likely a second gen 45nm part (after the shrink and cache increses to the core2 design).
Quote:
Originally Posted by nn_step
Seriously, how retarded can someone be. I guess you saw the word Montecito in the article and went OMH ITANIC IHIAIAJHHAHA! SUCK!.
The itanium is absolutely awesome at what it does, which is, not running 3dmarks, so i guess thats why you think it does nothing. But theres no contest as to whether or not it was a commercial failure.
Also, i guess when someone actually said CSI was not cancelled, and backed it up with you know, a source, you had to come up with some way to make it look bad. I look forward to the day you back up the stupidities you say with a source.
Calm down guyz
NN-Step has been here since AUG 05 and has over 7395+ posts so obviously much of it is bull. Dont worrie its normal :P
What im interested in is the IMC "Integrated Memory Controller"
If Intel can be close to Opteron with there old design and by the benchies Ive seen the new cores are faster with using FSB then imagine how fast with a IMC on it...