Any chance the AHCI verison of any of the bios's will move to the latest version?
The asrock boards get the new versions with there bios's
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Any chance the AHCI verison of any of the bios's will move to the latest version?
The asrock boards get the new versions with there bios's
I will be back in the office tomorrow and will have a listing ready of the various voltage settings.
CPU/NB voltage OPC? What is it?
Where is that M4A79 Deluxe bios? It's been in testing a long while, and it haven't been any beta release in a long long time...
Is there any afudos version which will allow me to flash back to 0905? I tried several version, but it says smth like "ERROR: Bios has no flash information available".
I'm using
where bios.rom is the filenameCode:afudos /ibios.rom /pbnc /n
PS: Tried 207, 211, 226, 229
Nice to see new options in the bios for the ch4.
Not quite what I was expecting but good stuff.
It really would be nice to see multipliers, and vid's for each power state mode.
The missing mem timings.
And working ecc for the cpu.
Cpu-nb config stuff, like unit id clumping and clock modes.
Pcie config stuffs like speed, pcie link state power management config.
And the works, ie all latencie reg's for every chip on the board.
Including 2nd'ary latencies and disgard timers, stuff like that.
And....
One more thing I can think of to top it off.
tAC and tCK timings for all 4 slots, only need 1 set of timings, rather not run my mem at diff timings when it comes to those...
I can mod the spd's, but I'de rather not these days.
Modding it with the bios, temp like for each boot, would be freaking awesome.
Would allow for a slightly lower latency and slightly higher max clocks.
Oh shoot one more duh...
The master pic controller, the 8253/4.
I would like to beable to change this timer to something like 1.5x the normal speed.
Example, "POST_67S" in award bios'es.
Sorry for spamming:
2nd section is the code I usually use, 1st was old and for some other board at the time I last messed with it.Code:;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; POST Table 67 (3rd LED - Boot Logo (Possibly Well Before 3rd LED)) [POST_24S]
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
if Board_ID = "6A61BD49" & Cleanup = 1
POST_67S: ;Test 8259 Functionality
cmp byte [bp+0x0246], 0x01
jz near Test_8259_Fun_ret
POST_67S_Continue: ;NEW
cli ;Disable Interrupts
mov ax, 0x0000 ;G_RAM, seg_0
mov ds, ax
;Backup RTC Vector, Move INT 08h vector to a temporary routine
mov dx, [0x0020] ;int08, Save Vector
mov bx, [0x0022] ;int08+0x0002
mov word [0x0020], Test_8259_Fun_Wait ;int08, Timer ISR Entry
mov [0x0022], cs ;Code Segment
;Enable just the RTC Interrupt
mov al, 0xFF ;Mask all interrupts on controller 2
out 0xA1, al ;B8259+1
dec al ;Mask all interrupts except for IRQ 0x08 (tCLK)
out 0x21, al ;A8259+1
;Set Up tCLK/tCTC0
mov al, 0x30 ;Count Generation I Think
out 0x43, al ;8254 CTL
mov ax, 0x0008
out 0x40, al ;tCLK LSB
dw 0xC48A ;tCLK MSB, mov al, ah
out 0x40, al
;Wait For Interrupt
dw 0xC033 ;xor ax, ax
mov cx, 0x7000
sti
out 0xEB, al ;Begining of Loop
out 0xEB, al
out 0xEB, al
loop $-6 ;Loop to 1st Delay
cli
;Disable Interrupts
push ax ;Save Interrupt Counts
mov al, 0xFF ;Mask All Interrupts
out 0x21, al ;A8259+1
mov al, 0x34 ;Control (tCLK), Rate Generation
out 0x43, al
; mov al, 0x74 ;Get the CMOS Value
; out 0x74, al
; in al, 0x75
; and al, 0x0F
;
; cmp al, 0x00
; je Set_tCLK_1X
; cmp al, 0x01
; je Set_tCLK_1125X
; cmp al, 0x02
; je Set_tCLK_125X
; cmp al, 0x03
; je Set_tCLK_1375X
; cmp al, 0x04
; je Set_tCLK_15X
; cmp al, 0x05
; je Set_tCLK_1625X
; cmp al, 0x06
; je Set_tCLK_175X
; cmp al, 0x07
; je Set_tCLK_1875X
; cmp al, 0x08
; je Set_tCLK_2X
; cmp al, 0x09
; je Set_tCLK_25X
; cmp al, 0x0A
; je Set_tCLK_3X
; cmp al, 0x0B
; je Set_tCLK_35X
;
; Set_tCLK_4X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x40 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_35X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x50 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
Set_tCLK_3X:
mov al, 0x00 ;LSB
out 0x40, al
mov al, 0x60 ;MSB
out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_25X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x70 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_2X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x80 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1875X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x90 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_175X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xA0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1625X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xB0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_15X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xC0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1375X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xD0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_125X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xE0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1125X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xF0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1X: ;Reset tCLK, Result is 0x36 tCLK-CTL, and 0x0000 tCLK (14 Bytes)
; mov al, 0x36 ;Square Wave
; out 0x43, al ;8254 CTL
; dw 0xC032 ;xor al, al
; out 0x40, al ;tCLK LSB
; out 0x40, al ;tCLK MSB
;
; Set_tCLK_End:
;Restore RTC Vector
mov [0x20], dx ;int08, Restore Old Vector (int 8 vector)
mov [0x22], bx ;int08+0x0002
;Check For EOI
pop ax ;Restore Interrupt Count
dw 0xC00B ;Any Interrupts?, or ax, ax
jnz Test_8259_Fun_ret_2
stc
jmp Test_8259_Fun_exit
Test_8259_Fun_ret: ;New Code, only active on a 100% cleared CMOS (Errata #1)
mov si, Msg_Errata_1
call DISP_ERR_MSG
jmp POST_67S_Continue
Test_8259_Fun_ret_2: ;Original "Test_8259_Fun_ret"
clc
Test_8259_Fun_exit:
cli
mov al, 0xB8 ;Init Controller 1
out 0x21, al ;a8259+0x0001
;Mask Channel 4 Off
mov al, 0xBF ;Mask IRQ 0x0009 (Keyboard ?)
out 0xA1, al ;b8259+0x0001
sti
ret
else if Cleanup = 1
POST_67S: ;Test 8259 Functionality
cmp byte [bp+0x0246], 0x01
jz near Test_8259_Fun_ret
POST_67S_Continue: ;NEW
cli ;Disable Interrupts
mov ax, 0x0000 ;G_RAM, seg_0
mov ds, ax
;Backup RTC Vector, Move INT 08h vector to a temporary routine
mov dx, [0x0020] ;int08, Save Vector
mov bx, [0x0022] ;int08+0x0002
mov word [0x0020], Test_8259_Fun_Wait ;int08, Timer ISR Entry
mov [0x0022], cs ;Code Segment
;Enable just the RTC Interrupt
mov al, 0xFF ;Mask all interrupts on controller 2
out 0xA1, al ;B8259+1
dec al ;Mask all interrupts except for IRQ 0x08 (tCLK)
out 0x21, al ;A8259+1
;Set Up tCLK/tCTC0
mov al, 0x30 ;Count Generation I Think
out 0x43, al ;8254 CTL
mov ax, 0x0008
out 0x40, al ;tCLK LSB
dw 0xC48A ;tCLK MSB, mov al, ah
out 0x40, al
;Wait For Interrupt
dw 0xC033 ;xor ax, ax
mov cx, 0x7000
sti
out 0xEB, al ;Begining of Loop
out 0xEB, al
out 0xEB, al
loop $-6 ;Loop to 1st Delay
cli
;Disable Interrupts
push ax ;Save Interrupt Counts
mov al, 0xFF ;Mask All Interrupts
out 0x21, al ;A8259+1
mov al, 0x34 ;Control (tCLK), Rate Generation
out 0x43, al
; mov al, 0x71 ;Get the CMOS Value
; out 0x74, al
; in al, 0x75
; and al, 0x0F
;
; cmp al, 0x00
; je Set_tCLK_1X
; cmp al, 0x01
; je Set_tCLK_1125X
; cmp al, 0x02
; je Set_tCLK_125X
; cmp al, 0x03
; je Set_tCLK_1375X
; cmp al, 0x04
; je Set_tCLK_15X
; cmp al, 0x05
; je Set_tCLK_1625X
; cmp al, 0x06
; je Set_tCLK_175X
; cmp al, 0x07
; je Set_tCLK_1875X
; cmp al, 0x08
; je Set_tCLK_2X
; cmp al, 0x09
; je Set_tCLK_25X
; cmp al, 0x0A
; je Set_tCLK_3X
; cmp al, 0x0B
; je Set_tCLK_35X
;
; Set_tCLK_4X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x40 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_35X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x50 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
;; Set_tCLK_3X:
;; mov al, 0x00 ;LSB
;; out 0x40, al
;; mov al, 0x60 ;MSB
;; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_25X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x70 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_2X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x80 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1875X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0x90 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_175X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xA0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1625X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xB0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_15X:
mov al, 0x00 ;LSB
out 0x40, al
mov al, 0xC0 ;MSB
out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1375X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xD0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_125X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xE0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1125X:
; mov al, 0x00 ;LSB
; out 0x40, al
; mov al, 0xF0 ;MSB
; out 0x40, al
; jmp Set_tCLK_End
;
; Set_tCLK_1X: ;Reset tCLK, Result is 0x36 tCLK-CTL, and 0x0000 tCLK (14 Bytes)
; mov al, 0x36 ;Square Wave
; out 0x43, al ;8254 CTL
; dw 0xC032 ;xor al, al
; out 0x40, al ;tCLK LSB
; out 0x40, al ;tCLK MSB
;
; Set_tCLK_End:
;Restore RTC Vector
mov [0x20], dx ;int08, Restore Old Vector (int 8 vector)
mov [0x22], bx ;int08+0x0002
;Check For EOI
pop ax ;Restore Interrupt Count
dw 0xC00B ;Any Interrupts?, or ax, ax
jnz Test_8259_Fun_ret_2
stc
jmp Test_8259_Fun_exit
Test_8259_Fun_ret: ;New Code, only active on a 100% cleared CMOS (Errata #1)
mov si, Msg_Errata_1
call DISP_ERR_MSG
jmp POST_67S_Continue
Test_8259_Fun_ret_2: ;Original "Test_8259_Fun_ret"
clc
Test_8259_Fun_exit:
cli
mov al, 0xB8 ;Init Controller 1
out 0x21, al ;a8259+0x0001
;Mask Channel 4 Off
mov al, 0xBF ;Mask IRQ 0x0009 (Keyboard ?)
out 0xA1, al ;b8259+0x0001
sti
ret
end if
The function "Set_tCLK_15X" (1.5x), is about what I want it at...
This would speed up booting ALOT...
And making things a tiny tiny bit more snappier overall.
Should be adjustable though, because it causes some peep's probs with the drives.
The prob, drives use this timer to setup there internal timings of there own.
If it's to fast, the drive can't work.
So it should be adjustable in steps, default 1x or 0x0000/0000h.
That's pretty much what I want...
But I doubt anyone cares lol... ^^
I guess it doesn't hurt to put my req out there once though...
I'll try the new bios "if" my setup is stable after I get my mem back from rma...
Should be anyday :\.
Edit:
Maybe I shouldn't be posting code like that..., ohwell.
Actually it's OCP. I assumed it meant "OverClock Protection" so I turned it off for the CPU. (see Below)
I flashed 1304 and I believe I experienced throttling for the first time. All temps were in acceptable ranges according to HWMonitor....
I was pushing for a CB11.5 run with a score of 7.90. I raised the HTRef 1 Mhz and all of a sudden my score dropped to ~ 5.56. :(
CPU-Z and TurboV still showed my core clock unchanged (~4.5Ghz), but something definetly happened that I haven't experienced before.
Nothing I did would get it back in-line short of rebooting. And this was done with OCP disabled...
Bingo13: Any info on the new Bios settings?
I appreciate the steppings for LLC, but they don't seem to function the way one would expect them too... :shrug:
For instance, setting LLC to 50% actually results in Vdroop of ~.022v when the core is loaded.
I was expecting it to add to core voltage under load (less than 100% LLC of course), but not to lower Vcore!
FWIW, I've gotten the best results with these (Extreme Engine) settings using 1304:
http://i30.photobucket.com/albums/c3...t/DSCN0548.jpg
thx Dave for the info!
Over Current protection ? darn can't test the bios, board is somewhere else at the moment For your LLC findings Dave, seems Asus added the same LLC values as with Sandy Bridge. 50% Calib means you still get Vdroop, 100% should try to keep it stable as the bios setting...
@bingo13
you said some month ago, that there won't be such a big improvement regarding voltage stability for the 790FX boards (unlike the changes for 8XX boards).
So why does it take more than a half year to release a new bios for the M4A79 Deluxe? :shrug:
Sure, and already was over a half year ago.Quote:
Because the 8 series boards and intel boards are more important right now
At least bingo13 should have said "sorry, but we don't support mainboards that are older than 1-1,5 years" instead of saying again and again that there will be something "very soon".
ASUS = pay more - get less ? :confused:
July 2007, I made a decision to go with AM2 vs LGA775 and conroe, I had $1,700 to spend on a rig and conroe was just slapping Windsor and Brisbane all over the place. The only thing that helped me with my decision was that AM2+ stars cores and potentially AM3 Deneb cores would work in my board. I sort of made a mistake because one year after I was promised support, Foxconn dropped BIOS support for this board mid-2008 without any warning at all.
Actually they just seem to be slow. Even the M2N32 SLI (5 years old) board supports X4's up to the 970.
Ok lets wait another 4 and a half year for a new bios :D
(And while waiting I'll get another non ASUS board for sure ;) )
And before ASUS starts to support their cheapest and oldest OEM boards (even the M2NPV-VM got a beta bios for AM3 CPUs) they should care a little more about the "premium" products.
diddi35 belive me i doesn't worth to wait for the BIOS on your board ,maybe eventually they will release a bios that will support the AM3 CPU but like on my board it will be very very buggy.( 1090T ones )
Turbo Core technology not working like it should / no option to disable it like on other AM3 board series, so if u want your board to support a CPU that works like haveing Cool'n'Quiet and C1e and Turbo core all in same time for all cores not only for the 3 of them and u cant disable or enable CnQ or C1e cose it seems they are locked.
Better wait for a AM3+ board and with that u will be abble to use a AM3 CPU and a AM3+ CPU.
Dont know how others are but Asus it's very slow in posting updates for it's motherboards and if they are older motherboards thats even worse.
I have a M3A79-T Deluxe board and it works great with older CPU like 940 / 945 / 955 / 965 but it can't do the same with new CPU , with those are very very bugy.So now i keep the 1090T for safe keeping untill i can get a AM3+ board and i'm sorry to say this but it wont be Asus board.
I don't see why you guys complain so much about asus in general.
Alot of there older boards at least support the newer cpu's in one way or another, better then a no post.
This thread exist, at least they attempt to listen to the users and provide us with the betas.
And besides, if you got such and old setup, and the cpu don't work, then buy a new board and some mem to go with it for your new cpu.
Good boards are not cheap these days though.
But that's just the way things are.
I'm poor as hell but I got myself a new setup to replace the old dfi I had, because it didn't support the 1090t that I needed for gaming and emulation.
If it's an am2...
There is probably not a single award bios baised board out there that even remotely supports it so count yourself lucky it even boots with an older ami bios ^^.
@NEOAethyr
So you mean that the M4A79 Deluxe for example (the AM2+ version of the M4A79T Deluxe) is already old? :rolleyes:
And that board wasn't a cheap board. Why should I bother to buy an ASUS board as my next board if I know that the bios support for it might end one and a half year after its release?