Conroe 2.4Ghz on 965G mobo, brief test...

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04-10-2006, 09:20 AM
White Wizard

Guys,
There's no bias here. Th e Intel optimized binary ran faster upon Opteorn as well. We, Alex and I, are looking for someone with a 64-bit Installation of Windows upon which we can test more accurately the true performance comparisons between Conroe and Opteron. These 32-bit binaries use x87 code which is legacy and not utilized in 64-bit. In 64-bit only SIMD arithmetic is utilized to perform FP operations. Moreoever, when SIMD is used we can build with the Intel compiler to enable vectorization and attempt to quantify how much faster Conroe is when those 128-bit engines in it's "Media Boost" unit are utilized. Opteron, P4 and pentium M have only 64-bit engines. Just look at the BLAS benchmark score.. there you see the beginnings of those 128-bit MEDIA processing units paying off.

So.. any takers.. does someone have Windows 64-bit installed upon a Laptop. Alex and I can then continue our exploration of Conroe performance..
04-10-2006, 09:57 AM
agenda2005

Tim,
The version 9 of the intel compiler also allow optimization for AMD 64 as well. I'm not sure if their's new version of the compiler that have compilation flags for Macro op fusion that allows an extra instruction issue.

The 128-bit SSE on Conroe will obviously benefit more than AMD 64 because two 64-bit SSE(x) intructions will now require one cycle unlike two in Presscott and Athlon 64. This is nobody's fault since Intel have concentrated more effort on making better CPU than crippling competitors performance on their compiler.

You guys should be able to get a Conroe sample from Intel if you ask. Just write a request and give your website link as well as other link to websites using your benchmark.

In the meantime, You can make an SSE/SSE2/SSE3 compiled binary for Victor to install Windows Server 2003 to test the power of Conroe. It will sure be interesting to see how that bad boy will do.

Conroe/Woodcrest will surely be the new king for Molecular Dynamic Simulation developers. This will also reflect well on their SPEC results.
04-10-2006, 10:45 AM
Donnie27

Quote:

Originally Posted by agenda2005

Tim,
The version 9 of the intel compiler also allow optimization for AMD 64 as well. I'm not sure if their's new version of the compiler that have compilation flags for Macro op fusion that allows an extra instruction issue.

The 128-bit SSE on Conroe will obviously benefit more than AMD 64 because two 64-bit SSE(x) intructions will now require one cycle unlike two in Presscott and Athlon 64. This is nobody's fault since Intel have concentrated more effort on making better CPU than crippling competitors performance on their compiler.

You guys should be able to get a Conroe sample from Intel if you ask. Just write a request and give your website link as well as other link to websites using your benchmark.

In the meantime, You can make an SSE/SSE2/SSE3 compiled binary for Victor to install Windows Server 2003 to test the power of Conroe. It will sure be interesting to see how that bad boy will do.

Conroe/Woodcrest will surely be the new king for Molecular Dynamic Simulation developers. This will also reflect well on their SPEC results.

Some of the folks here didn't read the link. It showed how Conroe processes 128Bit SIMDs in ONE CYCLE, not two as P4 and A64 does.
04-10-2006, 11:38 AM
uOpt
Quote:

Originally Posted by agenda2005

The 128-bit SSE on Conroe will obviously benefit more than AMD 64 because two 64-bit SSE(x) intructions will now require one cycle unlike two in Presscott and Athlon 64. This is nobody's fault since Intel have concentrated more effort on making better CPU than crippling competitors performance on their compiler.

Just for clarifications: SSE3 always has 128 bit instructions. On earlier platforms they might need more cycles to execute but the 128 bit instructions as such are present in any processor supporting SSE3.

I don't think it is quite correct to say that two 64 bit SSE operations will now require half the time. This is only the case when ...
- ... there are indeed independent units to compute. Doing two instructions at the same time requires that non depends on the outcome of the other. That is frequently not the case
- .... and unless it is hand-coded assembly the compiler has to be sure about the previous fact. It can be nontrivial for the compiler to figure this out in a bulletproof way. If the compiler is not entirely sure it will default to be conservative
- ... to be most effective the compiler has to be able to do out-of-order processing to scrap two 64 bit operations into one 128 bit one even if they are at different places in the source code. Prooving that this is safe is nontrivial, too, in particular in languages like C/C++ where there is a lot of aliasing going on
04-10-2006, 04:05 PM
agenda2005
Quote:

Originally Posted by uOpt

Just for clarifications: SSE3 always has 128 bit instructions. On earlier platforms they might need more cycles to execute but the 128 bit instructions as such are present in any processor supporting SSE3.

I don't think it is quite correct to say that two 64 bit SSE operations will now require half the time. This is only the case when ...
- Agreed, but that is usually the case for highly vecorized codes like MolDyn, BLAS and LINPACK. Two 64-bit SSE and SSE2 instructions can be fetch and decode in one cycle instead of one( As in A64 and Prescott) and the code scale according to the degree of vectorization.
  
  Quote:
  
  Originally Posted by uOpt
- ... there are indeed independent units to compute. Doing two instructions at the same time requires that non depends on the outcome of the other. That is frequently not the case

That is where macro-op fusion comes into play. You can fuse two instructions together(for exapme, "compare" ) and perform the operation in one cycle.
This will infact cut down branch mis-predictions that have plague prescott for a long time.

Quote:

Originally Posted by uOpt

[*] .... and unless it is hand-coded assembly the compiler has to be sure about the previous fact. It can be nontrivial for the compiler to figure this out in a bulletproof way. If the compiler is not entirely sure it will default to be conservative[/list]

You can perform a Profile Guided Optimazation and let the compiler know the code structre a priori and then recompile for optimizations.

Quote:

Originally Posted by agenda2005

You guys should be able to get a Conroe sample from Intel if you ask. Just write a request and give your website link as well as other link to websites using your benchmark.

I believe Intel would rather not send free samples to AMD or any of its personnel.

how about some 64bit benchmarks???

hiho everybody ;)

well, I've done some google-search and found this about the Albatron PX975X. sadly :(

Quote:

The board which fascinated me most at Albatron was the PX975X. It has a lot of unique features that make the board very interesting for overclockers. It will also be a limited edition only. Look at all those features - 7-phase power, 10 SATA ports!.

http://www.techpowerup.com/reviews/Cebit2006/Day3

but hey, there are another Mobos up to come from Albatron which have the digital clock generator and the metal mosfets as well ^^
gimme more power :D harhar

That Albatron PX975X looks like a beast!

Yes. I would like to see some 64bit benchmarks if possible.
BTW, VW thank you for all your excellent work and keeping us informed.
You are a swell guy and made a name for yourself in the net.
Congrat.:toast:

http://sharikou.blogspot.com/

came across this blog stating about how a a64 could easily beat conroe...
is there any truth to it???

^^ OMG,he is very anti-intel.
Does he realise,most of the apps used by a average man (Not uber geeks or enthusisats,where the bulk of consumers is) can fit in the 4mb cache?

Quote:

Originally Posted by incurable

I believe Intel would rather not send free samples to AMD or any of its personnel.

There might be some elements of 'truth' in that. I remember when the ScienceMark writers were alleged to have written the program to show the power of Athlon back in the days of AXP and Northwoord. They seems to have changed now, but that allegation might still hurt them.

Quote:

Originally Posted by StyM

http://sharikou.blogspot.com/

came across this blog stating about how a a64 could easily beat conroe...
is there any truth to it???

That looks like a speculation at the moment.

When Conroe is compiled with SSE/SSE2/SSE3/SSE4 optimizations, then we shall know the real truth.

The guy have no clue that the ScienceMark benchmark was running on plane Jane x87 which does no good to current days CPUs.

SPEC score will clear up those gray areas. There are more than 20 benchmark suit in SPEC and each of them uses > 100MB of memory.

Quote:

Originally Posted by StyM

http://sharikou.blogspot.com/

came across this blog stating about how a a64 could easily beat conroe...
is there any truth to it???

Read the rest of his "articles" and find out for yourself. I think Intel killed his baby or something.

I agree. Seems like he has a grudge to settle with Intel.
At the same time, his being Pro-AMD clearly shows in his other articles.

If he doesn't/could not provide any real benchmarks of the two systems head for head.. then we all shouldn't take his "theoretical" calculations as being factual in any sense possible.

Quote:

Originally Posted by agenda2005

There are some element of 'truth' in that. I remember when the ScienceMark writers were alleged to have written the program to show the power of Athlon back in the days of AXP and Northwoord. They seems to have changed now, but that allegation might still hurt them.

The truth is that Tim Wilkens, the guy who programmed the apps this benchmark is based on (for his PhD research, IIRC), scored a job w/ AMD after getting his degree.

Now don't get me wrong, I'm not saying that Tim (I don't even know if he's still actively involved in the project.) or Alex or the others who are part of ScienceMark group are writing their software in a way to show one competitor scoring higher than the other. But instead of sending the ScienceMark guys pre-release hardware, Intel could just mail it to Hector himself. ;)

Quote:

Originally Posted by StyM

http://sharikou.blogspot.com/

came across this blog stating about how a a64 could easily beat conroe...
is there any truth to it???

"the 4MB cache is definitely eating a lot of die area and Intel's limited capacity."

I've not been keeping up on AMD's Fabs, but 55% market share? AMD couldn't actually produce that many chips, they are already struggling.
Intel has vastly greater capacity, not to mention the Conroes die, even with its 4MB L2 cache is probably smaller than the Athlon X2's thanks to the 65nm process its built on.

"AMD should work with benchmark creators to ensure that application benchmarks have a working set larger than the cache size of Conroe -- 4MB."

So he ridicules the production of an Intel optimised binary which sees performance improvements on both platforms produced without Intels direct help, and then suggests AMD work with people to produce beneficial benchmarks?
Whats more the 4MB L2 cache isn't JUST going to be used for the benchmark, ok a significant portion maybe but common OS functions and other processes will also be competing for cache space.
The fact of the matter is Intel invests a lot of resources in compiler technology and at the same time does so without intentionally harming its competitors performance, an Intel compiled binary has been shown time and time again to show performance benefits its own and its competitors platforms. Intel also produces tools such as VTune to help developers optimise there applications by analysing the program as it runs.
How much resources does AMD commit to compilers?
http://developer.amd.com/devtools.aspx#Compilers
Considering they produce nothing and MS Visual Studio is included on that list, which generally gives lower performance on AMD platforms than Intels own compilers my guess would be not a great deal.

Whats more, Intel provides free evaluation and non-Commercial Usage version of there compilers for anyone to try.

Finally he bangs on about 64-bit and how it improves performance, and how obviously that makes the Athlon 64 better, but doesn't look to see how existing Intel chips such as the 950 benefit, let alone even mention that Conroe, Merom, Woodcrest all support this anyway.

I'm sorry but this is someone who clearly just has a chip on there shoulder.

Quote:

Originally Posted by StyM

[URL="http://sharikou.blogspot.com/"]came across this blog stating about how a a64 could easily beat conroe...
is there any truth to it???

Any? Sure! You can probably construct scenarios in which K8 will beat Conroe at the same clock, however, that's almost always possible.

What you really should be looking for, however, is the performance of either w/ the software YOU use and care about.

Quote:

How much does AMD pay you to come up with the garbage you do????

just love this comment on his blog..
seems like he's a die hard amd fan..

:eek: This blog is like a trip down memory lane, it reminds me of the old days with Van Smith heading his own little holy war and giving Mario Rodrigues space for his Intel-hating drivel. :eek:

I wonder if it's him (Mr Rodrigues) again, it would certainly fit the profile on the site and the writing. :confused:

Poor fanboy if you ask me, he has a s754 2800+ :stick:

Hey guys, he's a "PhD"... he can't be wrong... :ROTF:

Jokes aside, like somebody said: smells like a fanboy to me. A hardcore one too.

The blog has somewhat of a valid point.

Since "Core" still doesn't have an integrated memory controller, AMD64 will do better once you trash the CPU cache.

In practice I highly doubt that many applications trash a 4 MB cache.

I know that almost all the stuff in my benchmark suite lives fine in 512 KB, only some thing really benefitting from 1024 KB.

Is that conroe 2.4ghz dual core ?
Thanks

superb!!!

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