Ok you want info heres info. From my gathered results this is what i have come up with.
*EDIT* wanted to add that in my search I found that bottom line and top line chips fared best. Mid line chips did OK but not spectacular.
LDBHE = cold bug free
N on wafer= Low voltage higher clocks/lower temps to a certain point/possible death clocked high w/high volts (24/7 use) high volts = 1.6-1.65
T on wafer= High voltage higher clocks/higher temps/possible death clocked high w/low volts (24/7 use). low volts = 1.4-1.45
Week
Ive found the first weeks to be best
for instance 0501, 0601, and so on. 0551 works also but it appears that the actual first week is the creme of the crop.
Highest OC steppings are higher last 4 2nd line.
RPMW low
SPMW moderate
TPMW medium
UPMW normal
VPMW high
XPMW Highest
Batch # in the 0030 and lower would be better yields but not necessarily in the sense of HIGH OC, the difference can also be a stronger mem controller or higher over all HTT.
Once again this is all in theory and FYI has been compiled with over 1000 cpu results from users here.
Now with all this compiled I went on a stepping hunt. I ended up with this stepping based on the equipment i have in my possesion.
E4 revision X2 3800
LDBHE 0601 XPMW
batch # 60017
T chip
and the results are here.....This isn't maxxed yet either as it was more of a test run for my DI tube and manta versus anything else.
http://valid.x86-secret.com/show_oc.php?id=79315