Printable View
Probably late 2007/early 2008. Devs have known for quite a while quad core and up is coming, I'd be shocked if they haven't planned ahead to start making use of it by now for games scheduled to come out around that time period.Quote:
Originally Posted by punisher69
Quote:
Originally Posted by punisher69
I think it will take some time perhaps 1 year or more, so for the time being Quad core is for thoose that wanna run WCG , multimedia work,sound proccessing work, etc , database ,server use or extreme multitasking(Whatever that means;)
To say its simple
If you dont know if you need it your probably dont
16% increase in cpu speed should not make that big of a differance, unless they had a crappy cpu and had to up the voltage. if my venice was on stock volts at 2.7ghz (stock speed 2400) i doubt i'd have that much more power consumption than it did when it was stock, for example, how can they put a certain power rating(i.e. 89w) for cpus ranging from 1.8 ghz to 2.4 ghz, which mind you is much more than 16 percent clock increase.
Because,Quote:
Originally Posted by i found nemo
they design, test and measure the 2.4Ghz model to produce in work case scenario (with poorly calibrated motherboard giving +5% voltage, and bad operating conditions, and sequence of instructions rarely/never encountered).
then, simple assign all models with slower clockspeed to this same category. simplifies system design.
Is there? There sure is the shady 4th box in the CAD'ed pics AMD has released on K8L...Quote:
Originally Posted by Serge84
But the shady box isn't necessarily a marker of a 4th decoder. It is just a instruction ROM (memory) after all. Not a decoder.Where does it say that's an Rev.G? Certain interviews claim this blue die is a nonproduction prototype. :confused:Quote:
Originally Posted by Serge84
Die shots? Where?Quote:
Originally Posted by Serge84
You mean those drawn CAD core layout schemes?
Doubled FPU doesn't mean doubled performance. Doubling things don't always translate to 100% performance increase.Quote:
2nd FPU giving it 2x the FPU performance
More ALUs?Quote:
and more ALU's giving it about 25% to 40% performance.
According to AMDs slides (1, 2) there's an identical amount of ALUs/core on K8L as on K8.
3 to be exact.
There goes that 25-40%...
K8L L1 cache has dual 128bit entries. Not 256bit.Quote:
Its more then just that, it will use dual 128-bit processes and wide pipes. The Cache is 256-bit. All this simply allows conroe like processes.
As per to Phil Hester's slides, K8L L2 cache is identical to K8 with a width of 128bit.
The L1 on C2D on the other hand iss 128bit wide for instructions and 256bit wide for data. And it also has a real 256bit wide L2.C2D has 3 SSE units of which 2 are symmetrical.Quote:
It will perform 2 128-bit instructions in one cycle so it will match conroe right there not including the other parts.
Thus C2D does 3 128bit SSEs ...
I find the huge 32byte instruction fetch and OoO more interesting on K8L...
thanks for debunking someone's irrational hype, largon,
I'm also excited about the larged instruction fetch, as well as more flexibility with loads and stores.
To those like Serge84, who like to focus on the width/number of execution units.
I can personally design for you a processor with not jut 3 ALU, but 300 ALU. Even if running at 3Ghz, it will have the incredible awe inspiring performance of a 486. There's a lot more to CPU's than just the execution units!
Nice find! Lots of info on there :D .
You are simply wrong in most things. But I did say this was hypothetical. You didn't see my evidence slides proveing you wrong. I aready have backed up my clames in past posts so I don't need to say the same thing twice. You debunked nothing. I will not repeate myself any longer.Quote:
Originally Posted by largon
We will see whos wrong and whos right when it comes out. Besides I dou't you can read phyisical blueprints of arcs with just looking at the parts in a microscope like some of is can. Prob fanboy just afrade of K8L's power. You can't deny anything if you can't understand it.
Some people just think 90nm is 90nm, some people think 65nm is just 65nm. Well the new AMD 90nm FX's will have Germinanium and SOI-3 as a example. This is better then COMS 65nm intel, I can't beleave they just use Cu and COMS 65nm thats real ceap intel. And the AMD 65nm vers just blows their processes away useing like 6 processes in all. None are the same, the processes make them way more capable. Its fasinating.
Serge84,
what specifically that largon stated do you say is false.. everything?
Re:65nm etc
I certainly hope everyone here realizes that different FAB companies have different technologies, and thus transistors and chips will behave differently. You are quite right that AMD has invested a lot of research and development into enhancing existing processes. However, you must also admit that Intel was very smart to quickly switch to 300mm wafers and 65nm, since both dramatically reduce manufacturing cost per chip, and allow many more chips to be made.
Its not just who can produce the better technology.. they're publically traded companies competeing in a market.. its whoever can secure larger marketshare, and larger profit margins.
I'm itching to hear more about this.Quote:
Originally Posted by Serge84
Err...Quote:
Prob fanboy just afrade of K8L's power. You can't deny anything if you can't understand it.
I just corrected your fictional numbers.
No need to flame.
[Refering to the poster before the last poster] Okay, there's not much helpful with 90nm to 65nm in terms of performance. It just makes it a hell lot cheaper per cheaper, mainly. So AMDs 90nm really doesn't pwn 65nm at all...
lets see, similiar power usageQuote:
Originally Posted by brentpresley
plus superior Integer/Clock performance (floating point is a different matter)
obviously it worked very well , because it competed with intel's 65nm before the conroe , both on performance and heat , and i'm not sure that intel has amd beat on heat nowQuote:
You HONESTLY THINK that AMDs 90nm SOI doped w/ Ge is in the same LEAGUE as Intel's 65nm process technology? If that is the case, then WHY would AMD even bother switching to a 65nm process if they are already better than the competition?
i guess amd must be a special company to be able to work with siGe
please dont confuse design with production technology!Quote:
Originally Posted by The Ghost
i'm notQuote:
please dont confuse design with production technology!
and that would be about the same amount that you knowQuote:
Ghost, it is PAINFULLY apparent you have ZERO knowledge of process technology.
if you think so , that is why intel tried to go to ibm when it had the problem with the prescott , the problem was that intel did not like what the payment wa going to be , the payment was that ibm would have a license to every patent in the prescottQuote:
In terms of process technology, no one even comes close to Intel right now.
you might have convinced people that you know what you are talking about , but you messed up on this statement , while ibm has a large presense here in my home state also , remember i just live down the road from you , ibm's residence is actually in NYQuote:
EDIT - and FOR THE RECORD - IT IS IBM (HERE IN GOOD OLE NORTH CAROLINA) THAT IS BLAZING THE TRAIL WITH GERMANIUM PROCESS TECHNOLOGY, NOT AMD (THEY SIMPLY LICENSE IT FROM IBM).
the work that ibm does with soi and siGe is also done in NY
Corporate offices
International Business Machines Corporation
New Orchard Road
Armonk, New York 10504
914-499-1900
Mailing address
IBM Corporation
1133 Westchester Avenue
White Plains, New York 10604
United States
by the way , amd and ibm have a cross license deal , just like ibm had with motorola
so what makes you think that amd has to pay for using ibm's siGe patents ?
IBM has the world's largest IT research organization, with more than 3,000 scientists and engineers working at eight labs in six countries. (5/05)
· With 3,248, IBM earned more U.S. patents than any other company for the twelfth consecutive year in 2004. Over the past four years IBM inventors received more than 13,000 patents -- approximately 5,400 more than any other patent recipient. (5/05)
· Software accounted for more than 40 percent of the 3,415 U.S. patents awarded to IBM in 2003. IBM received nearly three times as many patents as Microsoft, and twice the combined total awarded to its four closest software industry competitors. (2/04)
the story is a old story and is hard to find links on it , but it was a true storyQuote:
Care to back the up w/ some FACTS?
is that why the P4 was hot too ?Quote:
The reason Prescott was SO HOT was not that IBM had better process technology than Intel, it is that the pipeline was SO BLOODY LONG that they had to ramp up the core speed above what 90nm process tech could reasonable do without LARGE current leakage. This was simply a design FLAW on Intel's part (31 stage pipe vs 18 for Willamette).
it is not the long pipelines that made the prescott to hot
the P4 northwood was 20 stages , and yes the prescott was 11 more stages
the reason why apple dropped ibm , was because ibm would not make enough cpu's for them , apple wanted a bigger supplyQuote:
IBM was having the SAME problems with their 90nm tech. I had a friend who worked on the design for the PowerPC G5 core and he said that this was the underlying reason why Apple dropped Motorola/IBM and went to Intel. IBM simply could not scale up the GHz with their 90nm technology. The chip got WAY too hot.
remember it was ibm who was responsible for amd opteron getting fixed , that is how ibm ended up with amd's hypertranport
that is pure bull , have you even been in any of the buildings that ibm has in the rtp ? by the way , what do you think that rtp stands for , i thought that it was funny how you had to use the intials after you used the full nameQuote:
Not NEARLY as much work as is done in the RESEARCH Triangle Park Facility in RTP, NC.
ibm has about 20 sites in RTP not just the one , i have been around to a few of them
as far as their siGe work , none of it is done there
i use to get tractor trailer loads of computer from with in the triangle when the companies was upgrading , i built them up for kids for free in my count on the coast , back then they was paying companies to haul them off , it is not that way now , but i made a lot of kids happy
who said it was free ?? when ibm and motorola was together , do you think that mororola charged ibm for it's patents , or apple ? how do you think that apple had hypertransport in their systems before they went to intel ? how do you think that ibm has hypertransport on thier cpu's ??Quote:
Because I know a few of the patent lawyers HERE at IBM. IBM gave NONE of that away. Companies have to PAY to license technology (whether in terms of cash, or returned licenses - none of it is free).
the companies are doing their R&D together is why they are sharing patents
you do know that ibm does not even have a fab in NC ?
well i think that there is a lot more to the story then that , like apple wanting the cpu's cheaper , and ibm was working closer with MS and the xbox , which was designed right there is raleighQuote:
IBM couldn't make enough CPUs because they couldn't get good yields at the speeds Apple needed. It was NOT a matter of Fab capacity (Apple has NEVER sold that many computers).
you are a funny little boy , the question was why you had to use research triangle park and RTP like they was two different placesQuote:
YES, I have in fact. And the PO for RTP accepts mail labeled as BOTH RTP and Research Triangle Park. I think it is so funny when you resort to being a jack a $ $ when you have no facts to backup anything you spout (and that is ALL you do - spout anti-Intel propaganda all day long)?
and where am i spouting anti intel propaganda ? i think that intel does a good enough job of that them selves
and just how do you think that it is free ?? , i never said free to these companies , they have to have something to trade , plus they are doing thier R&D together , in NY in the catskillsQuote:
You DID with this statement (2 posts up):
no they are notQuote:
YES boy genius, I know this quite well. But they ARE working on SiGe technology here. You don't need a fab to work on the materials.
same to you , we will wait for you to prove that siGe is being tested in a non fab enviroment , never mind even being tested in NCQuote:
I'm done w/ your BS until you link some FACTS to backup the crap you spew out here.
TheGhost, BrentPResley, please settle down.
both of you are right somewhat regarding prescott vs athlon64, and Intel's 90/65nm vs AMD/IBM 90nm.
Die shrinks used to have a set forumal of constant scaling for various parameters. However, at 130nm, 90nm, and going even further down to 45nm, scaling down becomes difficult. What's 2/3 of 10 atoms. 6 atoms or 7 atoms. Whats 2/3 or 2 atoms, 1 atom or 2 atoms... I hope you get the picture. Strange quantum mechanics type things start happening that are totally unexpected. So, whereas in the past it was certain each successive die shrink would increase transistor density by about 30% and increase transistor switching speed by about 30%, that is by far no longer the case. Old rules out the window.
I believe Intel's prescott suffered from both manufacturing and design problems. Inherently adding extra (non execution stages) with lots of dynamic control logic made the design not just less efficient in IPC terms, but also as well in terms of power/heat.
At the time, Intel was agressively upgrading to 300mm wafers, and 90nm. Until stepping D or there about, many months later, Prescott was very hot. Its somewhat understandable. Intel needed time to master and fine tune the production process. I think from the beginning, Intel engineers under-estimated the special requirements for deep sub micron short channel effects, in particular the leakage through gate oxide causing dramatic escalation in unwanted static power. Intel again had these problems with 65nm. It seemed with each die shrink they were taking two steps back, and then through several new stepping and many months, taking three steps forwards.
Thus, if hypothetically you could make a prescott die using AMD/IBM 90nm, and compare/contrast to Intel's 90nm, you perhaps might have improvements, but not quite the power efficiency of Athlon64, and especially not Core 2 Duo.
In conclusion, a few more words about 65nm and beyond. I imagine Intel engineers spent many difficult rigorous years perfecting and tuning the design of Core 2 Duo. And then, on top of that, many more months and years researching, developing and fine tuning the manufacturing process. The culmination of all their pain staking work is remarkable but by far it was not easy. Its very important to take note that there are well over 40 adjustable transistor parameters, and dozens of strange effects that become prevalent as you shrink more (90nm->65nm etc..)which until recently were neglected, and with which scientists and engineers have little experience with.
If I could provide a rough analogy from traditional lithography scaling (180nm, 130nm) to now (65nm, 45nm) it would be the difference between car assembly used for old Ford model T vs 2007 Ford GT. On the outside it seems they are both just cars, made on assembly lines. But, there are thousands of differences. Not just how fast things are done, or even the design, but a completely different approach to manufacturing.
I dug up first sighting of 65nm P4 for you:
http://www.tomshardware.com/2005/10/...tel/page3.html
seems Intel did remarkably well at 65nm, all things considering. (Load power consumption for SYSTEM dropped from 200W to 186W, compared with P4 Prescott L2=2MB)
You're right, AMD's 90nm isn't in the same league as Intel's 65nm process technology... it's better. That's why AMD can make a dual-core desktop with a maximum tdp of 35w of a old architecture in 90nm, and intel can only deliver a desktop dual-core with typical tdp of 65w of a new architecture in 65nm.Quote:
Originally Posted by brentpresley
K8L in 90nm would still kick the crap out of conroe in 65nm, period.
This question it's so ignorant at so many levels.Quote:
Originally Posted by brentpresley
As i pointed out, you don't have a clue of what you're talking about, like alwaysQuote:
Originally Posted by brentpresley
So intel 65nm it's best because it was the first? Wow really technical.Quote:
Originally Posted by brentpresley
And sorry no Intel don't have 2 fabs in 45nm right now. They have only one and there's no way you would know what stage they are.
really?
but i use my comp mostly for games , so unless k8l is like cheap and stuff. i prolly wont get it ...
G80 7950GX2 equivelant or RD600 is where i will burn my moeny.
so how will this compare to kentsfield?? is there a difference between packaging 2 dual core quad core cpu and a native quad core cpu??? can someone explain?? kentsfield is too expansive anyway, $1000 + for X6700 2.66GHz and prolly $600 for Q6600 2.4GHz
well is it cheap?? like below $500USD maybe $400?? heh
i thought that intel did good when it went to the pressler , the thing with the pressler was that intel never would raise the mhz over 4ghz with itQuote:
Originally Posted by ***Deimos***
i think that intel would have done better taking the P4 northwood and just shrunk the die , intel didn't have to worry about 64 bit for a while , and a shrunk northwood would have lasted intel until the conroe came out , intel in my opinion would have been a lot better off
by the way , i'm always settled down , and don't get excited
i know exactly what you are saying , they are going to hit a wall directly , and will have to find another way around it for performance that they think that they needQuote:
Die shrinks used to have a set forumal of constant scaling for various parameters. However, at 130nm, 90nm, and going even further down to 45nm, scaling down becomes difficult. What's 2/3 of 10 atoms. 6 atoms or 7 atoms. Whats 2/3 or 2 atoms, 1 atom or 2 atoms... I hope you get the picture. Strange quantum mechanics type things start happening that are totally unexpected.
they are moving so fast with die shrinks that neither of them are going to make a whole lot of money , especially the price that they are selling for , the smaller the die , the less your percentage of good dies , i know that while the atoms get fewer and thinner you are going to have more leakage , and that you can just go down but so far with voltage because you need to have a certain voltage for the minimum bandgap , which i think what they are using is 1.1 volts for silicon
i would say that amd is having the same problem , but i also believe that ibm has been great help to amd to solve these problems , this also helps ibm out also , if it wasn't for ibm , i do not think that there would have been a opteron that is as good as it is , both companies now work closely with their R&D departments , one reason why i believe that amd is going to build a fab in NYQuote:
In conclusion, a few more words about 65nm and beyond. I imagine Intel engineers spent many difficult rigorous years perfecting and tuning the design of Core 2 Duo. And then, on top of that, many more months and years researching, developing and fine tuning the manufacturing process. The culmination of all their pain staking work is remarkable but by far it was not easy. Its very important to take note that there are well over 40 adjustable transistor parameters, and dozens of strange effects that become prevalent as you shrink more (90nm->65nm etc..)which until recently were neglected, and with which scientists and engineers have little experience with.
but it seems that sometimes some people try to enjoy them selves at the expense of others in a amd thread to try and show why intel is so much better , this the reason why i do not post in intel threads unless i am asking a question here
i enjoy a good conversation , especially on the abilities of amd and what they are trying to do :)
AMD is switching thier value chips to 65nm process.. I believe those chips will not be SiGe. Only the FX chips on 90nm process will be SiGe. Just an assumption, But I think this is what AMD is going to do.. In this case it would make sense.
~Mike
Quote:
Originally Posted by brentpresley
Wha?
and amd's 45nm test was done 3 months after intels was done , but there is a difference doing it on sd ram and doing it in a cpu that will work