ok Dis 640 fsb as promisedQuote:
Originally Posted by disruptfam
I cannot claim credit for this work, this is interely from DFI!
If anyone needs this bios/abs profile please e-mail me at gilgamesh@gilgamesh.org.uk
OC guide and BIOS oc is credited to Jimmy @DFI and the BIOS engineers for thier hard work!
Test System
http://i274.photobucket.com/albums/j...h/DSCN1721.jpg
http://i274.photobucket.com/albums/j...h/DSCN1724.jpg
IMG]http://i274.photobucket.com/albums/jj262/g1lgamesh/P45Plus_600X6_32M.jpg[/IMG]
http://i274.photobucket.com/albums/j...00x6_2x32M.jpg
http://i274.photobucket.com/albums/j...6_32M_3D06.jpg
http://i274.photobucket.com/albums/j...0x6_SP2004.jpg
http://i274.photobucket.com/albums/j...6_32M_3D06.jpg
Anyone need bios settings?
NOt bad for the budget-end of the DFI boards
Oh and OC guide for you all for the P45 T2RS PLUS DK
Genie BIOS:
- Exist Setup Shutdown: Mode 2
- Shutdown after AC loss: Disabled
- O.C. Fail retry Counter: 1
- O.C. Fail CMOS Reload: Disable
- CPU Clock Ratio: 6X ~ 9.5X
- Target CPU Clock: 600MHz~ 450MHz (Max: 620MHz ~ 470MHz)
- Boot Up Clock: AUTO
-CPU Clock Amplitude: 800mV
-CPU Clock0 Skew: 0ps (0~100ps over 580MHz *by CPU)
- CPU Clock1 Skew: 0ps (0~200ps over580MHz* by CPU)
- DRAM Speed: 333/667 or 400/800 (more relax for timing table)
- PCIE Clock: 100MHz
- PCIE Slot Config: 1X 1X
- CPU Spread Spectrum: Disabled
- PCIE Spread Spectrum: Disabled
- SATA Spread Spectrum: Disabled
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit : Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled (Disabling for running single core)
DRAM Timing:
- Enhance Data transmitting: AUTO
- Enhance Addressing: AUTO
- T2 Dispatch: Disabled
- Clock Setting Fine Delay: Press Enter
Ch1 DRAM Default Skew: 3 or 0
Ch2 DRAM Default Skew: 3 or 0
Rcomp Setting: 1 or 2
(*** DRAM Skew mode: 3 - 3 - 1 , highest DRAM speed we reached 1.33GMhz DRAM speed,
DRAM skew mode: 0 - 0 -2 , another stable mode to reach 1.3GHz DRAM speed)
CAS Latency Time (tCL): AUTO
- RAS# to CAS# Delay (tRCD): AUTO
- RAS# Precharge (tRP): AUTO
- Precharge Delay (tRAS): AUTO
- All Precharge to Act: AUTO
- REF to ACT Delay (tRFC): AUTO
- Performance LVL(Read delay): AUTO
- Read delay phase adjust: Press Enter
- MCH ODT Latency: AUTO
- Write to PRE Delay (tWR): AUTO
- Rank Write to Read (tWTR): AUTO
- ACT to ACT Delay (tRRD): AUTO
- ALL PRE to Refresh: AUTO
Voltage Settings
- CPU VID Control: +212mV ~ +300mV
- DRAM Voltage Control: 2.100 ~ 2.432v
- SB Core/CPU PLL Voltage: 1.55v
- NB Core Voltage: 1.37~1.5075v
- CPU VTT Voltage: 1.34~1.45V
- Clockgen Voltage Control: 3.45V
-CPU GTL0/2 REF Volt: 0.58X~0.63X
-CPU GTL 1/3 REF Volt: 0.58X~0.63X
-North Bridge GTL REF Volt: 0.58X~0.61X
(***Lower GTL voltage level, it does help to reach higher FSB)
Once again with thanks to Jimmy at DFI for his hard work!
gilgamesh
