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Afaik, there's just one set of MSRs. Writing to FIDVID_CTL changes both cores at the same time. Apparently, however it's done, if only one core has its VID or FID changes, it won't change if going lower, and both cores change if going higher.
I think there are separate MSRs for each core, see section 10.5 in the AMD doc. Quote from 10.5.7.3:
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The processor driver enforces a “highest requested P-state” policy. Both cores will be in the highest P-state requested for either core. The processor driver keeps track of P-state transition requests and only reduces the P-state of either core after the operating system has requested that the P-state of both cores be reduced. When the operating system requests that the P-state of either core be increased, the processor driver increases the P-state of both cores.
This seems to apply to your results as well, so it may actually be done by the hardware itself, not the CPU driver. Testing is easy: modify an MSR on the first core, then read it from the second, if they don't match, there are separate MSRs, and you'll need to write to all cores.