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12-19-2007, 01:30 PM
BeastNotro

How much and where and how i/we can get one if need to be?
12-19-2007, 01:32 PM
sofarfrome

Quote:

Originally Posted by BeastNotro

Well not quite true there about not being P95 or Orthos prime stable as it must be stable for at least 12-24hrs.

I have builds run P95 for say 10 hours and fail... i say ok fuk it i will run it... and yeppers... bam games froze up, and even at times when surfing the net the damn thing would freeze up and running 3dmark 06 PASSED with flying colors.....and so did 3dmark 05... but 3dmark 03 Locked her up.

Well the thing was .... the CPU needed more voltage just a :banana::banana::banana::banana: hair more and then i ran prime 95 for 18hrs before i decided she was good enough.... guess what i am still running strong on that build... the one i am using now... :)

I have had many ppl in the past :banana::banana::banana::banana::banana: about P95 not being stable, well guys all i can say is if it can't do at least 12-24hrs... basically 12-18hrs stable.. then it is no good in my book for 100% stability.

Now if your just a surfer on the net and play the odd game.... GAWD why bother overclocking at all.... ???

My 2-cents...I have had systems with high OCs that pass all of the available benchmarks including all 3D benchmarks and P95 for 24 hours. Load up UT2004 and play, system locks up within 10 minutes, or less. Bump vcore a smidge and all is well. I will no longer go for ridiculous P95 times. I will run all 3D benchmarks first to get a clue on what the OC will be then run prime on small ffts for about an hour. If it passes then it is off to the most stressful game I can get my hands on. I guess I should go out and get crysis or the new UT for testing.
12-19-2007, 01:33 PM
Brother Esau

Bios Chip sales you must talk in PM please they have busted my balls once already:D because I had it advertising in my siggy new rules coming down on forum lately:)
12-19-2007, 01:56 PM
Praz

Quote:

Originally Posted by sofarfrome

My 2-cents...I have had systems with high OCs that pass all of the available benchmarks including all 3D benchmarks and P95 for 24 hours. Load up UT2004 and play, system locks up within 10 minutes, or less. Bump vcore a smidge and all is well. I will no longer go for ridiculous P95 times.

Exactly. Hours and hours of running anything only proves that particular program is stable. A quick check of stability is looping 3dMark for a couple of hours with Prime or OCCT running in the background.
12-19-2007, 01:57 PM
Ace-a-Rue

Quote:

Originally Posted by shawn1998

Well, found the bios on the DFI website and flashed. One thing it solved, on the negative side, is that my Areca 1210 card will no longer work in the 2nd pci-e 16X slot, under any circumstances. I can get it to boot once in awhile, but only at 1X. Before, on the 11/28 bios, as long as I had both floppy power connectors unplugged, it would work at 8X. Now, with both unplugged, it only works at 1X. So, I benchmarked the card in 4X and 8X and found absolutely no difference in performance, so it really doesn't matter. I stuck it back into the top 4X slot and all is well (with both floppy connectord plugged in).

SHAWN,

have you tried putting the areca card in slot 1 and your VC in slot 2?...i did that with the original bios without any aux. 5/12v power and it worked just great..8x bandwidth for the areca card and 16x for the VC...posted and booted fine and i was able to access the areca bios during post regimen.

have you tried the above with the newest bios?

i found the areca card will get higher burst speed at 8x bandwidth over the 4x slot.
12-19-2007, 02:08 PM
CapFTP

anyone has tried such settings ?

FSB=400
333/1066 (5:8) that means DDR2-1280
200/667 (3:5) that means DDR2-1333

?

my mobo hangs up with this settings on C1 and whistle...:D:D
12-19-2007, 02:16 PM
Brother Esau

@ ACE......Hows you're ARECA Raid Controller working in this motherboard please:)
12-19-2007, 02:24 PM
zanzabar

esau can test xfire in the 16x adn 4x slot i was thinking of getting an areca and wanted to see numbers with pci-e2 and a pci-e1 4x
12-19-2007, 02:27 PM
Brother Esau

PCI-E 2.0 does not do much in terms of performance because the cards can't utilize the Bandwidth headroom right now not the way they will in up coming GFX Cards releases:D

You'll get about 800mb Burst in X4
12-19-2007, 03:08 PM
shawn1998

Quote:

Originally Posted by Ace-a-Rue

SHAWN,

have you tried putting the areca card in slot 1 and your VC in slot 2?...i did that with the original bios without any aux. 5/12v power and it worked just great..8x bandwidth for the areca card and 16x for the VC...posted and booted fine and i was able to access the areca bios during post regimen.

have you tried the above with the newest bios?

i found the areca card will get higher burst speed at 8x bandwidth over the 4x slot.

I did that with the original bios as well, it worked. I have not tried with the newest bios, however, so I couldn't tell you if it still works or not. Maybe if I am bored later tonight I'll try it out.

I have tested with it in 4X and compared the results with the results from *x and there was no change at all. I plan on adding the 4th Raptor this weekend, so I will bench it in 4X and see what happens. If what Brother Esau says is true, which I believe it is, and I can see up to 800mb burst speed in 4X, then I don't honestly think 8X will be any better than 4X for the 4 Raptors I will be running. Who knows, though, I try it out and let you know. Thanks for the info guys!
12-19-2007, 03:12 PM
Praz

Code:

CPU Feature Page Thermal Management Control................Enabled PPM (EIST) Mode...........................Enabled Limit CPUID MaxVal........................Disabled CIE Function..............................Auto Execute Disable Bit.......................Enabled Virtualization Technology.................Enabled Core Multi-Processing.....................Enabled Main BIOS Page Exist Setup Shutdown......................Mode 2 Shutdown After AC Loss....................Disabled O. C. Fail Retry Counter..................0 CLOCK VC0 Divider.........................Auto CPU Clock Ratio...........................10x CPU Clock.................................266 MHz Boot Up Clock.............................Auto DRAM Speed................................Auto PCIE Clock................................100MHz PCIE Slot Config..........................1X 1X CPU Spread Spectrum.......................Disabled PCIE Spread Spectrum......................Disabled SATA Spread Spectrum......................Disabled Voltage Setting Page CPU VID Control...........................Auto CPU VID Special Add.......................Auto DRAM Voltage Control......................1.904V SB Core/CPU PLL Voltage...................1.510V NB Core Voltage...........................1.265V CPU VTT Voltage...........................1.211V VCore Droop Control.......................Enabled Clockgen Voltage Control..................3.45V GTL+ Buffers Strength.....................Strong Host Slew Rate............................Weak GTL REF Voltage Control...................Disabled CPU GTL1/3 REF Volt.......................110 CPU GTL 0/2 REF Volt......................110 North Bridge GTL REF Volt ................110 DRAM Timing Page Enhance Data Transmitting.................Auto Enhance Addressing........................Auto T2 Dispatch...............................Auto Clock Setting Fine Delay..................Listed Below CAS Latency Time (tCL)....................Auto RAS# to CAS# Delay (tRCD).................Auto RAS# Precharge (tRP)......................Auto Precharge Delay (tRAS)....................Auto All Precharge to Act......................Auto REF to ACT Delay (tRFC)...................Auto Performance Level.........................Auto Read Delay Phase Adjust...................Listed Below MCH ODT Latency...........................Auto Write to PRE Delay (tWR)..................Auto Rank Write to Read (tWTR).................Auto ACT to ACT Delay (tRRD)...................Auto Read to Write Delay (tRDWR)...............Auto Ranks Write to Write (tWRWR)..............Auto Ranks Read to Read (tRDRD)................Auto Ranks Write to Read (tWRRD)...............Auto Read CAS# Precharge (tRTP)................Auto ALL PRE to Refresh........................Auto Read Delay Phase Adjust Page Channel 1 Phase 0 Pull-In.................Auto Channel 1 Phase 1 Pull-In.................Auto Channel 1 Phase 2 Pull-In.................Auto Channel 1 Phase 3 Pull-In.................Auto Channel 1 Phase 4 Pull-In.................Auto Channel 2 Phase 0 Pull-In.................Auto Channel 2 Phase 1 Pull-In.................Auto Channel 2 Phase 2 Pull-In.................Auto Channel 2 Phase 3 Pull-In.................Auto Channel 2 Phase 4 Pull-In.................Auto Clock Setting Fine Delay Page Ch1 Clock Crossing Setting................Auto DIMM 1 Clock fine delay...................Current[14] DIMM 2 Clock fine delay...................Current[5] DIMM 1 Control fine delay.................Current[9] DIMM 2 Control fine delay.................Current[7] Ch 1 Command fine delay...................Current[9] Ch2 Clock Crossing Setting................Auto DIMM 3 Clock fine delay...................Current[13] DIMM 4 Clock fine delay...................Current[3] DIMM 3 Control fine delay.................Current[2] DIMM 4 Control fine delay.................Current[4] Ch 2 Command fine delay...................Current[10] Ch1Ch2 CommonClock Setting................Auto Ch1 RDCAS GNT-Chip Delay..................Auto Ch1 WRCAS GNT-Chip Delay..................Auto Ch1 Command to CS Delay...................Auto Ch2 RDCAS GNT-Chip Delay..................Auto Ch2 WRCAS GNT-Chip Delay..................Auto Ch2 Command to CS Delay...................Auto
12-19-2007, 03:23 PM
eva2000
Clock Fine Delay At Work

Still very early into my testing of how memory behave on DFI LP LT X38-T2R with 11/28 bios. It basically seems like a more matured version of what is implemented on DFI LP UT P35-T2R :)

Playing with 2:3 divider (266/800) and 2x 1GB Crucial Ballistix PC2-8500, I found myself hitting memory clock wall at several points while doing my routine Memtest86+ v1.70 testing.

Only salvation to break through that memory clock wall was fine tuning Clock Fine Delay values for DIMM 1 & 3. To my surprise I broke through that 651Mhz wall and ended up at 666Mhz 5-5-5-9 at 2.49v being single Super Pi 32M stable!
- 633mhz 5-5-5-9 at 2.27v was okay
- 640mhz 5-5-5-9 at 2.31v was okay
- 651mhz 5-5-5-9 regardless of vdimm used kept freezing in test #5 loop testing - clock fine delay was all set to Current.
- 651mhz 5-5-5-9 at 2.38v errored out in memtest, but elimated freezing by increasing dimm 1 + 3 clock fine delay values from Current (2) to manually set 3.
- 660mhz 5-5-5-9 at 2.45v was okay in memtest now by further increasing dimm 1 + 3 clock fine delay values from manually set 3 to 5.
- 666mhz 5-5-5-9 at 2.49v would error out in test #5 loop on 2nd pass with a few errors everytime, no voltage adjustments helped.
- 666mhz 5-5-5-9 at 2.49v was okay when i further increased dimm 1 + 3 clock fine delay values from manually set 5 to 6 or 7.
- 670mhz 5-5-5-9 at 2.49v would error out in test #5 loop on 2nd pass with a few errors everytime, voltage adjustments didn't help much to stablise it. Dimm 1 + 3 clock fine delay values manually set at 7 helped reduce it to a few errors in memtest86+ v1.70 test #5 loop.
So here's where I end up at so far 666Mhz 5-5-5-9 at 2.49v! Pretty awesome for initially having hit a brick wall at 651Mhz 5-5-5-9!

http://fileshosts.com/intel/DFI/DFI_...cpuz_valid.png

http://fileshosts.com/intel/DFI/DFI_...3m20s110ms.png

http://fileshosts.com/intel/DFI/DFI_..._bandwidth.png

DFI LP LT X38-T2R Bios Settings

Quote:

PC Health Status
Adjust CPU Temp: +7C

CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 8x
- Target CPU Clock: 3552
CPU Clock: 444
Boot Up Clock: AUTO
DRAM Speed: 266/800
- Target DRAM Speed: 1335
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled

Voltage Settings
CPU VID Control: 1.2875
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.49
SB Core/CPU PLL Voltage: 1.51
NB Core Voltage: 1.643
CPU VTT Voltage: 1.377
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110

DRAM Timing
- Enhance Data transmitting: FAST
- Enhance Addressing: FAST
- T2 Dispatch: Enabled

Clock Setting Fine Delay
Ch1 Clock Crossing Setting: More Aggressive
- DIMM 1 Clock fine delay: 7 (manually increased from 2 allowed me to pass 651Mhz mem clock wall in memtest86+ v1.70)
- DIMM 2 Clock fine delay: Current 7
- Ch 1 Command fine delay: Current 11
- Ch 1 Control fine delay: Current 8

Ch2 Clock Crossing Setting: More Aggressive
- DIMM 3 Clock fine delay: 7 (manually increased from 2 allowed me to pass 651Mhz mem clock wall in memtest86+ v1.70)
- DIMM 4 Clock fine delay: Current 6
- Ch 2 Command fine delay: Current 11
- Ch 2 Control fine delay: Current 6

Ch1Ch2 CommonClock Setting: More Aggressive

Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto

Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto (where cpuz sees 1T or 2T SETTING)

CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 5
Precharge Delay (tRAS): 9
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance LVL (Read Delay) (tRD): 6

Read delay phase adjust: Enter

Ch1 Read delay phase (4~0)
- Channel 1 Phase 0 Pull-In: Auto
- Channel 1 Phase 1 Pull-In: Auto
- Channel 1 Phase 2 Pull-In: Auto
- Channel 1 Phase 3 Pull-In: Auto
- Channel 1 Phase 4 Pull-In: Auto

Ch2 Read delay phase (4~0)
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto

MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 14
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 3
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): 4
Ranks Read to Read (tRDRD): 5
Ranks Write to Read (tWRRD): 4
Read CAS# Precharge (tRTP): 3
ALL PRE to Refresh: 4
12-19-2007, 03:24 PM
CERO

So how is this board compared to the P35 , or it is to early to make any conclusions?
12-19-2007, 04:25 PM
AKHandyman

I have 2 questions ... EVA ... how did you get the Everest beta version1227? I have the 1226 version, yet I can't find the one you have ...:confused:
Two, does anyone know why in the BIOS under Advanced Chipset Features > PCI-E compliancy mode ... it shows the version to be 1.0a ? I thought it was supposed to be 2.0 ... anyone notice this? :confused:
12-19-2007, 05:09 PM
AKHandyman

EVA - re your post #562 ... you say you did that with Crucial Ballistix PC2 8500, yet your CPU-Z shows OCZ PC2 6400 ... I have 4GB OCZ PC2 6400 and a E6850 ... if I use those settings, I should see something very similar to yours, right?
12-19-2007, 05:10 PM
Ace-a-Rue

Quote:

Originally Posted by Brother Esau

@ ACE......Hows you're ARECA Raid Controller working in this motherboard please:)

working great!...no problems while in slot #1...it won't work in slot #2; meaning, it hangs on the initial post screen...haven't upgraded to the newer bios...i might try later on.
12-19-2007, 05:18 PM
Brother Esau

So its working then/ whats the Burst rate that you are getting?
12-19-2007, 05:39 PM
Ace-a-Rue

hey BRO...does DFI boards have a serious problem with a lot of bios chips dying on flash???
12-19-2007, 05:40 PM
Ace-a-Rue

Quote:

Originally Posted by Brother Esau

So its working then/ whats the Burst rate that you are getting?

the last time i checked was like 660 mb/sec for 2 drives in raid 0
12-19-2007, 05:48 PM
Praz

How about this thread gets back on topic.
12-19-2007, 05:53 PM
Brother Esau

Quote:

Originally Posted by Ace-a-Rue

hey BRO...does DFI boards have a serious problem with a lot of bios chips dying on flash???

Not that I am aware of ACE but sheet happens you know? I just had a Flash go bad on me not long ago my Floppy drive threw a rod in the middle of the Flash and it was Good Night Irene:D

Sometimes too the Flash doesn't go right for what ever reason even if what you did was flawless thats happened to me a couple of times the Past year maybe bad chips who the hell knows:shrug:

But the Point is that its better to spend a couple of bucks on insurance so you don't get caught with you're pants down as RMA for Board takes 10-14 days vs a few minutes to plop a new chip in.........:D
12-19-2007, 07:35 PM
AKHandyman

Quote:

Originally Posted by Praz

How about this thread gets back on topic.

I agree, I've asked for a little clarification on a few things and haven't yet gotten an answer ... hope we can get back to what this thread is all about ... :p:
12-19-2007, 08:52 PM
pumbertot

just a Q and a quick answer wanted. would you guys that had the P35 LP recommend selling and getting this board or is it not worth it yet?
12-19-2007, 09:19 PM
emoners
Quote:
Originally Posted by eva2000

Clock Fine Delay At Work

Still very early into my testing of how memory behave on DFI LP LT X38-T2R with 11/28 bios. It basically seems like a more matured version of what is implemented on DFI LP UT P35-T2R :)

Playing with 2:3 divider (266/800) and 2x 1GB Crucial Ballistix PC2-8500, I found myself hitting memory clock wall at several points while doing my routine Memtest86+ v1.70 testing.

Only salvation to break through that memory clock wall was fine tuning Clock Fine Delay values for DIMM 1 & 3. To my surprise I broke through that 651Mhz wall and ended up at 666Mhz 5-5-5-9 at 2.49v being single Super Pi 32M stable!

633mhz 5-5-5-9 at 2.27v was okay
640mhz 5-5-5-9 at 2.31v was okay
651mhz 5-5-5-9 regardless of vdimm used kept freezing in test #5 loop testing - clock fine delay was all set to Current.
651mhz 5-5-5-9 at 2.38v errored out in memtest, but elimated freezing by increasing dimm 1 + 3 clock fine delay values from Current (2) to manually set 3.
660mhz 5-5-5-9 at 2.45v was okay in memtest now by further increasing dimm 1 + 3 clock fine delay values from manually set 3 to 5.
666mhz 5-5-5-9 at 2.49v would error out in test #5 loop on 2nd pass with a few errors everytime, no voltage adjustments helped.
666mhz 5-5-5-9 at 2.49v was okay when i further increased dimm 1 + 3 clock fine delay values from manually set 5 to 6 or 7.
670mhz 5-5-5-9 at 2.49v would error out in test #5 loop on 2nd pass with a few errors everytime, voltage adjustments didn't help much to stablise it. Dimm 1 + 3 clock fine delay values manually set at 7 helped reduce it to a few errors in memtest86+ v1.70 test #5 loop.

So here's where I end up at so far 666Mhz 5-5-5-9 at 2.49v! Pretty awesome for initially having hit a brick wall at 651Mhz 5-5-5-9!

http://fileshosts.com/intel/DFI/DFI_...cpuz_valid.png

http://fileshosts.com/intel/DFI/DFI_...3m20s110ms.png

http://fileshosts.com/intel/DFI/DFI_..._bandwidth.png
nice one Eva!:up: is it ok to push NB to 1.6v?
12-19-2007, 09:34 PM
AKHandyman

I am liking what I see so far, but I am far from being an expert, but right now I have it purring along pretty good ... it's been stable for most of going 4 hours at (9 x 423 MHz)= 3.8 GHz. Memory is stable as well ... I know this board has a lot more in it and I am learning as I go along ... and having some fun ... :up:

http://img529.imageshack.us/img529/7...at38sd2.th.jpg

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