Dfi Lp Dk P45-t2rs @ 4.5ghz Ddr 1186
Here's my new daily overclock all but I'll put her on water & get RAID going when I change cases with my server later next week.
I reckon I could lower the NB voltage a click or 2 or maybe even more if I dropped back to the 333 strap.
CN :)
P.S Sorry about the BIOS version typo in SG :shrug:
=========================
DFI LANPARTY DK P45-T2RS (BIOS 1003)
INTEL CORE 2 DUO E8500 WOLFDALE 3.16GHZ 6M L2 CACHE (Q807A273 / C0)
OCZ PC2-8500 SLI 2 x 1GB PN:OCZN1066SR2GK
VISIONTEK HD3870X2 1GB OC 904 X 1053MHZ (8.10 DRIVERS)
1 X HITACHI DJ 80GB HD'S
SONY DUAL LAYER DVD RW (DRU-820A)
OCZ GAMEXTREAM 700W PSU
WINDOWS XP PRO SP3
CPU COOLING: AIR / TRUE & 100CFM PANAFLO
Code:
>CPU Feature:
Thermal Management Control.......... - Enabled
PPM(EIST) Mode...................... - Disabled
Limit CPUID MaxVal.................. - Disabled
CIE Function........................ - Disabled
Execute Disable Bit................. - Enabled
Virtualization Technology........... - Enabled
Core Multi-Processing............... - Enabled
>DRAM Timing:
Enhance Data transmitting........... - Fast
Enhance Addressing.................. - Fast
T2 Dispatch......................... - Auto
>Clock Setting Fine Delay Press Enter:
DLL And RCOMP Settings.............. - Auto
Ch1 Dram Defaul Skew................ - Model 3
Ch2 Dram Defaul Skew................ - Model 3
RCOMP Settings...................... - Model 1
Fine Delay Step Degree.............. - 70ps
Ch1 Clock Crossing Setting.......... - Nominal
DIMM1 Clock Fine Delay.............. - Current[2396ps]
DIMM2 Clock Fine Delay.............. - Current[2396ps]
Ch1 Control0 Fine Delay............. - Current[268ps]
Ch1 Control1 Fine Delay............. - Current[268ps]
Ch1 Control2 Fine Delay............. - Current[268ps]
Ch1 Control3 Fine Delay............. - Current[268ps]
Ch1 Command Fine Delay.............. - Current[394ps]
Ch2 Clock Crossing Setting.......... - Nominal
DIMM3 Clock Fine Delay.............. - Current[2066ps]
DIMM4 Clock Fine Delay.............. - Current[2066ps]
Ch2 Control0 Fine Delay............. - Current[48ps]
Ch2 Control1 Fine Delay............. - Current[48ps]
Ch2 Control2 Fine Delay............. - Current[48ps]
Ch2 Control3 Fine Delay............. - Current[48ps]
Ch2 Command Fine Delay.............. - Current[394ps]
Ch1 Ch2 Common Clock Setting........ - Nominal
Ch1 RDCAS GNT-Chip Delay............ - Auto
Ch1 WRCAS GNT-Chip Delay............ - Auto
Ch1 Command To CS Delay............. - Auto
.
Ch2 RDCAS GNT-Chip Delay............ - Auto
Ch2 WRCAS GNT-Chip Delay............ - Auto
Ch2 Command To CS Delay............. - Auto
Flex Memory Mode..................... - Auto
CAS Latency Time (tCL)............... - 5
RAS# to CAS# Delay (tRCD)............ - 5
RAS# Precharge (tRP)................. - 5
Precharge Delay (tRAS)............... - 10
All Precharge to Act................. - 5
REF to ACT Delay (tRFC).............. - 28
Performance Level.................... - 7
>Read delay phase adjust Press Enter:
Channel 1 Phase 0 Pull-In........... - Auto
Channel 1 Phase 1 Pull-In........... - Auto
Channel 1 Phase 2 Pull-In........... - Auto
Channel 1 Phase 3 Pull-In........... - Auto
Channel 1 Phase 4 Pull-In........... - Auto
Channel 2 Phase 0 Pull-In........... - Auto
Channel 2 Phase 1 Pull-In........... - Auto
Channel 2 Phase 2 Pull-In........... - Auto
Channel 2 Phase 3 Pull-In........... - Auto
Channel 2 Phase 4 Pull-In........... - Auto
Write to PRE Delay (tWR)............ - 12
Rank Write to Read (tWTR)........... - 11
ACT to ACT Delay (tRRD)............. - 3
Read to Write Delay (tRDWR)......... - 8
Ranks Write to Write (tWRWR)........ - Auto
Ranks Read to Read (tRDRD).......... - Auto
Ranks Write to Read (tWRRD)......... - 4
ALL PRE to Refresh.................. - 4
>Voltage Settings:
CPU VID Special Add................. - + 450.0mV
DRAM Voltage Control................ - 2.243v
SB Core/CPU PLL Voltage............. - 1.55v
NB Core Voltage..................... - 1.4075v
CPU VTT Voltage..................... - 1.25v
VCore Droop Control................. - Disabled
Clockgen Voltage Control............ - 3.60v
CPU GTL0/2 REF Volt................. - 0.67x
CPU GTL 1/3 REF Volt................ - 0.67x
North Bridge GTL REF Volt........... - 0.58x
FSB Vref............................. - Auto
Genie BIOS Settings:
Exist Setup Shutdown................ - Mode 2
Exist Shutdown After AC loss........ - Enabled
O.C Clock Fail Retry Counter........ - 0
O.C Clock Fail CMOS Reloaded........ - Disabled
CPU Clock Ratio..................... - 9.5
Target CPU Clock.................... - 4493MHz
CPU Clock........................... - 473
Boot Up Clock....................... - Auto
CPU Clock Amplitude................. - 800mV
CPU Clock0 Skew..................... - 0ps
CPU Clock1 Skew..................... - 0ps
DRAM Speed.......................... - 266/667
Target DRAM Speed................... - 1186MHz
PCIE Clock.......................... - 100mhz
CPU Spread Spectrum................. - Disabled
PCIE Spread Spectrum................ - Disabled
PRIME95 + 3x CPU-Z
http://i106.photobucket.com/albums/m...86/10HStop.jpg
EVEREST CACHE & MEMORY:(READ 10448MBS LATENCY 48.5NS)
http://i106.photobucket.com/albums/m...emoryBench.jpg
3DMARK2001:(SCORE 81249)
http://i106.photobucket.com/albums/m...6/3DMARK01.jpg
3DMARK2003:(SCORE 75560)
http://i106.photobucket.com/albums/m...6/3DMARK03.jpg
3DMARK2005:(SCORE 29838)
http://i106.photobucket.com/albums/m...6/3DMARK05.jpg
3DMARK2006:(SCORE 20131)
http://i106.photobucket.com/albums/m...6/3DMARK06.jpg
AQUAMARK 3:(SCORE 265,324)
http://i106.photobucket.com/albums/m...6/AquaMark.jpg
SHORT DESCRIPTION:
473 x 9.5 = 4500MHz @ 1.45v
5-5-5-10 2T @ 2.24V DDR 1186