mhhhh id place this between the 80core prototype and LRB... its odd this thing pops up now though... isnt it going to directly compete with LRB? :confused:
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mhhhh id place this between the 80core prototype and LRB... its odd this thing pops up now though... isnt it going to directly compete with LRB? :confused:
does intel really need to be designing 3 chips that all do about the same thing, even though they havnt tested the market with just one.
why should it?Quote:
Originally Posted by saaya
Its a research chip, something you might see in a different shape 4-5 years or maybe never.
If i were to make a guess... I'd say it was made to help look at ways of inter core communications and different cache sharing set ups as they realized the methods used in larrabee are not scalable to exceedingly large numbers of cores...
:wasntme:
Those are very different things. LRB has shared cache and very wide vector unit. Also LRB implements posix threading architecture and its programming model is not different from the programming model of any multicore cpu. On the other side the subject cpu is a cluster on chip and it needs some sort of cluster software to work effectivelly. Also, probably, it doesn't have vector unit (not sure if it has FPU at all) because the main destination for such cpu is integer (data base) server workloads.Quote:
Originally Posted by saaya
See Also: http://news.cnet.com/8301-30685_3-10407818-264.html
Quote: Intel on Wednesday demonstrated a fully programmable 48-core processor it thinks will pave the way for massive data computers powerful enough to do more of what humans can.Neural-network-like simulations, perhaps. Robotics?
I think these CPUs do have floating-point: In the PDF is a slide titled "SCC Demo Showcase" (p11) showing "Javascript Physics Modeling". I can't imagine them showing that off if the chip didn't have hardware FP capability.
Quote: Rattner said that SCC's 48 IA-32 [Intel Architecture, 32-bit] cores are simple, in-order designs and not sophisticated out-of-order processors.So they are probably based on PII or P3 (or Atom?) architecture . But this is just an experimental chip designed to let potential users play with its many-core and inter-core communications capabilities and to suggest and try novel applications, rather than to have lots of raw processing power. That could be added later if the concept of the chip is viable.
Meanwhile, it looks like it is already a great thing for grid computing (http://www.worldcommunitygrid.org). The parallel-processing software is there already, and Linux has had multi-CPU capability for up to 1024 processors for a while now. Go, MovieMan, Go !! http://www.mysmiley.net/imgs/smile/a...animal0019.gif
IA32? hmm... how did I missed that? Cool so we have 4-channel, 48-core monster that can address no more than 4 gigs of RAM... sweet!
They are 48 "atom-like" cores... And iirc their new way of inter-core communication allows for more than 4GB (does not behave like the chips before it)
Oh, no, I hate it. It is still x86 :mad:
I expected something much more interesting.
And it IA-32 (32 bit).
Just strange ideas...
with 4x memory controllers, I might be wrong but I think it could access 4x4GB and somehow split the ram among the cores evenly
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Originally Posted by Buckeye
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Originally Posted by MaByBoI
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Originally Posted by zsamz_
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Originally Posted by Helmore
I requested one two days ago.Quote:
Originally Posted by XS Janus
I wonder if they are still laughing?
Also I get the feeling that what they are setting up is requests for software usage where you do a remote login to the machine that stays at their facility and you "try" your software on it..
I asked for a machine instead to see how it works in the real world
I wonder if Franck could write a clockgen for something like this?..:rofl:
In your request you made sure to mention that the XS community would be working on real-world stress evaluation and looking into the scaling and compatibility of certain programs who's creators frequent XS... right? :up:Quote:
Originally Posted by Movieman
Great! So log in, install BOINC, and let her rip 24/7. And they pay the electricity bills :rofl:Quote:
Also I get the feeling that what they are setting up is requests for software usage where you do a remote login to the machine that stays at their facility and you "try" your software on it..
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Originally Posted by BlindFreddie
^^...
Andriod <---
Give me 7 more years..! I'll have two of these cooking me dinner when I get home for work! Then a back rub!
Plus, I can tell the b!tch to protein fold when i'm sleeping. Really.. why not?
Hmmm. The problems that are interesting to solve with 48 CPUs (to me at least) require more RAM than a 32 bit processor can address. This makes for a very limited development / research machine...
Exactly, and many people miss this.Quote:
Originally Posted by Hornet331
Companies, at least the smart ones, don't put "all their eggs in one basket"
They work on competing technologies to find the best ones.
This may be a niche product but from my perspective for DC work and many other types of work it could be a heck of an answer to what we do as electrical cost is one of the major issues we deal with.
with 4 memory controllers I'm guessing you get 4GB of ram for a bunch (12) of cores?Quote:
Originally Posted by hyc
Now that makes more sense than anything else I've read..good call.:up:Quote:
Originally Posted by Levish
it makes no difference if you have 4 memory controllers, or 4-channel memory controller! You can't address more than 4 gigs on IA32 x86 CPU!Quote:
Originally Posted by Levish
I don't doubt that BUT just think for a minute: Does it make common sense that a company would create a 48 core machine with that memory limit?Quote:
Originally Posted by Nedjo
I don't have an answer but that just doesn't make sense to me.:confused:
http://tof.canardpc.com/view/3332ad2...73822d1625.jpg
They talk about 64GB DRAM DDR3 on the PDF
Then I sense the re-use of segment registers. Or the RAM is divided among cores, not shared...
Many core concept is something Intel is working on for a long time now. Didn't remember the 80core@1.26TFLOPS running 4 GHz on 65nm CMOS? The problem is data throughput for all those cores, it is just impossible to feed them all now. Also 64 GB of memory is too low even for "just" 48 cores. But they continue working. I am looking forward to another version, this time 32nm :)
What is the performance of this one like?
^
above one teraflop.
Tech grows on eachday...