_Manny_ , something is seriously wrong there. I have no idea how a e6750 @ 3520 MHz and dual channel ram @ 1320 MHz gets 19.XXX sec in SPI 1M. My e6300 @ 3.43 GHz & ram @ 980 MHz (4-4-4-12) gets 16.5xx secs......i have 2mb less cache too......
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_Manny_ , something is seriously wrong there. I have no idea how a e6750 @ 3520 MHz and dual channel ram @ 1320 MHz gets 19.XXX sec in SPI 1M. My e6300 @ 3.43 GHz & ram @ 980 MHz (4-4-4-12) gets 16.5xx secs......i have 2mb less cache too......
i hope this was a bug and not some "tweak" to get attention :eh:
Why are you using memset 3.0? Why do you insist on cheating? Someone ban this moron's ip from the forums. He's booting at Cas 5, clearly. You're about the 10th idiot to come here and try to scam a cas 3 record.
well now you've upset Hutch too :D:ROTF:
hutch
i've seen some really cool RAM pots actually ;)
Some people just don't listen.
LOL not use MemSet 3.0
Congrats Manny, the record is all yours. Props to you on the hard work.
P.S Your record is not the Cas 3 WR, rather, the record for the most pathetic Cas 3 memset cheat attempt on XS! GOOD JOB LOSER!
_Manny_: Try another board if you can, and post the CPU-Z CPU screenshot along with the SPi times too or as you can see, many guys won't believe you and will jump to any other conclusion (usually name calling and abuse), even if you were genuine and uninformed about the bug.
Oh, and the guys saying 3400-3500Mhz need to check the link _Manny_ gave at the start: http://valid.x86-secret.com/show_oc.php?id=242375
How would RAM stay at 672.5MHz 2:3 divider if that 6x divider was speedstep? :yepp:
_Manny_, sorry bud, but until you post some CPUz screenies or try this on a different mobo, I'm calling shens.
what i wonder is how he managed to get cpu-z validation?