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Wouldn't adding more SPs to an SIMD 'core' also require a reworking of the scheduler?
Doesn't increasing the size of an SIMD 'core' also make it harder to efficiently use the entire SIMD 'core'? Maybe I'm drawing the wrong conclusion, but isn't RV770 already rather inefficient compared to GT200 when looking at the amount of ALUs alone?
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the gpus share the memory bw?
hmmmm i dont know if thats a good idea... that would hurt perf a lot for sure...
id rather expect that each gpu has its own 4 mem chips...
i thought they have their own mem bw but share a pciE 16x lane via sideport...
