Is it really necessary to change the socket? As long as they add the necessary traces on the motherboard, the processor, etc. ought to be able to handle DDR4...
Is it really necessary to change the socket? As long as they add the necessary traces on the motherboard, the processor, etc. ought to be able to handle DDR4...
I'm not so sure. If you listen to the talk he mentions that there will be improvements to the 6300 Opterons. One thing that was never fixed with the PileDriver core was the cache latency. That would not require a mask change. If they could deliver a "Piledriver2" with a modest 10% IPC increase in single thread and a big reduction in power usage (i.e. all desktop models at 95 watt) I would be satisfied enough to upgrade.
If i recall, Piledriver-->Trinity-->Richland. So perhaps fixing the cache and using Richland cores would give them 10% IPC?
Perhaps some ot the more knowledge folks in cpu desingn could enlighten us as to how much could be done without a big mask change.
Even a revision change requires new masks and process validation without any change to architecture.
A10% IPC gain is almost SR territory clock for clock.
"Improvements" and new SKU`s doesnt require any new silicon, just better/different binning,diff voltages/freqs.Great example are the "new" FX 9xxx .
If you look at the roadmap, keeping same architecture for 3+years means nothing new is coming,its essentially dead in the water just like am3+, there are going to be 2(!) major rehauls on the 1P side, SR and EX, while nothing on older G34 C32 server sockets.
Dont get me wrong new PD revision IS possible, it wouldnt bring any meaningful IPC gains, but it could yield higher freq or get power inline.But if they would do such a thing why not a SR/EX cored opterons from teh start.
New PD revisions will most likely come in the form of new steppings, I really doubt we will see any performance increase, only increases in power usage and maybe decreasing or the same overclock ability...trying to keep current with intel 22nm designs is a tough task for AMD :(
When we look at how AMD "left the high-performance market" we can see that it starts with server side...
Steamroller will not come to a high core design, the 6300 series is supposed to last through 2015?
AMD will lose a ton of market share in that market to intel, and already are...while the 12 and 16 Core Opterons (6100-6200 series) made sense in 2011, they make little to no sense at all in 2013, with Ivy Bridge-EP and upcoming Haswell Xeon (up to 18 core, 36 thread) designs...
Intel is putting AMD to shame and AMD is surviving on sales of products in the $50-150 range which have slim profit margins...
Anyone remember Terramar? Up to 20 cores? Cancelled? No PCI-E 3.0? :rofl:
Will Kaveri support quad-channel RAM?!
When looking at the QVL for RAM for this gigabyte FM2+ board, 4-channels is mentioned: http://download.gigabyte.eu/FileList...niper-a88x.pdf
When looking at an older FM2 gigabyte board, this same QVL list only goes up to dual-channel: http://download.gigabyte.eu/FileList...f2a85x-up4.pdf
What do you guys think?
I think that's some sort of an error in that document. Maybe they mixed up data meant for some intel s2011 motherboard.
http://www.chiphell.com/forum.php?mo...e=1&mobile=yes
Kaveri scores in cb r15...
See first thread for scores
See the link below
The first post..
http://www.chiphell.com/forum.php?mo...&extra=&page=1
Ah ok I see it now. Well this looks more plausible than that BS number of 547pts @ 4.9Ghz ;).
Original link is :
http://www.gdm.or.jp/voices/2013/1230/56219
1st of all that slide was marketing slide.
2nd it was about mobile Kaveri.
3rd it stated "projections not based on actual silicon". So it was based on simulations or AMD wasn't sure where the clock will land so they left that door open.
4th they listed zero workloads in which it was supposedly going to be "20% faster" (based on simulations!).
To summarize, that mobile related slide with "20% faster on CPU side" bullet point is basically telling us nothing about how actual desktop Kaveri will perform.
Disabling a core in module is completely different than "adding another decoder". IN 1st case you have whole front end working for that one core and a whole FP unit (2x FMAC) working for that one core.
In case of SR, you have still a shared fetch unit, increased but still shared Instr. cache and the same or even less FP resources per "core" than in the case of disabled core in a PD module. As can be seen, adding a decoder in no way makes a SR "core" on the same level as PD module that has one core disabled.
lataer today I can try Cinebench R15 with 1600MHz DRAM A10-6800K (as this Kaveri) for the same score. I think, it will be around 4200-4300 MHz CPU clock.
I already have tried it, ~4.2Ghz PD scores about the same 311pts :). At fixed 3.7Ghz clock 4T PD (Richland) scores 274pts.
OK, there is it. First one is A10-6800K with 2133 MHz DDR3 and windows set to performance. CPU cooler Noctua NHD14, base clocks at stock. In Cinebench I was looking for frequencies - these was between 4200-4300 MHz at cores (A10-6800K is 4.1/4.4 GHz chip with better power state modes than Trinity). 324 points.
http://i.imgur.com/fDthluu.png
But if disable power control, I tried 4100 MHz. And lucky 318 points :). So the same as Kaveri at stock settings. The memory at Richland are the same 1600 MHz and I suppose cl9 timings.
http://i.imgur.com/bXEjkm7.png
So, we can say simply the performance (Cinebench) of stock Kaveri 3.7/4.0 GHz is the same as stock Richland A10 4.1/4.4 GHz. IPC is better around +300-350 MHz.
That's less than 10% improvement :(...
10% is good. Look at Intel. SB vs IB around 3%, Haswell vs IB around max 5%. Is not much possible with x86 get higher. Only in software with new instruction support level (FMA, AVX)