If you want to reduce the vNB further you could reduce Ai clock twister to moderate, this would have less of an impact than lowering the tRD.
Also how are people finding bios 902, any reason to move from 803??
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If you want to reduce the vNB further you could reduce Ai clock twister to moderate, this would have less of an impact than lowering the tRD.
Also how are people finding bios 902, any reason to move from 803??
The board won't run stably with a VMCH of less than 1.41 V. I am using a PL of 6 and AI Twister to 'Moderate'. Some minutes ago I cleaned the heatpipe and I hope this will help. ;)
Are you able to run at 400 MHz FSB with stock MCH voltage?
Nevermind, it seems that I destroyed my board... after remounting the heatpipe, Vista won't start and Memtest shows thousands of errors with several memory modules. :(
My new Q9650 arrived today.:up: It's a new batch L847C159. I can't find anything about this batch on the net.
I don't know what the VID is because I don't have the time to put it on my board.
I've found the golden batch.:banana:
Batch L847C159 VID 1.1875V.:up:
Low VID doesn't necessary mean great oc.
I've been running some LinX tests at 9 X 450MHz and DDR 1199 with tRD 6.
I don't think that it's possible to run it at 4.05GHz with Vcore 1.20V- under load.
I can run 4 passes stable with 1.20V under load but than it fails.
It's something that I expected that wouldn't be possible because of the high GFlops. LinX gives me GFlops around 56.700 and I find that very impressive for 4.05GHz.
An other interesting thing is that I don't need high Vtt. I was running with 1.14V real. I did try higher, up to 1.26V, but it fails with a system crash with higher Vtt. I guess I don't need it higher for 9 X 450MHz.
What they are saying about low VID and higher temps is really true. The CPU temperature reached 57° Celsius under LinX load. The room temperature was 27° Celsius and the coolant temperature was 29° Celsius.
It's nice to have a low VID Q9650 under water with these high temperatures. I don't think that it would be possible to run it at 4GHz+ with air cooling. The CPU temperature would reach to high and result in an unstable CPU.
So far my first experiences with this Q9650.
I'm going to try to get it LinX stable for 25 passes and post some screenshots with my results. I'll do this when I've got some time to play a little more with this nice chip.
@A-Grey
Nice m8, looking forward to see those results.
I've been running my Q9650 (1.15 VID) @ 4.02GHz w/ 1.22v + LLC enable for the past 3 months with TRUE + S-Flex F @ 1500rpm without overheat or BSOD. Air is possible for 4GHz, but I am on the edge in terms of max temp. That's why I just bought an Ultra Kaze for it... still testing but I think this will at least save me from going water for awhile...
Q9650@4.05GHz - DDR 1199MHz - tRD 6 - BIOS 0902
http://i431.photobucket.com/albums/q...D6-BIOS090.jpg
OPT1 - Coolant temperatureCode:Ai Overclock Tuner [Manual]
CPU Ratio Setting [9.0]
FSB Strap to North Bridge [400MHz]
FSB Frequency [450MHz]
PCIE Frequency [100MHz]
DRAM Frequency [1199MHz]
DRAM Command Rate [2N]
DRAM CLK Skew on Channel A/B [Auto]
DRAM TimingControl [Auto]
DRAM Static Read Control [Enabled]
Ai Clock Twister [Moderate]
Ai Transaction Booster [Manual]
Common Performance Level [06]
Pull-In of CH A/B all disabled
CPU Voltage [1.30000V]
CPU PLL Voltage [1.50V]
North Bridge Voltage [1.33V]
DRAM Voltage [1.80V]
FSB Termination Voltage [1.24V]
South Bridge Voltage [1.05V]
SB 1.5V Voltage [1.50V]
Loadline Calibration [Disabled]
CPU GTL Voltage Reference [0.63X]
NB GTL Voltage Reference [0.67X]
DRAM Controller Voltage REF [Auto]
DRAM Channel A/B Voltage REF [Auto]
CPU Spread Spectrum [Disabled]
PCIE Spread Spectrum [Disabled]
CPU Clock Skew [Delay 200ps]
NB Clock Skew [Delay 100ps]
CPU Ratio Setting [9.0]
C1E Support [Disabled]
CPU TM Function [Enabled]
Vanderpool Technology [Disabled]
Execute Disable Bit [Enabled]
Max CPUID Value Limit [Disabled]
OPT2 - Memory temperature
This is my first attempt to run it at 4.05GHz. I don't know if it's still stable with lower CPU Voltage. I'll try that later.
My mistake was to delay the DRAM CLK Skew on Channel A and B with 50ps. That made it fail after a few passes in LinX.
With the DRAM CLK Skew on Channel A and B on AUTO and my memory in slots B1 and B2 it stays perfectly stable.
This makes me start thinking that it isn't the CPU Clock Skew that made it fail with my Q9450@3.72GHz, DDR 1199MHz and tRD 6 but the DRAM CLK Skew on Channel A and B. It's almost impossible to keep it stable with the DRAM CLK Skew on Channel A and B on AUTO and Delaying both Channels with 50ps is probably to far.
Perhaps the DDR 1200MHz+ and tRD 6 fix from BIOS 0803 to 0902 didn't fix the problem completely.:shrug:
I'll see that later when I'm trying to run at 9 X 465MHz, DDR 1239MHz and tRD 6.
I'm very happy with the results so far.:D
Great work mate, looking good :up:
a-grey
good to hear you finally got a decent chip.
Just a quick question, i just got UT2004 to do a final stress test on my system to check the FSB termination voltage (stable for 25 pass linx a full run through of large ffts and a full run through of small fft's)
Just to clarify when i run Ut2004 + P95 in blend, what will i be looking for i.e will P95 fail or will something else happen???
For 4.05GHz a CPU Voltage of 1.20V under load is the lowest I can go. The computer reboots or LinX fails immediately with lower CPU Voltage.