When remaining to what you say about that I have to raise the PCI-E when
I want to reach higher FSB's... Then if I would cut the traces that lead from
the onboard clockgenerator to the PCI-E (the traces through which the
onboard clockgenerator feeds the PCI-E with a frequency) and then create a
turbo-pll that would constantly feed the PCI-E with a 100MHz frequency,
then the PCI-E will no longer be influenced by the FSB frequencies anymore,
right. Don't you think that would solve it all? Because that's the kind of
concept for a turbo-pll that I have in mind, see.
I created the following pictures, based on the ones that are on the
http://www.overclockers.com/tips745/ page, to show the concept of a turbo-pll
that I'm considering to create:
Situation without overclock and without turbo-pll:
http://www.geocities.com/speedygonza...rclocks/01.bmp
Situation with (high FSB) overclock but without turbo-pll:
http://www.geocities.com/speedygonza...rclocks/02.bmp
Situation with overclock and with turbo-pll:
http://www.geocities.com/speedygonza...rclocks/03.bmp
So what do you think about it, hipro5 (and other people that might be
interested, of course)? By the way, I also contacted macci about it and am
awaiting a reply. Macci used turbo-pll's to overclock up until insane high
levels back in the RDRAM times, see. :)