What does it do and how does it really work. Is it helpful in overclocking at all?
:shrug::shrug:
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What does it do and how does it really work. Is it helpful in overclocking at all?
:shrug::shrug:
Magic, I don't know and yes.
Nobody really knows how it works. The leading guess is that it adjusts running parameter tolerances. Yes, it's generally helpful in overclocking so long as it is properly implemented by a motherboard and its BIOS.
How to use it? You get a range of positive and negative values. You tweak the values for each core until you find the sweet spot that allows the greatest stable overclock--too much and too little are equally bad. Positive values help OC.
It works by taking the voltage and breaking the molecules down into much smaller particles before injecting them into the CPU's intake bus. This makes the CPU more efficient so it can burn more Voltage easier.
(Ooops. Too many car analogies for me.)
Many people believe it is just a form of clock skewing.
Basically you turn it on... and it works. It can be fine tuned also as Particle mentions. But it can easily add 300Mhz to an overclock.
al it is is a clock skew, as mentioned above,
nothing that boards 10 years ago werent using, just re hashed for the masses in 2008,
like everything i suppose,
and yes it works, but only on CPU's with week tolerances lol
http://en.wikipedia.org/wiki/Clock_skew
I wonder why AMD was being so secretive about this, refusing to explain how it works... Could this maybe also benefit intel cpu's?
Somehow I doubt it takes 6 pins to achieve clock skewing. Gotta be something more to it.
The 6 pins on the CPU previously "unused" are hocked up to the sb750.
I've also heard something about JTAG interface.
Setting wise seems like auto works best for my 9600be.
My Asus M3a with SB600 has options for "AI clock screwing" or something
like that:p: and the most I could get with Win xp64 was 2500mhz
The same cpu (9600be) with the same OS (x64) is now running ~2.9ghz on
the DFI 790gx so I would say it does work.
My 9850be got killed either by the board (above) with ACC or by AOD - maybe both (conspiracy?) I don't know.
All DFI boards that i know of have the DOS Skew control settings, but all that does is handle EMI interference generated by noise from voltage going through the board. Way way back when in the before pentium era that setting actually did something. With better filtered power supplies and better manufacturing process for motherboards, there isnt a need for this setting any more. I highly doubt that the ACC aforementioned is this skew control. Hooking pins up to a south bridge, to me that sounds more like bull since the south bridge functions as the link to the lower buses on the board the pci slots, pcie slots, then the north bridge is the traffic cop that directs things from the upper buses and built in connectors to the back of the board. With AMD the memory controller is on the chip so the NB all it does is regulate traffic of data from inputs to the cpu and outputs to the SB chipset.
I really dont see how hooking up 6 unused pins to a south bridge chipset did anything. I cant blame AMD for wanting to keep this newfound thing quiet, but maybe it is something that is enabled in the bios and they tied it to boards with the SB750 chipset to sell more motherboards. I think it is great that ACC gives good performance boosts in overclocks, but i think they are feeding a load of crap to the general public that has no idea how the internals of a computer works. Maybe later on they will release and disclose what exactly is the real cause of making the boards with SB750s oc so much better.
Must do it differently in the great white north!:rofl:Quote:
My Asus M3a with SB600 has options for "AI clock screwing" or something
like that
Hmmm I am inclining to share the same notion.:shrug:
When I was trying to make the failing core stable, I increased the ACC to +2 for that core and it worked perfectly BUT then the next core would start to fail when it was not failing before. For instance, my ACC is set to 0,0,0,0. During overclocking, core 1 kept failing. I then set ACC values of 0,2,0,0 BUT THEN, core 2 started failing instead. The next set of values that seemed logical for me to try were 0,2,2,0 = Core 2 failed. I am going around in circles 0,2,4,0 = core 2 failed. 0,4,2,0 = core 2 failed again. I am lost.
KEY:
ACC values corresponding to Core 0, Core 1, Core 2, Core 3 are 0,0,0,0 respectively for the above example.
Try raising them in synchronized steps to start with, such as 0000 to 1111 to 2222.
Also, I might have missed this, but what motherboard do you have? I know that at the very least, the ASUS M3A78-T does NOT have properly functional ACC while some other SB750 boards do. Perhaps yours falls into that list of problematic ACC implementations.
You don't want to know :rofl:
Anyone else heard that Nvidia is going to support ACC in the "near" future?
Read it on some site, that collects a bunch of news bits together - forget the name:confused:
Why would AMD not be secretive about it? It's not like Intel is sending their
HighK Metal Gate Hafnium etc. formula to anyone interested.
I set the DQS clock sqew to 255 on my NF4 expert,it supposed to help with high HTT/Ram speeds and afaik the "traditional clock sqewing" is just for that - to help deal with "high speed" (ddr1 mostly) ram and cpu intimate relations.;)
It also has a page full of "spread spectrums" etc, ....don't think it's related.
Anyhow looks like the ACC "mystery" remains - as nobody knows exactly
what and how, just why;) and hey - why not:up:
edit*
For the guys saying that 6 pins is "bs"- why does ACC only work for Phenoms and not X2's ?
Well, leaving it on AUTO does help OCing but I want to maximise its use. Perhaps it could be a useful tool. It seems so because the core which was failing for me consistently wasn't failing anymore when I ACCed it by 2%.:clap: But then, another one starts failing :shrug:
Leaving it on AUTO does require less vCore to sustain the OC though.
Well if all ACC is is a form of skew control then it is possible to tie the bios of the mobos to only enable certain functions with certain chips plugged in. Not all boards have skew controls in the bios that you can change. DFI is one that has had it in the past, dont know if they have that on a SB600 board, might be fun for someone that has one to let us know and fiddle with it and see if they can get similar results as on a sb750 just by messing with the skew control.
Welcome to the ever-growing club of AMDers that are trying to tweak ACC. My experience is identical to your own, Sandeep. Try to help the weak core and...boom...there goes a different core. Without the ingredients for the ACC 'secret sauce', we'll never get a handle on it. I gave up and set the damn thing back to 'auto' after two evenings of repeated attempts to find some sort of consistency with various settings. Consistant it ain't!:down:Quote:
I am lost.
be carefull on this forum, with comments like that ...lol, youll be an outcast before you can say, intel what?
lol, i totaly agree with you, some of the rubbish that AMD has been spewing is beyond me, the whole release of boards with the SB600 chipsets, to then release the exact same boards with a SB750 chipset is pure robbery.
in fact i would suggest that they would be liable for recycle issues from varios councils and law makers, purely in the fact the didnt offer an 'upgrade' option, like BFG or EVGA, to comply with ROHS standards
but hey i am hated here so my opinion will mean nothing, just another intel fanboy with an AMD rig ehh?
About the 6-pin link to the SB750, and the details you ,mention above regarding the NB/IMC/SB BUS controls etc....
The one thing that is significantly different between K8 and K10 is that the clock gen for the K8's was located in the CPU NB, and there were initial problems with the K8 X2's which AMD released the Dual Core Optimiser fix for...
But on K10 (Phenom) the Clock Gen has been removed from the CPU NB and is now situated in the motherboard NB for 7xx series chipsets...
One of my theories about ACC is that its a combination of Clock Skew tolerance tweaking (i.e. the +/- values for the cores) ,and a new clock gen that has been incorporated into the SB750 which uses a direct link to the 6-pins on the CPU to negotiate with the cores....
I have nothing solid to base this on other than the fact that its been reported for some time that there were issues with SB600 and also SB700 internal clock gens.... so the fixed clock gen in SB750 in combination with the tweaking of the clock skew tolerances, allows for increased OC for those CPU's that were previously shown to have one or more weak cores...!!!
I think that ACC has been provided by AMD as a gesture of goodwill if you like as a workaround for customers who have bought Black Editin Phenoms that were sold with the intention of OC'd (hence the unlocked multi's) but that proved to be poor OC'ers as a result of the weak cores....
This is my theory anyway...!!!!
I have no