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http://www.expreview.com/img/news/070927/DSC_3219.jpg
Seems that NV tried to use the chip to handle PCIe Gen2. it is weird that they do not build in the feature in the chipset.
according to "someone" the chip can handle the data traffic like this:
Upstream： PCI Express 16x
Downstream：2x PCI Express 16x, or 4x PCI Express 8x ，or 1x PCI Express 16x + 2x PCI Express 8x
here is teh original post[in Chinese]: http://news.expreview.com/2007-09-27...4591d3775.html
Bizarre?! Is this related to the chip being used on the Skulltrail to support SLI? What board is that? Any more pics?
Looks Like A Barton Core.
it is a nForce 780i SLIQuote:
Originally Posted by virtualrain
I know... but what manufacturer?Quote:
Originally Posted by cookerjc
At last, some news of nForce 7 series! upstream - shouldn't upstream be Hyper-transport or at least 16x+16x? It would make sense if they used Hyper-transport to communicate between SPP, MCP and this chip; but having 16x PCI-E split to 2x 16x?
who konws...780i SLI not out yet.Quote:
Originally Posted by virtualrain
ROFL :ROTF:Quote:
Originally Posted by bypolar
rofl, that's exactly what i thought too. strange that this is supposed to be pci-e 2.0 related - i mean, this chip is kinda large.Quote:
Originally Posted by bypolar
Nice :D :D
This looks very familiar... NVIDIA goes with a dual-chip solution for PCI-E2.0 while AMD/ATI goes native PCI-E2.0 (remember PCI-E and AGP?)
Is NVIDIA shortcutting PCIe 2.0? :(
Watch nvidia create a na(t)ive pci_e 2.0 shirt if that's true:ROTF:Quote:
Originally Posted by Shadowmage
look at the capacitor on the right. BR04 isn't that largeQuote:
Originally Posted by RaZz!
this is pretty much what asus uses on the blitz to get 8x/8x, and hat sapphire and others use on their dualgpu cards to split the pciE lanes... i dont think itll have a big impact on performance if at all... but its very weird that nvidia went for an extra chip.
this sounds like 780 itself will be a pretty huge chip.
there's no 780i chipset:)Quote:
Originally Posted by saaya
http://www.xtremesystems.org/forums/...d.php?t=160521
NoOooOoooOooOOoooooOooOoo :,(
so 780 will be buggy 680 with another possibly buggy chip hooked up to it?
what the hell nvidia? :(
lets pray this is just some ES sample for qualification and there is a real 780 chipset, one single chip, with bugfixes and no extra pciE 2.0 add on chip.
Actually another chip for PCI-E 2.0 only would be a good idea, if it was connected with Hyper Transport to MCP and SPP (and if it wasn't so big and hot!). That way SPP would be only for CPU & RAM and probably would clock better putting out less heat.
true... and most people dont ned pciE 2.0, so it DOES make sense to have an extra chip for it so you dont put extra transistors on the chip that most boards dont use... i still dont like this solution... unless, like you said, its connected directly to the cpu, that would be nice...
MCP chip + SPP chip with native PCIe 2.0will be C73 (nForce 790i SLI) next year! This generation of nForce 780i SLI has MCP chip + SPP chip + PCIE 2.0 chip ... this info is minimaly week out ...
please tell me there will be a new revision of the 680 chipset with at least some of the bugs fixed :(