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FZ1
02-10-2006, 07:29 AM
I have something interesting happening...I was running for weeks at the settings below:

FSB - 317
LDT - x3
CPU/FSB Ratio - x9
Vcore - 1.450 x 110%
LDTv - 1.30
CHPv - 1.6
vDIMM - 2.6

DRAM Frequency Set - 166 (DRAM/FSB:5/06)
Command Per Clock (CPC) - Enable
CAS Latency Control (Tcl) - 3.0
RAS# to CAS# delay (Trcd) - 04 Bus Clocks
Min RAS# active time (Tras) - 08 Bus Clocks
Row precharge time (Trp) - 04 Bus Clocks
Row Cycle time (Trc) - 07 Bus Clocks
Row refresh cyc time (Trfc) - 14 Bus Clocks
Row to Row delay (Trrd) - 03 Bus Clocks
Write recovery time (Twr) - 02 Bus Clocks
Write to Read delay (Twtr) - 02 Bus Clocks
Read to Write delay (Trwt) - 03 Bus Clocks
Refresh Period (Tref) - 3120 Cycles
Write CAS Latency (Twcl) - 01
DRAM Bank Interleave - Enabled

DQS Skew Control - Auto
DQS Skew Value - 0
DRAM Drive Strength - Level 7
DRAM Data Drive Strength - Level 3
Max Async Latency - 8.0ns
DRAM Response Time - Normal
Read Preamble Time - 5.0ns
IdleCycle Limit - 256 Cycles
Dynamic Counter - Disable
R/W Queue Bypass - 16 x
Bypass Max - 07 x
32 Byte Granularity - Disable(8 Bursts)

Then, I received a new 170 CPU (different stepping) so I popped it in (cleared CMOS etc) and did some OC testing and benching. Removed the new chip and replaced the one I had in before. Cleared CMOS etc and I had issues booting to Windows at the same settings (above) that I had been running. I was having a lot of trouble and long story short, I re-flashed the BIOS. After that, I could boot to windows but only running a bigger divider. After looking at A64 tweaker settings, I ended up figuring out that my Max Async Latency & Read Preamble Time had to be raised.

Max Async Latency - 8.0ns -> 10ns
Read Preamble Time - 5.0ns -> 6.5ns

Any idea why this changed? Seems very weird. I was even abel to tighten some other timings but these won't go any lower without causing issues. Looking at other user timings HERE (http://www.dfi-street.com/forum/showthread.php?t=41953) everyone is running these timings lower and some even at a higher bandwidth.

I'm still running @ 259 which is great but it bothers me that I can't figure out a possible root cause.

GSKILL TECH
02-10-2006, 08:38 AM
I have something interesting happening...I was running for weeks at the settings below:

FSB - 317
LDT - x3
CPU/FSB Ratio - x9
Vcore - 1.450 x 110%
LDTv - 1.30
CHPv - 1.6
vDIMM - 2.6

DRAM Frequency Set - 166 (DRAM/FSB:5/06)
Command Per Clock (CPC) - Enable
CAS Latency Control (Tcl) - 3.0
RAS# to CAS# delay (Trcd) - 04 Bus Clocks
Min RAS# active time (Tras) - 08 Bus Clocks
Row precharge time (Trp) - 04 Bus Clocks
Row Cycle time (Trc) - 07 Bus Clocks
Row refresh cyc time (Trfc) - 14 Bus Clocks
Row to Row delay (Trrd) - 03 Bus Clocks
Write recovery time (Twr) - 02 Bus Clocks
Write to Read delay (Twtr) - 02 Bus Clocks
Read to Write delay (Trwt) - 03 Bus Clocks
Refresh Period (Tref) - 3120 Cycles
Write CAS Latency (Twcl) - 01
DRAM Bank Interleave - Enabled

DQS Skew Control - Auto
DQS Skew Value - 0
DRAM Drive Strength - Level 7
DRAM Data Drive Strength - Level 3
Max Async Latency - 8.0ns
DRAM Response Time - Normal
Read Preamble Time - 5.0ns
IdleCycle Limit - 256 Cycles
Dynamic Counter - Disable
R/W Queue Bypass - 16 x
Bypass Max - 07 x
32 Byte Granularity - Disable(8 Bursts)

Then, I received a new 170 CPU (different stepping) so I popped it in (cleared CMOS etc) and did some OC testing and benching. Removed the new chip and replaced the one I had in before. Cleared CMOS etc and I had issues booting to Windows at the same settings (above) that I had been running. I was having a lot of trouble and long story short, I re-flashed the BIOS. After that, I could boot to windows but only running a bigger divider. After looking at A64 tweaker settings, I ended up figuring out that my Max Async Latency & Read Preamble Time had to be raised.

Max Async Latency - 8.0ns -> 10ns
Read Preamble Time - 5.0ns -> 6.5ns

Any idea why this changed? Seems very weird. I was even abel to tighten some other timings but these won't go any lower without causing issues. Looking at other user timings HERE (http://www.dfi-street.com/forum/showthread.php?t=41953) everyone is running these timings lower and some even at a higher bandwidth.

I'm still running @ 259 which is great but it bothers me that I can't figure out a possible root cause.
swap a cpu and not working any more?
do you swap back and see that timing still works or not..
that is weird to me too....
seem like the cpu issue.... :(

-----
the pic of girl looks good :)

FZ1
02-10-2006, 10:06 AM
Yeah, I'm back to the original chip. It's really strange. I wonder how much impact the increase in values have on the performance?

BTW - That's Penelope Cruz *sigh*

slavearm
02-22-2006, 11:47 AM
I am currently using 2GB HZ on my rig, but 280 is having some slight stability issues. I am currently running them at the same settings as your 317 but with 1T memory and 2.75v.... should I lower the voltage to get better results? Normally I would be inclined to just go up to 2.8 and see if that resolves my little bit of stability issues.

GSKILL TECH
02-22-2006, 01:55 PM
well i bet if you lower the voltage, it will run as good as 2.75 now :)

slavearm
03-29-2006, 01:33 PM
You are 100% correct. I am down to 2.65 and it is running no worse, nor did it require me to lower my clockspeed for the ram.