SIS 655 better than granite bay? (asus p4sdx)

[tombman]

Hm, what do you guys think, will it beat the intel dual channel chipset?

It offers pc 2700 ram support and agp 8x ..

[john433i]

I would go for the Intel chipset over the SIS simply because SIS's overclocking record is not all that great compared to Intel's. The features of the chipsets are similar from what I've seen aside from memory support - both have AGP8X and USB2.0 support, though the GB is lacking native IEEE1394 support. Hopefully the Abit Granite Bay board will have a divider to compensate for the lack of official PC2700 support, although I have heard reports that the Granite Bay chipset itself only supports the 1:1 divider.

[subscience]

Originally posted by john433i
I have heard reports that the Granite Bay chipset itself only supports the 1:1 divider.

I still don't understand for the need of a 3:4 divider. The RAM bandwidth is nearly perfectly matched up with CPU bandwidth with the DCDDR (and RAMBUS) motherboards. Giving the RAM more bandwidth via a 3:4 ratio won't help the CPU because it can only take so much.

Right? Or am I completely wrong?

sub.

[john433i]

Originally posted by subscience
I still don't understand for the need of a 3:4 divider. The RAM bandwidth is nearly perfectly matched up with CPU bandwidth with the DCDDR (and RAMBUS) motherboards. Giving the RAM more bandwidth via a 3:4 ratio won't help the CPU because it can only take so much.

Right? Or am I completely wrong?

sub.

You are correct that, in theory, the dual channel DDR should be able to keep up with the Pentium 4's FSB. In reality, though, some of this bandwidth is lost. See tbreak's MSI GB review for example. (http://www.tbreak.com/reviews/article.php?cat=&id=166&pagenumber=5) At the default FSB of 533(133*4), the P4 needs about 4267MB/s of bandwidth to be fully taken advantage of. The DCDDR theoretically supplies 4267MB/s, but tbreak's Sandra scores show 3357MB/s. This shows that Intel's Granite Bay chipset loses about 22% of its efficiency at default clocks. This loss of efficiency is why GB mobos would benefit from a 3:4 divider.

[subscience]

Ah... Ok, thanks for clearing that up, john433i

[deeznuts]

john433i, i think you got it wrong. a 3:4 ratio, in my opinion, will not help much at all. Sandra's scores are really bad for guaging the efficiency of GB or RDRAM for that matter. theoretical throughput of the P4 at 133/533, DCDDR 2100, and PC1066 is all 4.2GB/s. sandra usually shows throughput at 3.3GB/s. that is undisputed.

however, how do we know that it is the chipset (DCDDR or RDRAM) that is limiting the bandwidth, and not the P4 itself? do you have proof that the P4 is capable of putting through 4.2GB/s and the RDRAM (which intel specifically chose before because it provided enough bandwidth) and DC DDR is choking it? i think that the P4 is not capable of putting through 4.2GB/s of memory on a 133/533 bus, hence not getting higher scores in Sandra. therefore, anything other than a 1:1 ratio would be overkill, and running asynch would also hurt performance a bit as well.

i do recall a person more knowledgeable in this stuff (EE, etc.) saying that you do not need more than 4.2GB/s memory on the chipset side anyway, because there are things on the CPU that take preference over memory bandwidth, but i can't remember what. i think one thing was "prefetches" or something of that nature. what this means is even though the P4 quad-pumped bus can handle 4.2GB/s, some of that bus is already allocated to prefetches and stuff, so memory throughput would never reach 4.2GB/s anyway.

maybe *foo can elaborate if he reads over here.

[deeznuts]

here is a quote from anantech on this very topic


The final and most interesting board on display in the ECS showroom was their L4S55A based on the SiS 655 chipset. Granite Bay has already launched, but SiS still plans to have stiff competition for Intel's latest dual DDR chipset. Dubbed the SiS 655, this chipset supports dual DDR333 memory, meaning motherboards based on the 655 chipset will have a 4:5 divider in the BIOS that enables 333MHz memory speed assuming you're using a 533MHz FSB processor. However, having dual DDR333 may not be beneficial, as this would offer well over 1GB/s more than the P4's FSB can handle and could result in latency penalties which would lower performance versus dual DDR266 mode.

taken Here (http://www.anandtech.com/showdoc.html?i=1751&p=3)

[ryanpgroovy]

the 655 offers a 1:2 divider if mobo manufacturers decide to use it is another thing

latency problems with the sis chipset are less likely take the 648 which supports a 1:2 divider it shows a solid improvement with async memory from any bus speed.

I have a lot to say about this maybe I should write an article

[deeznuts]

Originally posted by ryanpgroovy
the 655 offers a 1:2 divider if mobo manufacturers decide to use it is another thing

latency problems with the sis chipset are less likely take the 648 which supports a 1:2 divider it shows a solid improvement with async memory from any bus speed.

I have a lot to say about this maybe I should write an article

you cannot compare the 648 it is apples and oranges. the reason that the 648 has improved performance running asynch on a 4:5 divider (it is not 1:2 AFAIK) is because DDR in a single channel application deprives the P4 of memory bandwidth. so the extra bandwidth of a 4:5 divider overcomes latency problems.

with dual channel DDR there is already enough bandwidth while running synch - 1:1. by going to an asynch bus 4:5, you will give the P4 extra bandwidth which it doesn't need, and introduce latency problems.

of course, since nobody, and i mean nobody has seen DC DDR with asynch bus, we don't know for sure either way, but that is the reasoning behind my theories.

[chainbolt]

Originally posted by deeznuts
you cannot compare the 648 it is apples and oranges. the reason that the 648 has improved performance running asynch on a 4:5 divider (it is not 1:2 AFAIK) is because DDR in a single channel application deprives the P4 of memory bandwidth. so the extra bandwidth of a 4:5 divider overcomes latency problems.

with dual channel DDR there is already enough bandwidth while running synch - 1:1. by going to an asynch bus 4:5, you will give the P4 extra bandwidth which it doesn't need, and introduce latency problems.


EXACTLY! The asyncronous FSB:RAM ratio is nothing else than a provisional solution. And with dual channel in 1:1 you get anyway more than with even asyn in single channel.

[ryanpgroovy]

ok

The point was that async does not have to provide as crappy of performance as it does with the KT400 chipset not that it provides worse performance than sync.

Instead of getting into an arguement maybe I can publish some information to help people out.

All this talk I see always revolves around maximum theoretical bandwidth.

Bah
When you all see the new chipsets , you will all know what I mean

[deeznuts]

Originally posted by ryanpgroovy
ok

The point was that async does not have to provide as crappy of performance as it does with the KT400 chipset not that it provides worse performance than sync.



i know your point, but i showed you how the point was sort of irrelevant with regards to granite bay with the P4. plain and simple, running asynch will slow performance because of introduced latency. with single channel DDR, you don't see a decrease because it is outweighed by the benefit of extra bandwidth. with dual channel, P4 doens't need any more bandwidth, and will probably not be faster on account of it, but may be slower because of said latency.

[Phalanx28]

OC Workbench has discovered the hidden 3:4 memory divider (or bug in EasyTune) in the 8INXP and produced a new Sandra memory score.

Note that the DDR354 score is reported to be 3557/3356, however I believe they mean 3357/3356 as that's the score they have in the rest of the review.

From what I can tell, they appear to be saying that DDR354 is enabled by default. Or, it's simply a mistake.

http://www.ocworkbench.com/2002/gigabyte/8inxp/8inxpp2a.htm

Take it from here. :)

Phalanx28

[IncogNEgro]

Sis dont make good oc chipsets, they try but they dont succed. the 648 is good but cant touch i845e in ocin goodness

[deeznuts]

Originally posted by Phalanx28

Note that the DDR354 score is reported to be 3557/3356, however I believe they mean 3357/3356 as that's the score they have in the rest of the review.



i don't know man, that is one poorly written page, it almost makes no sense. does anybody pay attention to rules of english anymore?

you say that the DDR354 score is reported to be 3557/3356 (i know the mistake i see it too) but on that page you linked, they reported this as their DDr266 score. here is the direct quote


After tuning it to DDR266 using Easytune4, Sisoft Sandra records 3289/3254 compared to its previous record of 3557/3356.[/b]
i can't make out anything they are trying to say on that page.

[Phalanx28]

What I believe they are saying is that, if this DDR354 divider exists, it appears to be enabled by default if you have EasyTune installed.

So, their initial scores were the 33xx/33xx, which were mistakenly printed on that page to be 35xx/33xx. But, when they set the memory to DDR266 speeds, with EasyTune, they received 32xx/32xx.

Make sense? :)

EDIT:

I've asked Abbas to investigate a bit further as he just reviewed the board.

http://www.tbreak.com/forums/showthread.php?s=&threadid=13384

He confirmed that EasyTune reports the RAM running at DDR354 speeds as well as the messed up PCI/AGP clocks. He also seems to think that EasyTune is buggy at the moment and any gain in performance could be due to the 'Top Performance' option in the BIOS - which basically overclocks the FSB to 139MHz.

Perhaps this DDR354 option is a mislabeled 'Top Performance' setting in EasyTune.

I don't know. :)

REEDIT:

Now I do know. Gigabyte has stated that EasyTune must be updated to work properly with the 8INXP.

http://www.tbreak.com/forums/showthread.php?s=&postid=124871#post124871

Phalanx28

[deeznuts]

heh, man that was umm, funny lol.