WPCREDIT tweaks for the A64

[Fa1con]

Sry to put all these questions on ya but i have a MSI K8T Neo board w/out the AGP/PCI lock and i dont have the money to buy another board with the lock in it. Is there any way what so ever that i can lock the agp/pci so i dont have to pay for a new board. Thank You

[overanxious]

Thanks, CodeRed. NOt only did you develop the prog, you're also the problem solver. Very cool.

Now to figure out what I'm doing wrong. But first, I've got to get my clocks working in Clockgen-they've grayed out, and they weren't at first.

[Fa1con]

Sry to put all these questions on ya but i have a MSI K8T Neo board w/out the AGP/PCI lock and i dont have the money to buy another board with the lock in it. Is there any way what so ever that i can lock the agp/pci so i dont have to pay for a new board. Thank You

[IvanAndreevich]

Falcon
No.

overanxious
And how are you planning out doing that?

[overanxious]

I haven't figured it out yet. Why I could at one time use the clocks and now I can't is beyond me. I'm sure I changed something in the bios that has bprevented me from doing so. I had changed the bios FSB back to 800 for stability, no clocks; so I knocked it back to 200 in bios, and still no clocks. Hmmm...

Are you having the same prob? If you figure it out, shoot me a message. We need to hope Asus gets off their A$$es and make a decent OCing bios, or at least a beta release. There is one beta version out in cyberspace somewhere, but it was in Dutch or something, and I didn't want my bios worded in Dutch.

[overanxious]

Got it! To ungray the clock mode on Clockgen for the K8VSE, choose "auto" for performance mode (not standard or turbo).

[GenTarkin]

Originally posted by IvanAndreevich
Falcon
No.

overanxious
And how are you planning out doing that?
In response to ur "no" Ive been thinking and brought the idea up with CodeRed that I noticed through the NF3 150's chipset release manufactures have been enabling the lock on some boards...simply by upgrading the "old" bioses and adjusting the FSB +1mhz in the bios engages the lock and other ways, I am since then wondering( I have a Shuttle XPC SN84G4V2 and it does not feature the lock, but has the 150 chipset)
I am actually beginning to believe it may be possible to lock the PCI simply by finding a register in one of the PCI Devices or somewhere with WPCREDIT.
It would be a heck of a find if this turned out to be the case. I just wish I knew where to start. CodeRed pointed out that the register may be different for every manufacture...makes it harder and would be nice if it wasnt =/
I think a way or place to start would be with people who have boards that have originally not had the lock engaged, then adjusted something or upgraded bios and had the lock engage, compare those 2 PCI dumps in WPCREDIT and see if there is any noticeblue helpfull difference.

[andL64]

hi folks!

thx to the great brain who uncovered this :D

amd64 tweaker is great!!!


i got the epox kda3+ and i only get 2,76-2,78 Vdimm...
and tested some with the tweaker since i got

Corsair 512MB DDR3200 CL2 /CMX512-3200C2 / XMS3202v1.1

this is bh-6 correct me if i m worng plz!

so this mem. only boots on 333 mhz :( but its not so bad its only worse because i can only set my multi to 8x (clockgen locks) in bios and i can only get 2250mhz so max what i can do is 225 like this i ve run the memory @ 2-2(3)-2-5 and it was quite stable in benches and win 24/7 but in games like d3 it cuts the game or i get bluescreens...

every time i set any other MEMCLK freq. it freezes i dont do any other refresh rate (tref) and only tested "ordinary" latency and Trc Trcf (10 12 ordinary and i tried 10/16 12/16)

i ll test some more but i cant set "bad" timings then the mem/board wont boot... (cause of mem. error...)

need more vdimm so i ll get 4 the dfi board!

on 200 i can run 2-2-2-5 with that vdimm and 245-248x9 @ 333

seEn andL

[cpuz]

Originally posted by overanxious
Got it! To ungray the clock mode on Clockgen for the K8VSE, choose "auto" for performance mode (not standard or turbo).

Nice find overanxious.
I was looking for this issue for a long time.
Thanks !:thumbsup:

[cpuz]

I've made some additional testing on a K8V.
Indeed, as long as the Performance Mode is set to "Turbo" or "standard" in the BIOS, there is no way to access the PLL anymore. Only the "Auto" setting allows the access.
I've some difficulties to find a workaround, so for the moment the only way to make clockgen work is to choose "Auto".

[Dekal]

Nice work!!! I haven't any A64 system, but anyway, i'm impressed of your development! And again, i love that forum. :toast:

[jess1313]

Originally posted by GenTarkin
In response to ur "no" Ive been thinking and brought the idea up with CodeRed that I noticed through the NF3 150's chipset release manufactures have been enabling the lock on some boards...simply by upgrading the "old" bioses and adjusting the FSB +1mhz in the bios engages the lock and other ways, I am since then wondering( I have a Shuttle XPC SN84G4V2 and it does not feature the lock, but has the 150 chipset)
I am actually beginning to believe it may be possible to lock the PCI simply by finding a register in one of the PCI Devices or somewhere with WPCREDIT.
It would be a heck of a find if this turned out to be the case. I just wish I knew where to start. CodeRed pointed out that the register may be different for every manufacture...makes it harder and would be nice if it wasnt =/
I think a way or place to start would be with people who have boards that have originally not had the lock engaged, then adjusted something or upgraded bios and had the lock engage, compare those 2 PCI dumps in WPCREDIT and see if there is any noticeblue helpfull difference.

I have this same rig, I dont know if it locks but I can set bios to 201 & use clockgen. It will run stable up to 315 HTT, I always thought that maybe it was locking. I have know way of verifing this but it is know prob to run my OCZ PC4400 at 1:1 ratio on a 270 HTT bus.

If you would like some screen shots just let me know.

[mikead_99]

So I've run into a problem that's hopefully easy to resolve. I installed the .031 version and installed by just extracting it to the desktop and executing. The first time I ran it, I was able to view my config perfectly. I wanted to reboot for a 3dm01 run, and after I did, I re-launched the tweaker and got all of those reserved fields, bad values, etc. Haven't seen anything different since. I have not had a previous version installed so I'm just wondering what my conflict might be. Maybe CPU-Z (1.23)? If this helps, this is on an Epox 8kda3j, 3700+, and a Win2k Pro install. It looks like a damn powerful utility, I'm hoping someone can help me resolve this.

Thanks,
Mike

[CodeRed]

Originally posted by mikead_99
So I've run into a problem that's hopefully easy to resolve. I installed the .031 version and installed by just extracting it to the desktop and executing. The first time I ran it, I was able to view my config perfectly. I wanted to reboot for a 3dm01 run, and after I did, I re-launched the tweaker and got all of those reserved fields, bad values, etc. Haven't seen anything different since. I have not had a previous version installed so I'm just wondering what my conflict might be. Maybe CPU-Z (1.23)? If this helps, this is on an Epox 8kda3j, 3700+, and a Win2k Pro install. It looks like a damn powerful utility, I'm hoping someone can help me resolve this.

Thanks,
Mike

Try deleteing the following registry key, and reboot:
HKLM\SYSTEM\CurrentControlSet\Services\cpuz

Then run the tweaker from your install directory. Make sure you have admin priveleages and write permissions to the install dir.

[mikead_99]

Originally posted by CodeRed
Try deleteing the following registry key, and reboot:
HKLM\SYSTEM\CurrentControlSet\Services\cpuz

Then run the tweaker from your install directory. Make sure you have admin priveleages and write permissions to the install dir.

Thanks! I saw that tip for correcting previous install issues and planned on trying it. I'll post back in a few hours after I get a chance to try it and let you know how it goes.
:toast:

[IvanAndreevich]

GenTarkin
He was talking about K8T800 chipset :) I don't think it's possible for that chipset. However, for NF150 - maybe :D

[mikead_99]

Just wanted to follow up. The next time I booted up, the tweaker read the registers fine again, just like the first time I ran it. I didn't have to edit the registry at all. Doesn't make sense to me since it wasn't reading correctly with several previous reboots, but I'm happy now.

[GenTarkin]

Originally posted by jess1313
I have this same rig, I dont know if it locks but I can set bios to 201 & use clockgen. It will run stable up to 315 HTT, I always thought that maybe it was locking. I have know way of verifing this but it is know prob to run my OCZ PC4400 at 1:1 ratio on a 270 HTT bus.

If you would like some screen shots just let me know.
damn urs runs stable that high?!?!?!
I notice in clockgen my PCI bus raises when I OC does urs?
I think it actually is because my Western Digital 160JB will start corrupting around 38mhz PCI bus...and its been that far and has corrupted =(
AND ur using SATA too which supposedly hates PCI overclocks more then PATA....
HRM....

[HKPolice]

Is there any way to adjust Interleaving settings?

Seems like most BIOSes disables it with 2 or more modules: http://www.digit-life.com/news.html?108190#108190

[CodeRed]

Originally posted by HKPolice
Is there any way to adjust Interleaving settings?

Seems like most BIOSes disables it with 2 or more modules: http://www.digit-life.com/news.html?108190#108190

Not from within Windoze.

If you change the intyerleave then you change the order of physical memory addresses which would totally screw the current memory map.

[HKPolice]

Originally posted by CodeRed
Not from within Windoze.

If you change the intyerleave then you change the order of physical memory addresses which would totally screw the current memory map.

Is there any way to at least detect if interleaving is enabled? CPU-Z's bank interleave is greyed out :(

Any way to mod the interleave via modded BIOS?

[IvanAndreevich]

There is an Interleave driver for old VIA chipsets (PIII, K6) which enables memory interleave. So I guess there IS a way. It requires a restart, though.

[HKPolice]

I think my K8NS turns off interleave by default, memtest86's benchmark is about 300MB/s lower than the same settings on an AN50R :(

[CodeRed]

I think my K8NS turns off interleave by default, memtest86's benchmark is about 300MB/s lower than the same settings on an AN50R :(

Can you post a screenie using WPCREDIT of bus 0, device 24, function 2. From these settings I can tell you what type of interleaving, if any, is being used.

I may add an interleave info page in the next version of A64 Tweaker ... or just send the info the Franck so he can incorporate it into CPU-Z.

[HKPolice]

No probs: http://img74.exs.cx/img74/8086/wpcredit.jpg

[CodeRed]

No probs: http://img74.exs.cx/img74/8086/wpcredit.jpg

As you suspected

2x512MB (double sided) in slots 1 & 2
contiguous mapping

that means no interleaving :(

[HKPolice]

As you suspected

2x512MB (double sided) in slots 1 & 2
contiguous mapping

that means no interleaving :(

What do I look for to indicate interleaving?

How does it affect overall performance?

[HKPolice]

There is an Interleave driver for old VIA chipsets (PIII, K6) which enables memory interleave. So I guess there IS a way. It requires a restart, though.

If it can be done via Driver, I think WPCREDIT should be able to do the same thing without causing windows to crash? :confused:

[CodeRed]

If it can be done via Driver, I think WPCREDIT should be able to do the same thing without causing windows to crash? :confused:

On the A64 you have to shutdown the DRAM controller whilst programming the DRAM CS & Mask registers. These control interleaving. Also once the interleaving is enabled the pyhsical memory map gets changed, so windows would be totally screwed.

There may be a way to do it from a DOS program (all running from cache), then jump into a bootstrap routine which bypasses the BIOS mem setup and loads windows, but its a lot easier to do it from the BIOS.

Checking for interleave is a bit messy, the DRAM CS and Mask registers tell the story. Get 26094.pdf from the AMD web site and read pages 71-79. It explains how these registers work. The easiest way to determine if the banks are interleaved is to check if the Base addresses for each consequetive bank are offset by 8 bytes.

[HKPolice]

Damnn, i couldn't even begin to comprehend what bits to be looking for :(

Could you please make some kinda prog to select upto 8way interleave? :slobber: It should work with all A64s I assume?


On the A64 you have to shutdown the DRAM controller whilst programming the DRAM CS & Mask registers. These control interleaving. Also once the interleaving is enabled the pyhsical memory map gets changed, so windows would be totally screwed.

There may be a way to do it from a DOS program (all running from cache), then jump into a bootstrap routine which bypasses the BIOS mem setup and loads windows, but its a lot easier to do it from the BIOS.

Checking for interleave is a bit messy, the DRAM CS and Mask registers tell the story. Get 26094.pdf from the AMD web site and read pages 71-79. It explains how these registers work. The easiest way to determine if the banks are interleaved is to check if the Base addresses for each consequetive bank are offset by 8 bytes.

[CodeRed]

Damnn, i couldn't even begin to comprehend what bits to be looking for :(

Could you please make some kinda prog to select upto 8way interleave? :slobber: It should work with all A64s I assume?

If I could make a program to select the interleave I would. But unfortunately I belive it can be done from within windows.

Eventually, I will add a mem interleave display to A64 Tweaker. At least this will show you your mem configuration.

[DEI Rocks]

Untill such time as Code Red can incorportate that bit into A64 Tweaker, RightMark Memory Analyzer v3.4 appearently shows interleaving status on my msi 250gb.

[-TB-]

is there a way to disable the 1T on the athlon 64 3200+ with C0 stepping?

[DEI Rocks]

no, im afraid there isnt.

[HKPolice]

Untill such time as Code Red can incorportate that bit into A64 Tweaker, RightMark Memory Analyzer v3.4 appearently shows interleaving status on my msi 250gb.
Where does it show that?
nvm, found it

Do the DFI or MSI boards have an option to select how much interleave there is?

[DEI Rocks]

I havent found the option in the bios of my dfi or msi 250gb boards.

I would like to direct an inquiry to someone like Oskar.

[VVJ]

FOR ALL:

Everyone may use Central Brain Identifier tool for memory tweaking:

http://cbid.amdclub.ru/html/images/cpus/a643200CG3.gif

site: http://cbid.amdclub.ru
link: http://cbid.amdclub.ru/files/cbid74b.zip

[Geforce4ti4200]

A64 Tweaker is used to get the most out of your A64 by allowing you full control over all the useful memory settings. Originally I wrote this because my AN50R BIOS was so lacking in memory timing options. Only the latest DFI BIOS allows such fine control over your timing options (amazing how similar the new DFI BIOS options are to those inA64 Tweaker :D ).

The ultimate goal is to have the tightest memory timings at the highest possible freq ... a good target is 2-7-12-2-2-5-2-2-1-1 (really need BH5 for this), but dont worry if you cant hit such aggressive values. Start at something like 2-10-13-2-2-6-3-3-2-2 and work your way down testing at each step.

I used SuperPi and Pifast to test the effectiveness of each change to my timings. Its best to choose a proram that really stresses memory and gives good systematic results (3DMark is a pain to tune since it varies from run to run).

I cant tell everyone what their best timings will be since it varies from RAM module to module. Some sticks work with agressive vaues others do not and you are better off with relaxed timings and higher FSB. You have to test your own sticks and see what works best for you.

Attached is a screen shot showing the values I get the best 3DMark, SuperPi and PiFast times with. My Kingston BH5 sticks run up to 274-277 MHz with these settings @ 3.6V.

PS Dont worry about the extra Link settings in V0.5XT for now ... I am still working on it ;)


w00t shaved a second off superPI im at 37s now at 235x10 with your timings in the screenshot except max async latency is at 5ns instead of 6ns, is this good? comp locks if I set that to 4ns. also that 13 is set to a 12, locks if set to 11. My goal is to get superPI to less than 30 seconds at 238x11=2.62GHz, some dude gets 31s with his stock 3000+ so I got a long way to go still. bartons dont do as well, my friend has 38s at 2.6GHz on his barton, is this a bad or good number

[CodeRed]

w00t shaved a second off superPI im at 37s now at 235x10 with your timings in the screenshot except max async latency is at 5ns instead of 6ns, is this good? comp locks if I set that to 4ns. also that 13 is set to a 12, locks if set to 11. My goal is to get superPI to less than 30 seconds at 238x11=2.62GHz, some dude gets 31s with his stock 3000+ so I got a long way to go still. bartons dont do as well, my friend has 38s at 2.6GHz on his barton, is this a bad or good number

Max async latency of 5ns is very good.

If you want a 30 sec superpi score, you'll need approx 2766 MHz (11x251) from a S754 1Mb chip. Thats a tough ask on air.

[Ragnarok]

Is it really necessary to reinvent the wheel?

[ahfung]

Max async latency of 5ns is very good.

If you want a 30 sec superpi score, you'll need approx 2766 MHz (11x251) from a S754 1Mb chip. Thats a tough ask on air.

Max async has quite some impact on performance, but there are two cases it has to relax:

1. Running more than 1 stick
2. Running at async

In my case my Hynix DT D43 can set max async to 7ns at 265MHz 2.5-3-3 for best performance. However once running 2 sticks, 8ns is a must for stability, and Vdimm won't help at all.

And at any non 1:1 ratio, 7ns is no go.

With only 1 stick, setting to 8ns won't let me go any higher.
Setting Max async to Auto in Lanparty BIOS is equal to 7ns in my case, for both 1 or 2 sticks.

Refresh rate (Tref) will have a healthy boost when set to 166 MHz 1.95us, but it might not apply to all memory.

My $0.04 :toast:

[bias_hjorth]

geforceti4200
As codered said you probally need around that speed on a 1mb.. But it has to be on 1:1 - Otherwise there´s no chance..
so: 238x11=2.62GHz would not get you anyway near 30sec.. more likely 34 or 33 :)

And you friends barton is a bit slow -- I guess he´s using a fsb around 230 to get that result :)

[Geforce4ti4200]

"Refresh rate (Tref) will have a healthy boost when set to 166 MHz 1.95us, but it might not apply to all memory."


it says reserved value to me, does this mean unavailable or something? I also have the option to set ras-cas delay to 1, but im too chicken to try, should I? its also a reserve value and if it doesnt freeze will this help any?

[CodeRed]

Max async has quite some impact on performance, but there are two cases it has to relax:

1. Running more than 1 stick
2. Running at async

In my case my Hynix DT D43 can set max async to 7ns at 265MHz 2.5-3-3 for best performance. However once running 2 sticks, 8ns is a must for stability, and Vdimm won't help at all.

And at any non 1:1 ratio, 7ns is no go.

With only 1 stick, setting to 8ns won't let me go any higher.
Setting Max async to Auto in Lanparty BIOS is equal to 7ns in my case, for both 1 or 2 sticks.

Refresh rate (Tref) will have a healthy boost when set to 166 MHz 1.95us, but it might not apply to all memory.

My $0.04 :toast:

On my (now dead) AN50R / 3400+ running async didnt affect my mem timings. I could run max async = 5ns up to 250 MHz and 6ns up to 276 Mhz. Although I did get the same problems with two sticks @ 6ns. For stability with two sticks I needed to use 7ns.

I have never observed any significant performance boost by changing Tref.

[eagle101]

Gents,

I've just found a way to really boost your A64 performance using WPCREDIT.

The A64 mem controller registers can be accessed using WPCREDIT using Bus #0, Device #24, Function #2. There are 4 main registers that I have been playing with:

0x88 DRAM Timing Low
0x8C DRAM Timing High
0x90 DRAM Configuration Low
0x94 DRAM Configuration High

The timings registers set all the DRAM timings params (as you'd expect), but there are many more than most BIOSes will show you. The best performance is obtained using:

Column Address Strobe # (CAS) = 2.0
Row Cycle Time (Trc) = 8
Row Refresh Cycle Time (Trfc) = 12
RAS# to CAS# delay (Trcd) = 2
Row to Row delay (Trrd) = 2
Min RAS Active Time (Tras) = 5
Row Precharge Time (Trp) = 2
Write Recovery Time (Twr) = 2
Write to Read Delay (Twtr) = 1
Read to Write Delay (Trtw) = 1

I normally write this as 2-8-12-2-2-5-2-2-1-1 for convenience ... not that rememering all those values is easy.

To set the mem timings to the above values change the registers as follows:
reg 0x88 to 0x02522311
reg 0x8C to 0x00000B00
(use 32 bit mode in WPCREDIT)

I have only begun to experiment with the Config registers but some of the things I have tried are setting the Asynchronous Latency Value (controlled by reg 0x94). Normally my BIOS sets this to 7ns, but when I dropped it to 4ns there was a healthy boost to my memory performance. To do this set bits 0-3 of reg 0x94 to 0100 (binary) (4 for those who cant read binary).

Just to make things more interesting, bits 22-20 of reg 0x94 control the DRAM speed (200, 166, 133, 100 Mhz). There are several reserved values, and I decided to try 110. Surprisingly this gave me a mem speed somewhere inbetween 200 and 166 MHz. This may be a 183 Mhz mem option I need to test some more to confirm these results.

Oh, 2T is also easy to disable :D

We no longer have to worry about BIOS updates, its all there in the DRAM registers. Over time I may write a simple windows app to set all this up in a user friendly fashion ... just need to find the time.

Only thing I cant do is set the bank interleave. Doing so would reorder the physical memory locations ... not something I think windoze would be happy with :p:

Try it and compare your before and after benchies with something like pifast or superpi and you'll see the boost.

============================================

V0.31 of A64 tweaker is now ready (win 64 bit compatible now)
jump to this post
http://www.xtremesystems.org/forums/showthread.php?postid=505345#post505345

or just download :a64tweaker_V031.zip (http://users.tpg.com.au/spark69/a64tweaker/a64tweaker_V031.zip)
do i have to be running w64 or can i do the tweek with wxp?

[CodeRed]

do i have to be running w64 or can i do the tweek with wxp?


A64 Tweaker works in Win2k, XP, XP-64, 2003, and 2003-64

[Samael]

I searched around for quite long and i didnt find anything regarding the Corsair Pc4400 (hynix -d5 IC's) and the setting we should use on them.
Τhe question is how to tweak them to get a really high fsb OR get a really good score with tight timmings.
My MOBO is a DFI Nf3 UT and i have a CO a64,so 1T only ;)
Any help would be greatly apreciated

[eagle101]

A64 Tweaker works in Win2k, XP, XP-64, 2003, and 2003-64
codered i was using the ati driver:6.14.10.6490,things were going way good
due to zip drive problem i reformated,now the drivers are not on the sites the 6490?
i didnt save it anywhere is there any magic you can due.... :)

[CodeRed]

codered i was using the ati driver:6.14.10.6490,things were going way good
due to zip drive problem i reformated,now the drivers are not on the sites the 6490?
i didnt save it anywhere is there any magic you can due.... :)

Just ask around or search the standard mirrors. I am sure someone around here has a copy ... I could do with a copy too ;)

[eagle101]

Just ask around or search the standard mirrors. I am sure someone around here has a copy ... I could do with a copy too ;)
thanks

[thomase]

Can someone take a look at section 3.3.13 of the BIOS and Kernel Developer's Guide? This register has some Read-Only bits which specify the valid settings (there are 16 available) for LDT Link Frequency. Are any of the "reserved" settings available? If so, what LDT multipliers do they correspond to? Are there any "hidden" settings in addition to 1x, 2x, 3x, 4x, and 5x? Even if additional settings are available, it may be the case that chipset support is needed in order to get it to work. Both sides need to communicate at the same rate.

EDIT: I found the following in the HyperTransport 2.0 specification doc.

Table 54. Link Frequency Bit Field Encoding
Link Frequency Encoding Transmitter Clock Frequency (MHz)
0000 200 (default)
0001 300
0010 400
0011 500
0100 600
0101 800
0110 1000
0111 1200
1000 1400
1001 1600*
1010 to 1110 Reserved
1111 Vendor-Specific
Note: Electrical requirements of the link above 1400MHz have not been fully specified at this time.

I guess there are no in-between multipliers other than 1.5x and 2.5x. The "Vendor-Specific" setting is 100 MHz (from the BIOS and Kernel Developer's Guide).

[CodeRed]

Thomase

there is version 0.5XT of A64 tweaker which allows you to view all the link parameters, but uinfortunately setting them has no effect unless the link or CPU is reset. Since the LDT speed doesnt seem to affect benchmarks a great deal I didnt persue this line of tweaking.

[digitalfrost]

I enabled STPGNT (Bus 0 Device 24 Function 3 Register 80 set to 01). But it didn't help my idle Temps and made MSI CoreCenter lockup the whole comp, maybe its useful on other configurations.

[THunDA]

Try deleteing the following registry key, and reboot:
HKLM\SYSTEM\CurrentControlSet\Services\cpuz

Then run the tweaker from your install directory. Make sure you have admin priveleages and write permissions to the install dir.


Awsome.. that fixed it for me too.. :)

Great program thanks alot..

[swaaye]

Is it possible to enable 2T Timing when it's at 1T by default? I'm trying to get my RAM up to 200Mhz from 166.

While I'm posting I might as well ask what settings are most likely to get the RAM stable. For sure Tcl, Trcd, Tras. What else is essential? Or maybe, what settings would the worst PC3200 in existence use? :)

[GenTarkin]

you mean command rate of 2T? yeah see on the right hand side where it says "2T timing" put it to enable.

now I heard somewhere that older C0 chips are not capable of 2T timing...or are 1T by default but dont like being changed to 2T or something like that.

[swaaye]

2T Timing switches back to disable when I hit apply.

What settings would be conservative for the right panel? I don't know what to make of most of those.... the left panel just requires a higher number :)

[IvanAndreevich]

C0 chips do not physically support 2T timing. swaaye check with CPUZ which Rev it is.

[fatbird2046]

hey everybody~~~~Please take a look at this page.
http://www.xtremesystems.org/forums/showthread.php?t=48448
mem clock ratio unchangedable on epox 9nda3j whatever i use wpcredit or a64tweaker~~~~

[ocmyface]

dont know if this has been addresses but if i try to set my trfc to anything below 15, which is default, it locks up immediately...

i have ocz vx btw

[VVJ]

CodeRed don't strain the brain! There is no any way to change the link frequency without support of a huge number Southbridges. I know how to change the link frequency by asserting LDTSTOP_L, but it works only with AMD-8111 I/O hub.
IvanAndreevich Ã�ðèâåò èç Ã�åëÃ:banana:ðóñè! Ñ Ã�îâûì Ãîäîì! :D

[eagle101]

CodeRed don't strain the brain! There is no any way to change the link frequency without support of a huge number Southbridges. I know how to change the link frequency by asserting LDTSTOP_L, but it works only with AMD-8111 I/O hub.
IvanAndreevich Ã�ðèâåò èç Ã�åëÃ:banana:ðóñè! Ñ Ã�îâûì Ãîäîì! :Dplease tell me what country your in?.....good day to you :thumbsup:

[VVJ]

Hi eagle101! I'm from Belarus (Eastern Europe). Happy New Year! :)

[AndreAPL]

My current timings or (defalut) w/e are 2.5-11-14-4-2-14-4-3-1-4. And also are there anything on the Configuration Parameters that i can do to help?

what kind of mems do you have ? :)

[Kriller]

I have an Neo2 and tccds sync @ 2,5-3-3-8 and 1T what should I change to get petter performance? Can't find a "guide" for the best values...

[CodeRed]

CodeRed don't strain the brain! There is no any way to change the link frequency without support of a huge number Southbridges. I know how to change the link frequency by asserting LDTSTOP_L, but it works only with AMD-8111 I/O hub.
IvanAndreevich Ã�ðèâåò èç Ã�åëÃ:banana:ðóñè! Ñ Ã�îâûì Ãîäîì! :D

I already came to that conclusion too, so I abandoned the link settings in A64 Tweaker.

[TSFroggy]

Can anyone help me figure out how to best tweak my memory settings?

I have a laptop AMD64 3700+ with 2 SODIMMs of 512 MB DDR400 Corsair memory. I currently have A64Tweaker set to 3-7-10-3-2-5-2-2-2-4 as far as timings go. What should I set the MEMCLK Frequency, Refresh Rate, etc to?

[CodeRed]

Can anyone help me figure out how to best tweak my memory settings?

I have a laptop AMD64 3700+ with 2 SODIMMs of 512 MB DDR400 Corsair memory. I currently have A64Tweaker set to 3-7-10-3-2-5-2-2-2-4 as far as timings go. What should I set the MEMCLK Frequency, Refresh Rate, etc to?

MEMCLK frequency should be set to 200 if you want 1:1 operation.
Dont worry about the Refresh Rate, leave the BIOS setting until you've figured out the rest.

[groovetek]

Tref is the DRAM refresh rate. Refresh doesnt happen that often so it doesnt affect performance to badly. The less frequency refresh rates are best for performance, but it wont make any noticeable difference

i have a k8ns-ultra 939 and alot of the options are already available in bios... with the Tref - there are all sorts of values - and I dn't know too much about how to interpret it..

if i press Enter on it, the item at the top (which usually is lowest value) says 1x1592 or some numberlike that, while 2nd from the buttom it's 4x4672, and then at the VERY bottom, it's 128...

i'm wondering which one to use will give me best performance, and will changing this affect overclockability AT ALL?

Edit: I have already figured out the rest. Oh, 1 other thing, my Trc is set to 8 at the moment because you guys say it's the best performance? Well I can set this to 7 actualy, and it seems fine to me... hmmm

[CodeRed]

i have a k8ns-ultra 939 and alot of the options are already available in bios... with the Tref - there are all sorts of values - and I dn't know too much about how to interpret it..

if i press Enter on it, the item at the top (which usually is lowest value) says 1x1592 or some numberlike that, while 2nd from the buttom it's 4x4672, and then at the VERY bottom, it's 128...

i'm wondering which one to use will give me best performance, and will changing this affect overclockability AT ALL?

Edit: I have already figured out the rest. Oh, 1 other thing, my Trc is set to 8 at the moment because you guys say it's the best performance? Well I can set this to 7 actualy, and it seems fine to me... hmmm

I didnt find that the refresh rate affects the OC much at all, but it may depend on the memory type.

The lowest refresh rate is best for performance, 15.6usec @ 200 MHz in A64 Tweaker. Not sure how the GB BIOS values relate exactly to the A64 tweaker values (from the AMD data sheets).

[goreblast]

Quick question - I am at 218 memory speed - OCZ PC3200 Plat Rev2 2x512
Timings etc using a64 Tweaker are

2-8-12-2-2-5-2-2-1-2
16x, 7x, 6ns, 5.5ns, 16clk
2.7 VDimm

Crashes at 219 - wont load windows or if you up it when in windows it crashes.

What is best parameter to slacken?

[AndreAPL]

try relaxing the +6ns, +5.5ns.

[CodeRed]

Quick question - I am at 218 memory speed - OCZ PC3200 Plat Rev2 2x512
Timings etc using a64 Tweaker are

2-8-12-2-2-5-2-2-1-2
16x, 7x, 6ns, 5.5ns, 16clk
2.7 VDimm

Crashes at 219 - wont load windows or if you up it when in windows it crashes.

What is best parameter to slacken?


Firstly make sure its the mem thats holding you back, then try a touch more voltage

if that dont work then try upping each setting indiviually until something lets you go a bit higher
eg
2-8-2-2-5-2-2-2-2 as the next step up

[Ulti]

CodeRed, i have a CG stepping 3200+, is there any way I can run 1T since I can't boot with it. I only see enable 2T timing but I don't see a 1T option.

[CodeRed]

CodeRed, i have a CG stepping 3200+, is there any way I can run 1T since I can't boot with it. I only see enable 2T timing but I don't see a 1T option.


Set the 2T option to disable :)

[Th3__W00T_GuY__]

my sys is always freezing if i press SET ?! but if i change memclock mode to 166 mhz (in bios!) it works! :rolleyes:

[enzoR]

:confused:

[skate2snow]

Is your RAM's actually able to do what you want them to do?

[ZxCs]

I cant get this setting to change to 133:
http://blood-pack.org/ao/a64.JPG

Any ideas?

Running 4 x 1gig pc2700 chips in dual channel NUMA, ECC off
Dual opteron 250s

[NiSMo]

I cant get this setting to change to 133:
http://blood-pack.org/ao/a64.JPG

Any ideas?

Running 4 x 1gig pc2700 chips in dual channel NUMA, ECC off
Dual opteron 250s

u should b able to change it in the bios under the memory settings...? unless ur mobo doesnt support that?

[ZxCs]

Mobo is a workstation/server one (Iwill DK8N) so it doesn't support memory divider settings, its main reason I'm using a64 tweaker. I have also tried lowering my HT and trying it but it still freezes when I try and set it to 133. Funnily enough it WILL go to 100 and not freeze, but it is not reported in CPU-Z and clockgen.(Overclocking still seems too stress memory at 100 setting)

[tictac]

You can check whether you have interleave enable or disable this way :toast:

http://www.xtremesystems.org/forums/attachment.php?attachmentid=23230

[likwit]

I have an Asus A8N-SLI and it seems every time I flash a new BIOS A64 stops working, the settings are all messed up (not correct) and nothing happens when I try to 'set' something different.

I already formatted twice because of this problem aaargh. Now I just got a new BIOS and it happened again.

[pazza316]

Hi all,

How do I change the dividers and hence the memory speed using this programme? On the board Bios lets me use 200 or 166 does this tweaker have any speeds inbetween which will mean I can get the best out of my CPU and memory?

Thanks for any help you can give me.

[Demoulous]

You can check whether you have interleave enable or disable this way :toast:

http://www.xtremesystems.org/forums/attachment.php?attachmentid=23230

Great find TicTac! Hope you and Red can get that into the next version.

[maedox]

Hi!
I tried the A64Tweaker yesterday. First time it worked perfectly, but I set one value a bit too low and my machine rebooted. After reboot I fired up the tweaker again, and now it just shows (as it seems to me) random numbers.
Lots of reserved values and way too high numbers. I've tried re-extracting the tweaker, and on different hard-drives, but it won't work. Changig a value to something I know is right and hitting set resets the value to sh*t. :rolleyes:
What's wrong?

My hardware is:
MSI K8N Neo2 nForce3 Ultra s939
AMD Athlon64 3000+ winchester
OCZ PC3200EL Dual rev.2

Running this at 272x9, 1,7V, 2,5-5-5-5. 100% stable.

http://mongo.biz/a64tweaker.jpg

[CodeRed]

Hi!
I tried the A64Tweaker yesterday. First time it worked perfectly, but I set one value a bit too low and my machine rebooted. After reboot I fired up the tweaker again, and now it just shows (as it seems to me) random numbers.
Lots of reserved values and way too high numbers. I've tried re-extracting the tweaker, and on different hard-drives, but it won't work. Changig a value to something I know is right and hitting set resets the value to sh*t. :rolleyes:
What's wrong?

My hardware is:
MSI K8N Neo2 nForce3 Ultra s939
AMD Athlon64 3000+ winchester
OCZ PC3200EL Dual rev.2

Running this at 272x9, 1,7V, 2,5-5-5-5. 100% stable.



delete the following registry key & A64 Tweaker
HKLM\SYSTEM\CurrentControlSet\Services\cpuz

then reboot and re-install A64 Tweaker.

It should be fine after that

[maedox]

Thanks! I actually read this whole post a few weeks ago, so i knew there were some reg-key I should delete. Couldn't find any relevant keys with words codered or a64tweaker, and then it was cpuz. :rolleyes:

Works fine now and looks like this:
http://mongo.biz/a64tweaker2.jpg
It's so hard to know what settings do what, so do you have some good tips for me?
I have to have a little relaxed settings to keep the high clock.

[likwit]

Thanks codered, I had the same problem all the time everytime I had it I reinstalled Windows LOL. This is a better solution

[charlie]

Thanks! I actually read this whole post a few weeks ago, so i knew there were some reg-key I should delete. Couldn't find any relevant keys with words codered or a64tweaker, and then it was cpuz. :rolleyes:

Works fine now and looks like this:
http://mongo.biz/a64tweaker2.jpg
It's so hard to know what settings do what, so do you have some good tips for me?
I have to have a little relaxed settings to keep the high clock.

good info

[VASkO]

If u dont want to use WPCREDIT u can built isa rom and embended it into biosfilewith cbrom... build a rom with:

header: 55 AA ; Boot Able rom
jmp init ; jump to code intialization
retf ; return far to system bios file

INIT
pushad
push eax
push edx
mov eax,0x80002184; eax=Bus0Dev2Func1,Offset 84,85,86,87
mov dx,0cf8 ; set dx as adress port
out dx,eax ; send the address to IO Space throgh dx port
mov dx,0cfc ; set dx as data port
in eax,dx ;Receive the data into eax for the address we sent through dx port
and eax,XXXXXX ; Change the data
or eax,XXXXXX ; Change the data
out eax,dx ; Send back the modded data through dx port
pop edx,
pop eax
popad
ret ; return to header

last bit; use 8 bit checksum

then install it with cbrom
cbrombiosname.bun /isa filename.bin

cheers :toast:

tictac,

would you be so kind and tell something more about this? i would like to build my custom isa option rom and include it into the bios image, but i have a few questions. Which utility to program in do you use to build these option roms? I need to change the Bypass Max, located at offset 0x93h, bit 1-3 to 111 (or 7x) and the max async latency located at offset 0x94h bit 0-3 set to 1000 (8ns). I need that to include into BIOS cause else i can't run 7-3-3-2.5 timings on TCCD. If I use A64tweaker and set that at startup together with reconfiguration of timings from 8-4-4-3 to 7-3-3-2.5, it freezes. It doesn't freeze if i first set those two parameters and then edit the timings, but i must do that every time windows boots up, so I guess it would be a solution, to set those two in the isa option rom (i could set agressive timings in BIOS then too i think).

please answer tictac, i was searching the net for how to program isa option rom but i didn't find anything.

[tictac]

tictac,

would you be so kind and tell something more about this? i would like to build my custom isa option rom and include it into the bios image, but i have a few questions. Which utility to program in do you use to build these option roms? I need to change the Bypass Max, located at offset 0x93h, bit 1-3 to 111 (or 7x) and the max async latency located at offset 0x94h bit 0-3 set to 1000 (8ns). I need that to include into BIOS cause else i can't run 7-3-3-2.5 timings on TCCD. If I use A64tweaker and set that at startup together with reconfiguration of timings from 8-4-4-3 to 7-3-3-2.5, it freezes. It doesn't freeze if i first set those two parameters and then edit the timings, but i must do that every time windows boots up, so I guess it would be a solution, to set those two in the isa option rom (i could set agressive timings in BIOS then too i think).

please answer tictac, i was searching the net for how to program isa option rom but i didn't find anything.

Compile it with Masm :toast:


@echo off
ml /AT %1.asm /Fe %1.bin /link /TINY

[VASkO]

that was fast ;)

and where do i set the data bits, i want to? is this the XXXXXXXX value in your code?

what's the last line of your code (last bit) - do i have to replace it with cheksum or leave it as it is?

[tictac]

that was fast ;)

and where do i set the data bits, i want to? is this the XXXXXXXX value in your code?

what's the last line of your code (last bit) - do i have to replace it with cheksum or leave it as it is?

here is example of my ISA rom source code... i use it on my NF7S modded bios

You just need to change the address & data for your patch ( i bold it on my source code :)

Good luck :toast:


; ------------------- sys_patch.asm ---------------------------------------------------
.486p

CSEG SEGMENT PARA PUBLIC USE16 'CODE'
ASSUME CS:CSEG
ORG 0

;Expansion rom header
db 55h ;;Rom signature byte 1
db 0AAh ;;Rom signature byte 2
db 01h ;;512 bytes
jmp INIT ;;jump to initialization


; equates, have been tested and works fine

address equ 0cf8h
data equ 0cfch

a_add equ 08000006Ch ; Bus 0 Device 0 Function 0 Offset 6Ch (CPU Disconnect Function)
a_data equ 0fff1ffffh

ORG 100h

SENDER PROC NEAR
; Active comunication with address
mov dx,address
out dx,eax
ret
SENDER ENDP

RECEIVER PROC NEAR
; Comunicate with the address & receive the data
mov dx,address
out dx,eax
mov dx,data
in eax,dx
ret
RECEIVER ENDP

TUNER1 PROC NEAR
; Sending new data at ebx to the address
xchg eax,ebx
out dx,eax
xchg eax,ebx
ret
TUNER1 ENDP

TUNER2 PROC NEAR
; Increase data
or eax,ebx
out dx,eax
ret
TUNER2 ENDP

TUNER3 PROC NEAR
; Decrease data
and eax,ebx
out dx,eax
ret
TUNER3 ENDP

INIT PROC NEAR

; save all register that will be affected by our code
push eax
push ebx
push edx
pushfd

; CPU Disconnect Function
mov eax,a_add
mov ebx,a_data
call RECEIVER
call TUNER3

; Restore register contents and return to system bios file
popfd
pop edx
pop ebx
pop eax

INIT ENDP

ORG 200h

CSEG ENDS
END

; -------------------------- END OF sys_patch.asm -------------------------------------------

[VASkO]

thank you tictac

helps a lot :)

cheers :toast:

[shadowing]

Is there anyone that can get me this prog.? Apparently, i can't download it from either of the two links that Codered has. It says that it isn't there. Thx.

[maedox]

http://mongo.biz/A64Tweaker_V031.zip

[shadowing]

Thx. What are some usual tweaks that can help speed my system?

[TheMeatFrog]

Check out the screen shot I provided. RAM is in 2x512 dual channel running at 250MHz and I can't get the value in red set to 1 w/o lock up. Any ideas? Also any other changes to help improve performace would be greatly appreciated!

[shadowing]

Are those tweaks good for a S754?

[TheMeatFrog]

Chop Chop gurus me and Shadow needs some answers! J/K much <3 :D

[maedox]

Check out the screen shot I provided. RAM is in 2x512 dual channel running at 250MHz and I can't get the value in red set to 1 w/o lock up. Any ideas? Also any other changes to help improve performace would be greatly appreciated!

What voltages are you running your system at?

[TheMeatFrog]

What voltages are you running your system at?
cpu 1.6-1.63(1.450 +8.3%) and my ram is running at 2.7v.

[shadowing]

So are these usual tweaks?

Read Write Queue Bypass: X16
Controller Mode: 128 Bit
2T Timing: Disable
Bypass Max: Higher is better?
Max Async Latency: <is better?
Mem Clk 0-4 enabled/disabled (what are these?)

[swaaye]

I'm trying to get a good idea what settings are set to what in a fail safe config. I'm trying to start with the most conservative settings imagineable to try to figure out if I can get this notebook's RAM to do 200Mhz.

Can someone set their mobo's BIOS to fail-safe or something similar and then load up A64Tweaker and share what the settings are?

[GazC]

I've just tried to download A64 tweaker again for my new install and I'm getting a 404.

[slayer899]

i've seen people with a new version it seems from screenshots, is there a place to d/l this?

[CodeRed]

Sorry guys Ive been out of the overclocking scene for the last month or so to pursue a new hobby ... snake breeding.

The offcial release of A64 Tweaker is V0.31, this is also the best one to use. I did produce V0.5Xt which added some HTT settings, but these dont work. THe latest (untested) release is 0.6 which adds a few minor features such as Drive Strength etc etc.

Anyway you can download them all here:
V0.31 (http://home.exetel.com.au/codered/A64Tweaker/A64Tweaker_V031.zip)
V0.5 (http://home.exetel.com.au/codered/A64Tweaker/A64Tweaker0.5XTbeta.zip)
V0.6 (http://home.exetel.com.au/codered/A64Tweaker/A64Tweaker_V0.6beta.zip)

My new hobby will go quiet around May/June, thats winter over here and its also when snakes are at their quietest. So maybe around that time I will get another A64 rig and start the overclocking again.

[swaaye]

CodeRed....

I have a dream.....and that is that A64Tweaker can have the snazzy feature of setting a 4x multiplier on my notebook while it is applying its settings. I've found that the only way to guarantee no lock up when changing the RAM clock speed is to literallly unplug the thing from the AC power (or use a proggy to set it to minimal power use, but the ac plug is much less of a pain to do)......

edit:
I managed to figure out a crazy way around this lockup problem. By using a batch file and removing the AMD processor driver (using MS's OEM driver), I disable PowerNow. Instead, using the batch file, I have Clockgen set the FID to 4x, then apply A64Tweaker, then load up RMClock which simulates PowerNow (and does it better with voltage controls and many advanced settings).



A64Tweaker.exe 200a.a64 //this one just applies some latency settings. I needed something before Clockgen cuz Clockgen doesn't like being first and gives a driver error

CG-ICS950403.exe -file=800.txt //to 4x FID

A64Tweaker.exe 200X.a64 //apply latency and RAM clock settings

start RMClock.exe //load up RMClock

[bachus_anonym]

@CodeRed...

First of all, thanks a lot for the great tool you made :thumbsup:

Now... Let's get on with it :) In your latest release - v0.60 - you added quite a few new options like Drive Strength, DQS Strobe Timmings.... By doing so you pretty much gave MSI K8N Neo2 users all the RAM tweaking options that they've never had available in BIOS but e.g. DFI NF3/NF4 enjoyed for some time now . But there's one more I'd like to see - Bank Interleave 2-way/4way :)

Is it possible to add that option at all ??? Can you comment on that, please...

Best regards,

EDIT: Damn.Silly me. I must have missed Tictac's post above about bank interleave... :brick: Hopefully, you will be able to add it in your next revision.

[TEDY]

thanks for a64 tweaker :p

[enduracell]

Codered thanks for ur great tool once again :toast:
the load profile doesn't work correctly on version 0.5 and 0.6, are you planning on fixing it?
Also the LDT multi on version 0.5 was working fine, imo this is the option that should stay on future releases as it's the only tool that could change it on the fly...

[CodeRed]

A fix for V0.6 will have to wait until I get another A64 rig .. probably around May/June (thats winter down here) before I start overclocking again.

The LDT multi in 0.5 only appears to work. This version only changes the CPU registers not the chipset and doesnt perform a LDT reset so the changes dont actually take effect. Some of the buffering parameters do however seem to take effect. If I could get hold of the chipset data sheets than maybe this feature could be made to work properly.

V0.31 is still the latest fully tested release. The others were just experimental and couldnt be tested due to my lack of hardware.

As for mem interleave, its very unlikely that this feature will work from within windows. Changing the interlave will also change the physical memory map and thus screw up everything already loaded into RAM. It may be possible to put the machine into a hybernation mode, page everything to disk, change the interlave and then reload the mem image form disk, but unfortunately I dont have enough technical info on how this is done by windows.

[TreeBark]

I am interested in getting the shuttle sn25p (small size) or maybe making computer out
of a nforce4 mini-atx board. (I think that msi is making one now).
http://techreport.com/reviews/2005q...5p/index.x?pg=5

I want ecc memory support of the unregistered dimms. The Asus A8n-sli Deluxe (according to bios option and manual) and the DFI nforce4 boards support ecc (according to a review I read). It does not seem from the info I have been able to gather that the shuttle sn25p does support ecc in the bios.

From my reading of an AMD tech document on the socket 939 processor, ecc is a processor thing. So that processor does support ecc of its unregistered DIMMs.

So my question is , if the sn25p does not support ecc in the bios, if I run the A64 Tweaker utility, will it really be able to override the bios and add the ecc functionality to the sn25p? Can someone tell me technically why it should or should not be able to . What could get in the way of that on the motherboard level? Will ecc unregisted dimms work in the sn25p, during the times the A64 Tweaker is not running? In other words , will the motherboard be smart enough to not use the extra ecc chip on the dimm during initial boot up?

Can a64 Tweaker be incorporated into the boot up sequence? After the ec switch is set iin the Tweaker, can you shut down tweaker and the ecc will continue withought having to have Tweaker continue in the background?

Thanks,

Oh, and how can you tell for certain the ecc is really being used, and not just see a Tweaker switch? How does that really work? Can you tell if you run a memory benchmark without ecc, then run the same benchmark with ecc, and there should be a like 1/8th decrease is memory speed or something?

Oh, I take it, that once you shut down the Tweaker program utility, all the settings you made will continue until the computer shuts down?

Will A64 tweaker be able to start up from inside the new 64 bit windows that is being realeased?

If I wanted to run Linux or 64 bit Linux but needed the ecc switched on, could I boot into windows, switch it on though the Tweaker, then boot into Linux without hitting the reset switch. I don't know what I am talking about here. Would there be any sequence that would keep the toggles on the memory?

Thanks so much for help.

[sun_tzu617]

problem... I change values, and when i hit "Set", all the values go back to the original...

whats going on here?

[IvanAndreevich]

Finally tried it - 150 MB/s more in CacheMem32 :) No stability problems either.

[IvanAndreevich]

ROFL.. somebody try this. Drag a prime95 icon on the A64 tweaker icon. Instant reboot :)

[Crisao23]

Guys I just built a new box here.

It's a FX 55, 1GB corsair 1024 3200xl, powercolor x800xl and asus a8n-sli deluxe with bios 1006.

Will change to dfi when I have money.

Meanwhile I would like to tweak my memory in order to reach 6000 or a little more on reading tests. I don't want to raise voltage above 2.7/2,75 or raise the clock.

I wanna tweak to reach its best at stock settings.

Can you help me ?

Playing with A64 tweaker at the settings below I got the following results:
a64tweaker settings:

http://img66.exs.cx/img66/2030/a64tweaker151010225221139usrwq.th.jpg (http://img66.exs.cx/my.php?loc=img66&image=a64tweaker151010225221139usrwq.jpg)

read:

http://img66.exs.cx/img66/795/leitura151010225221139usrwqb8x.th.jpg (http://img66.exs.cx/my.php?loc=img66&image=leitura151010225221139usrwqb8x.jpg)

write:

http://img66.exs.cx/img66/8938/escrita151010225221139usrwqb8x.th.jpg (http://img66.exs.cx/my.php?loc=img66&image=escrita151010225221139usrwqb8x.jpg)

latency:

http://img77.exs.cx/img77/9431/latencia151010225221139usrwqb8.th.jpg (http://img77.exs.cx/my.php?loc=img77&image=latencia151010225221139usrwqb8.jpg)

[J-Mag]

Is that TCCD stuff you are running? And it works at a cas of 1.5? (A64 tweaker crashes if I even try to change CAS ot a higher value for me and I am using the same board + TCCD, although I am using a winchester...)

Anyway, I think you should download the newer version .6beta cause there are more options...
OPB did a write up about DQS http://www.xtremesystems.org/forums/showthread.php?t=57925

Then also you might want to lower your refresh rate...

Also I have heard setting the read write queue bypass to 16x improves performance (if you read this thread you would know this as well, however they were uing BH-5...)

[Crisao23]

Yup, 1024-3200XL Revision 1.2

Works pretty fine at 1.5, including hours of gaming, sciencemark, winrar, prime95 and everest latest beta memory benchmark.

I'm starting to read more about it, thanks for the links. Lotsa info in one shot :D

[raydelee]

why everytime i press the set button on the amd64 tweaker my system reboot or hang?
i've follow the setting on the first post, is there any other steps that i need to do before changing the value using amd64 tweaker

thx

[andL64]

you cant set the CAS latency with amd64 tweaker try it in the bios and go with memtest

[raydelee]

you cant set the CAS latency with amd64 tweaker try it in the bios and go with memtest

even i dont set cas latency its still reboot
any step by step guide when using a64 tweaker

thanks a lot

[nordik]

Wish I knew what half these options did lol :p

[G H Z]

Code hope ya get a new A64 rig to play with soon:)

[IvanAndreevich]

Yeap would be nice to have CodeRed back on here

[sideeffect]

Hi all

Great tweaker code red! Its been a life saver for me as I cant set 1T ram timing in the bios on my K8N neo 2 :)

Was just trying your 0.5 beta and the Link Frequancy ( HTT Multi) seems to work fine on my neo 2 both cbid and sisoft sandra detect the front side bus changes.

In your last post you mentioned htt options not working so is it changing or not is what im wondering?

Regards and hope you continue making this great app.

[Borg Number One]

Hi tictac.


1.)
This:
http://xtremesystems.org/forums/showthread.php?t=56354

also may interests you.

BNOBTC v6 with totally new version of:
AMIBCP
ModBin6 (2.01.01 (06/25) 2003)
CBROM (CBROM32 1.33, 1.41, 1.44)
Flash utilities etc.

will be released soon.

http://bnobtc.pix-art.com


2.)

header: 55 AA ; Boot Able rom
jmp init ; jump to code intialization
retf ; return far to system bios file

INIT
pushad
push eax
push edx
mov eax,0x80002184; eax=Bus0Dev2Func1,Offset 84,85,86,87
mov dx,0cf8 ; set dx as adress port
out dx,eax ; send the address to IO Space throgh dx port
mov dx,0cfc ; set dx as data port
in eax,dx ;Receive the data into eax for the address we sent through dx port
and eax,XXXXXX ; Change the data
or eax,XXXXXX ; Change the data
out eax,dx ; Send back the modded data through dx port
pop edx,
pop eax
popad
ret ; return to header

last bit; use 8 bit checksum



The assembler code looks really interesting and this idea is similar to the ROMOS project.
http://hosting.modflex.com/rayer/romos/romose.htm

ROMOS booting in Bochs PC Emulator
http://bnobtc.pix-art.com/images/borgbios/romos/bochs_romos.gif

ROMOS booting in VMware
(Weird chars appeared while booting ROMOS in VMware,
but there was no reason for this.
New releases of VMware may do not have this bug anymore.)
http://bnobtc.pix-art.com/images/borgbios/romos/vmware_romos.gif
(PNG conversion and highest possible lossless PNG optimization & file size reduction by:
Borg Number One - borg_no [dot] one -at- gmx [dot] net
Thanks go to GIMP, PNGCRUSH and PNGOUT)

Well, I just would like to know what values have I to replace with xxxxxx?

[Napoleonic]

where is the link to the lastest a64 tweaker? is it the 0.31 ver on page 1?

[mcnbns]

Bump!

I'd like to know the same thing. Where can I download 0.6 beta, the one I see everyone else using? :)

EDIT: Nevermind, I guess a bit of thread searching does the trick. Here's the post with all the download links for all you other lazy people: http://xtremesystems.org/forums/showthread.php?p=711532#post711532

[Dalle]

thought this was a new 0.6 beta but apparently not :P
anyway just thought that i'd mention that 0.6b and 0.51xt both had the same bug on my machine

if i save the current settings and load them again they arent the same :/
max bypass is changed to 0x and tref is changed to 100mhz 15.6µs

[sang]

similar probs,here:
cant load the saved setings of A64 Tweaker,doesnt matter wich vers. i use. :(

tested on dfi nf3 sk754,GA-k8ns sk939,EP-9nda3J sk939.

[tictac]

Borg Number One... have you seen with pinczakko source code..

he hack down realtek NIC rom :woot:


;-------------------------------------------------------------------;
;The base code created in 2:34 am May 4th 2003
;Successfully patched in 9:35 am July 28th 2003
;by Darmawan MS a.k.a Pinczakko.
;
;This is my first operating system prototype :). One thing still
;obscured, the BEV mechanism mentioned in Plug & Play BIOS spec 1.0A
;don't explain about how the code executed :(. But based on my
;experiment it seems to be executed from ROM. So everything we do
;prior to loading the OS code from the expansion ROM into the RAM
;can't do anything dealing with memory write operation. I think
;BEV works as follows :
;1. During POST, the main bios recognize the LAN card as boot device.
;2. If we set up the main bios to boot from LAN as default, after POST succeded,
; int 19h (bootstrap) will point into the PnP option rom BEV of the LAN
; and passes execution into the code there, so we're executing code
; in the ROM pointed to by the BEV. Unless we're loading part of this
; code into RAM and execute from there, there's no writeable area in our code
;
;While the PCI function of the LAN card function as ordinary PCI card does
;so, the PCI init function has no direct connection with the BEV related stuff.
;
; <--------- HACK IT DOWN D00D ----------->
;
;--------------------------------------------------------------------;
[BITS 16] ;Real mode by default (prefix 66 or 67 to 32 bits instructions)

[ORG 0x00]
;-------------------------------------------;
; Option rom header
;-------------------------------------------;
db 0x55 ;;Rom signature byte 1
db 0xAA ;;Rom signature byte 2
ROMsize db ROM_Size ;;1024 bytes
jmp INIT ;;jump to initialization

Times 0x18-($-$$) db 0 ;;zero fill in between
dw PCI_DATA_STRUC ;;Pointer to PCI HDR structure (at 18h)

Times 0x1A-($-$$) db 0 ;;zero fill in between
dw PnP_Header ;;PnP Expansion Header Pointer (at 1Ah)

;----------------------------
; PCI data structure
;----------------------------
PCI_DATA_STRUC:
db 'PCIR' ;PCI Header Sign
dw 0x9004 ;Vendor ID
dw 0x8178 ;Device ID
dw 0x00 ;VPD
dw 0x18 ;PCI data struc length (byte)
db 0x00 ;PCI Data struct Rev
db 0x02 ;Base class code, 02h == Network Controller
db 0x00 ;Sub class code = 00h and interface = 00h -->Ethernet Controller
db 0x00 ;Interface code, see PCI Rev2.2 Spec Appendix D
dw ROM_Size ;Image length in mul of 512 byte, little endian format
dw 0x00 ;rev level
db 0x00 ;Code type = x86
db 0x80 ;last image indicator
dw 0x00 ;reserved

;-----------------------------
; PnP ROM Bios Header
;-----------------------------
PnP_Header:
db '$PnP' ;PnP Rom header sign
db 0x01 ;Structure Revision
db 0x02 ;Header structure Length in mul of 16 bytes
dw 0x00 ;Offset to next header (00 if none)
db 0x00 ;reserved
db 0x7A ;8 Bit checksum (for this header, -->
; --> check again after compile and repair if needed)
dd 0x00 ;PnP Device ID --> 0h in Realtek RPL ROM
dw Manufacturer_str ;pointer to manufacturer string
dw Product_str ;pointer to product string
db 0x02,0x00,0x00 ;Device Type code 3 byte
db 0x14 ;Device Indicator, 14h from RPL ROM-->See Page 18 of
;PnP BIOS spec., Lo nibble (4) means IPL device

dw 0x00 ;Boot Connection Vector, 00h = disabled
dw 0x00 ;Disconnect Vector, 00h = disabled
dw Start_OS ;Bootstrap Entry Vector (BEV)
dw 0x00 ;reserved
dw 0x00 ;Static resource Information vector (0000h if unused)

;----------------------------------------------------------
; Identifier strings
;----------------------------------------------------------
Manufacturer_str db 'Pinczakko Corporation',00h

Product_str db 'Realtek Hacked ROM',00h

;--------------------------------------------------------------------
;PCI Option ROM initialization Code (init function)
;--------------------------------------------------------------------
INIT:

lea si,[msg] ;fetch the string addr
call dis_string ;display the message

mov bx,ROMsize ;clean up memory used (set image size to 0)
xor ax,ax ;produce 0000h
mov [bx],ax ;3rd byte of this bios image file (image size)

or ax,0x20 ;inform system BIOS that an IPL device attached
;see PnP spec 1.0A p21 for info's

retf ;return far to system BIOS

msg db 10,13,'PCI expansion rom initialization called...','$'

;--------------------------------------------------------------
; -- Procedure to display string to stdout --
;Procedure definition:displaying character done through
;int 10h,service 0Eh
;--------------------------------------------------------------
dis_string:
cld
.more_dis: ;display OS message
lodsb
cmp al,'$'
je .no_more_dis
mov ah,0xE
mov bx,0x7
int 10h
jmp .more_dis
.no_more_dis:
retn

;--------------------------------------------------------------------
; Operating system entry point/BEV implementation (BootStrap)
;--------------------------------------------------------------------
Start_OS:

mov ax,cs
mov es,ax ;make all segment reg to -->
mov ds,ax ;point to the right segment

lea si,[msg_PnP] ;fetch the string addr
call dis_string ;display the message

mov ah, 0x00
int 0x16 ;wait for key to be hit
;----------------------------------------------------------------------------------
;--- Load The Operating System Code beginning at OS_Load_Seg :OS_Load_Offset h ----
;----------------------------------------------------------------------------------
cli ;disable interrupt during loading

mov ax,OS_Load_Seg ;point to OS segment
mov es,ax
mov ax,OS_Load_Offset ;point to OS offset
mov di,ax

lea si,[OS_Code] ;equal to lea si,OS_Code in masm
cld

xor ecx,ecx
mov ecx,OS_Code_Size16

load_os:
lodsw
stosw
loop load_os

;-------- Loading completed -------------------------------------

mov ax,cs ;restore es segment register
mov es,ax
xor di,di

jmp OS_Load_Seg:OS_Load_Offset

msg_PnP db 10,13,'PnP BEV Routine Invoked!',10,13,'$'

;------------------- WARNING !!! ----------------------------------;
;-- The linear address here must match the second file (OS code) --;
OS_Load_Seg equ 0x7C0
OS_Load_Offset equ 0x0000

ROM_Size equ 0x04 ;ROM size in multiple of 512 bytes
OS_Code_Size equ ((ROM_Size - 1)*512)
OS_Code_Size16 equ ( OS_Code_Size / 2 )


Times (ROM_Size*512 - OS_Code_Size) - ($-$$) db 0 ;extend to 512 bytes, zero fill in between
OS_Code:

[tictac]

Patching A64 Memory Timing through bios level :woot:

get the source code here: :fact:
http://www.xtremesystems.org/forums/showpost.php?p=917052&postcount=384

[Borg Number One]

Hi tictac.

1.)
How to build a BIOS module which is able to run this code:

http://www.farb-rausch.com/
-->
http://www.farb-rausch.com/fr026.zip


; fr-026: 34b mul+cycle (uc 6.22 size optimizing compo entry)
; 1st place
; code: ryg (original concept) & kb (additional opcode crunching)
;
; rules were to write a "colorcycling" (no real colorcycling was
; required, only colorcycling-like animation) effect that display
; a x * y-ish pattern somewhere on the screen. the palette was
; required to look like the original version.

org 256

mov al, 13h ; ...load al with 13h (mode number)
int 10h ; set mode 13h

mov bp, 320 ; screen is 320 pixels wide

x les ax, [bx] ; es = end of mem (9fffh), ax = 20cdh
cwd ; => dx = 0 (for idiv)
mov ax, di ; get dest address
idiv bp ; div by width => ax=y coord, dx=x coord
imul dx ; mul x by y
stosb ; store color in vram
mov dx, 3c9h ; dac data
bt cx, 6 ; bit 6 of cx => carry flag
salc ; set al from carry flag
xor ax, cx ; => all this is functionally equivalent to something like
; "test al, 64" / "jz skip" / "not al" / "skip: blah"
; which should be somewhat easier understandable, but bigger.
out dx, al ; write grayscale pixel values
out dx, al
out dx, al
loop x ; pixel loop.
loop x ; skip cx = 0 to get the cycling effect!

; that's all there is to it.
; this is the 7th (or 8th) version; the first try was
; 49 bytes, from then on we successively made it smaller.


Well, I tried this...:
ASM:

push bp
stosb ; Store al to es:[di]
mov al,13h
int 10h ; Video display ah=functn 00h
; set display mode in al
mov bp,140h
loc_x:
les ax,dword ptr [bx] ; Load seg:offset ptr
cwd ; Word to double word
mov ax,di ; Fixup - byte match
;* db 89h,0F8h ; Fixup - byte match
idiv bp ; ax,dx rem=dx:ax/reg
imul dx ; dx:ax = reg * ax
stosb ; Store al to es:[di]
mov dx,3C9h
bt cx, 6 ; bit 6 of cx => carry flag
salc ; set al from carry flag
xor ax, cx ; => all this is functionally equivalent to something like
; "test al, 64" / "jz skip" / "not al" / "skip: blah"
; which should be somewhat easier understandable, but bigger.
out dx, al ; write grayscale pixel values
out dx, al
out dx, al
loop loc_x ; pixel loop.
loop loc_x ; skip cx = 0 to get the cycling effect!

HEX:
55AAB013CD10BD4001C4079989F8F7FDF7EAAABAC9030FBAE1 06D631C8EEEEEEE2E7E2E5

...and I used Bochs' feature to load Option/ISA ROMs.
But while booting Bochs with the compiled Option/ISA ROM,
there will be no switch to videomode 13h.
Bochs is still in text mode, but I can see sliding the colors of the background and the cursor.

2.)
Furthermore, how to insert a feature to break the animation
with any key
or
after a certain time?


3.)
How is it possible that "new" or nearly each todays BIOS's are able to display logos
in SVGA modes (640*480*256; 800*600*256; 1024*768*256; ...).
Do they already use VESA / VBE ?

[flexy]

Gents,
:a64tweaker_V031.zip (http://home.exetel.com.au/codered/A64Tweaker/A64Tweaker_V031.zip) * linked fixed now *

heres another dl link for those who have problems downloading the app: v0.50 XT beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker.exe) or v0.31 final (http://www.cranox.com/Software/A64-Tweaker/a64tweaker_V031.exe)

v0.60 Beta is up! (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip)

_


my antivir with latest definitions tells me that 0.31 (both files from that link) are infected with some trojan !!

[flexy]

wrote support email to the antivir people...this is something which REALLY annoys me since i cannot prevent the "found trojan" pop-up from coming up.

[andL64]

;) i deactivated the avguard ;)

what do you think is more important? eh

thx @ codered amd supaguru :toast:

[Lynxx]

I checked V0.31. V0.50 and V0.60 Beta - AntiVir says all these Versions are infected by the Trojan Horse TR/Drop.VB.fk.2.1
But i guess the Detection is wrong, i've send the files to AntiVir. Addionally i found out when packing A64Tweaker with UPX and strip the Overlaycontent (Contains Debug-Infos, Paths and stuff), AntiVir doesnt alarm anymore.
If you want to continue using A64Tweaker with AntiVir, use this version -> http://rawhi.de/download/A64Tweaker_V0.6beta_UPX_OVERLAYSTRIP.exe
Due the strpping and compressing its also only 176Kb (Original 516Kb). :cool:

[ReelMonza]

Hi, can anyone assist me in finding which offset and bits to modify for the following options ?

Disable 32 Byte Granularity (A64Tweaker says its enabled, freezes when disabled)

Enable DRAM Bank Interleave (how do I check whether it's enabled or not ?)

I'd like to experiment with these options a little cause my board doesnt have them in BIOS and they'll probably won't add them in newer releases, so I'd like to patch them through bios level as per tic tac's A64 Bios Tweaker... (http://www.xtremesystems.org/forums/showpost.php?p=917052&postcount=384)

Any input will be greatly appreciated.

[lukija]

Hi, can anyone assist me in finding which offset and bits to modify for the following options ?

Disable 32 Byte Granularity (A64Tweaker says its enabled, freezes when disabled)

Enable DRAM Bank Interleave (how do I check whether it's enabled or not ?)

*
*
*



32 Byte Granularity :

BUS - 0
DEVICE - 24
FUNCTION - 2
OFFSET - 90 (hex)
bit 19 ( 0 - disabled , 1 - enabled)

It works in combination with bit 16 (64 or 128 bit interface to DRAM), taken from AMD documentation:



Bit 19 Bit 16
0 0 8-beat bursts (64 bytes)
------------------------------------
0 1 4-beat bursts (64 bytes)
------------------------------------
1 0 4-beat bursts (32 bytes)
------------------------------------
1 1 4-beat bursts (64 bytes)
2-beat bursts (32 bytes) for Revision E and
later revisions if Burst2Opt = 1,
UnBuffDimm = 1, and En2T = 0
------------------------------------


Bit 16:

128-Bit/64-Bit (128/64)—Bit 16. Indicates a 128-bit interface to DRAM.
0 = 64-bit interface to DRAM
1 = 128-bit interface to DRAM



Regarding DRAM Bank Interleave, it is not that easy, I will try to find out more.

[lukija]

I've played with DRAM interleave option in BIOS (DFI LP UT NF4 Ultra-D, 623-3 BIOS) and here is what I got. Just to mention, I have 2 sticks of PQI Turbo (2 x 512MB) in orange slots.

BUS 0, DEVICE 24, FUNCTION 2

32bit mode

Offset 4C

Eanbled
00001001 (hex)
Disabled
02000001 (hex)

Differences (enabled -> disabled):

Bit 12 (1 -> 0)
Bit 25 (0 -> 1)

Offset 68

Enabled
03E0EE00 (hex)
Disabled
01E0FE00 (hex)

Differences (enebled -> disabled)

Bit 12 (0 -> 1)
Bit 25 (1 -> 0)

Offset 6C

Enabled
03E0EE00 (hex)
Disabled
01E0FE00 (hex)

Differences (enebled -> disabled)

Bit 12 (0 -> 1)
Bit 25 (1 -> 0)

For more information see this (page 84):

http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/26094.PDF

Looks like it is not that esasy to figure out. It would be interesting to see what happens with different configurations (1x512MB, 2x256MB, 1x256MB, different slots ....)

[Geforce4ti4200]

Hi, I enjoy using your a64 tweaker! I do have some questions:

1. how do you make windows load with startup settings? It doesnt work.
2. why does it sometimes default to loosest timing values? bug?
3. how do I change async latency in the bios of my gigabyte s939?
I am getting tired of manually changing it to 7 everytime windows loads cause the default of 6 isnt stable

[Sparxxxy]

is there a guide for this a64 tweaker?
i'm kinda noob and don't know how to set it up for best performance...

[GARM]

"PLEASE HELP US MR. RED!" :(






Gents,

I've just found a way to really boost your A64 performance using WPCREDIT.

The A64 mem controller registers can be accessed using WPCREDIT using Bus #0, Device #24, Function #2. There are 4 main registers that I have been playing with:

0x88 DRAM Timing Low
0x8C DRAM Timing High
0x90 DRAM Configuration Low
0x94 DRAM Configuration High

The timings registers set all the DRAM timings params (as you'd expect), but there are many more than most BIOSes will show you. The best performance is obtained using:

Column Address Strobe # (CAS) = 2.0
Row Cycle Time (Trc) = 8
Row Refresh Cycle Time (Trfc) = 12
RAS# to CAS# delay (Trcd) = 2
Row to Row delay (Trrd) = 2
Min RAS Active Time (Tras) = 5
Row Precharge Time (Trp) = 2
Write Recovery Time (Twr) = 2
Write to Read Delay (Twtr) = 1
Read to Write Delay (Trtw) = 1

I normally write this as 2-8-12-2-2-5-2-2-1-1 for convenience ... not that rememering all those values is easy.

To set the mem timings to the above values change the registers as follows:
reg 0x88 to 0x02522311
reg 0x8C to 0x00000B00
(use 32 bit mode in WPCREDIT)

I have only begun to experiment with the Config registers but some of the things I have tried are setting the Asynchronous Latency Value (controlled by reg 0x94). Normally my BIOS sets this to 7ns, but when I dropped it to 4ns there was a healthy boost to my memory performance. To do this set bits 0-3 of reg 0x94 to 0100 (binary) (4 for those who cant read binary).

Just to make things more interesting, bits 22-20 of reg 0x94 control the DRAM speed (200, 166, 133, 100 Mhz). There are several reserved values, and I decided to try 110. Surprisingly this gave me a mem speed somewhere inbetween 200 and 166 MHz. This may be a 183 Mhz mem option I need to test some more to confirm these results.

Oh, 2T is also easy to disable :D

We no longer have to worry about BIOS updates, its all there in the DRAM registers. Over time I may write a simple windows app to set all this up in a user friendly fashion ... just need to find the time.

Only thing I cant do is set the bank interleave. Doing so would reorder the physical memory locations ... not something I think windoze would be happy with :p:

Try it and compare your before and after benchies with something like pifast or superpi and you'll see the boost.

============================================

V0.31 of A64 tweaker is now ready (win 64 bit compatible now)
jump to this post
http://www.xtremesystems.org/forums/showthread.php?postid=505345#post505345

or just download :a64tweaker_V031.zip (http://home.exetel.com.au/codered/A64Tweaker/A64Tweaker_V031.zip) * linked fixed now *
heres another dl link for those who have problems downloading the app: v0.50 XT beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker.exe) or v0.31 final (http://www.cranox.com/Software/A64-Tweaker/a64tweaker_V031.exe)

v0.60 Beta is up! (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip)

Code, I love this program you’ve created and I use it all the time, but there are many of us who are having a major issue concerning its accuracy versus the Memtest86+ v1.6 program. I came over here from the DFI-Street (http://www.dfi-street.com/forum/index.php) forum because we are fresh out of answers there. A specific debate is brewing as to which program, A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip) or Memtest86+ v1.6 (located in the BIOS of the DFI LANPARTY nF4 MoBos), is reading the tREF (http://www.dfi-street.com/forum/showpost.php?p=263127&postcount=29) (click on the green tREF please) properly. Here are both the tREF Table and the tREF “Discrepancy� Table. I created them both and have posted them over at DFI-Street (http://www.dfi-street.com/forum/index.php). A link to my tREF Table thread will be included in the tables themselves:


http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/Enhanced_tREF_TIMING_TABLE_A64_Tweaker_by_DRACULA. gif

http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/tREFDISCREPANCYTABLE.png (http://www.dfi-street.com/forum/showthread.php?t=23994)

As you can clearly see on the tREF "Discrepancy" Table, the only two places where A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip) and Memtest86+ v1.6 agree, are in the highlighted blue sections. Now you can see why this is an issue. Not only because my tREF Table is based on your program, but because ALL the other simple tREF Tables, everywhere on the internet, are based upon your A64 Tweaker program. I cannot state, explicitly, that either program is wrong; I simply do not know the answer to this problem :shrug: . There is, however, a British guy over at DFI-Street (http://www.dfi-street.com/forum/member.php?u=3800) who keeps challenging the validity of my thread's claim because he professes to "know" that your program is wrong! He sites his belief that A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip) is invalid based solely upon the only “proof� he provides, which is that programs like RightMark Memory Analyzer, Central Brain Identifier and of course, Memtest86+ v1.6 all agree with each other, but disagree with your A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip). I am not so quick to jump to this conclusion the way he is, however, because it is obvious to me that since all those "other" programs corroborate Memtest86+ v1.6, they are plainly reading the tREF (http://www.dfi-street.com/forum/showpost.php?p=263127&postcount=29) data in the same manner. Given that A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip) is reading the tREF (http://www.dfi-street.com/forum/showpost.php?p=263127&postcount=29) data differently than Memtest86+ v1.6, it obviously won't correspond with those other application's readings. Can you please help us by telling us which one is accurate and which one is in error and why, or if neither one is wrong, why there is this discrepancy? Thank you very much CodeRed :) .

[RimRam]

GARM,
You know what? I have Asrock Satta II and just checked Everest and it shows 7.8 us for my Tref but all versions of A64 shows 3.9. I never noticed this until you brought this up. So therefore it is not just DFI mobo. And If Everest agrees w/ Memtest86, then I am guessing there is something wrong here (w/ A64 tweaker, hope not thu.)
I wish this issue is looked into by CodeRed or someone knowledgable w/ Tweaker's program and solve this problem.

[GARM]

GARM,
You know what? I have Asrock Satta II and just checked Everest and it shows 7.8 us for my Tref but all versions of A64 shows 3.9. I never noticed this until you brought this up. So therefore it is not just DFI mobo. And If Everest agrees w/ Memtest86, then I am guessing there is something wrong here (w/ A64 tweaker, hope not thu.)
I wish this issue is looked into by CodeRed or someone knowledgable w/ Tweaker's program and solve this problem.

Yes, I agree and I do believe that this is a real issue, but just so that everyone is crystal clear on this point, I did not bring this to your attention to be mean or a jerk-off critic. I did this to try and genuinely resolve the issue. Regardless of what is or isn't correct, or whatever the case may be, I think that A64 Tweaker is fantastic, as are programs like CBI and RMMA. I just hope that CodeRed looks into this for all of us. I also think that CodeRed is a great programmer too :kissbutt: . Just so you know RimRam, to my knowledge, EVEREST only shows a refresh as is preprogrammed on your DIMM as it is reserved in the RAM's SPD. It is Memtest86+, Central Brain Identifier and RightMark Memory Analyzer that conflict directly with A64 Tweaker. EVEREST, like PC Wizard 2005, only displays the Serial Presence Detect, EEPROM that is right on your memory stick. The tREF I am concerned with is the one that can be adjusted in your BIOS on your MotherBoard. I also would like to point out that I know for fact that A64 Tweaker is 100% correct on all the other data it displays. The tREF is my only concern here.

I am now officially extending a request to ANYONE who may know the answer to this problem, or perhaps has a different spin on it, to let us know by posting a response in this thread. Until further notice and until this matter is cleared up satisfactorily, I shall display two versions of my tREF TABLE. One shall be based on Code's A64 Tweaker and the other on Memtest86+. I shall also include the tREF discrepancy Table between the other two and my TUTORIAL Table shall be exhibited at the bottom. Once this issue has reached an acceptable resolution, I shall remove the Table that displays incorrect data, should that be the case. Hopefully, there is someone out there who can assist all of us with this. Thank you! Peace :D ...


http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/Enhanced_tREF_TIMING_TABLE_A64_Tweaker_by_DRACULA. gif

http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/tREFDISCREPANCYTABLE.png

http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/Enhanced_tREF_Timing_Table_Memtest86_by_DRACULA.gi f

http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/tREF_TUTORIAL_Table_Created_by_DRACULA.gif

[stealth17]

bump?

[Grave]

...

[GARM]

BUMP...

[GARM]

SET...

[GARM]

SPIKE!

[GARM]

Thanks for the great game of volleyball guys, but can we please get back on target now? If CodeRed is unwilling or unable to respond to or resolve this issue, is there anyone else out there who can? I am re-listing the first two posts on this topic. Perhaps someone has the answers. We can only hope...

http://i21.photobucket.com/albums/b255/MaxHazard/SMILIES%20PART%202/character0185.gif

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"PLEASE HELP US MR. RED!" :(






Gents,

I've just found a way to really boost your A64 performance using WPCREDIT.

The A64 mem controller registers can be accessed using WPCREDIT using Bus #0, Device #24, Function #2. There are 4 main registers that I have been playing with:

0x88 DRAM Timing Low
0x8C DRAM Timing High
0x90 DRAM Configuration Low
0x94 DRAM Configuration High

The timings registers set all the DRAM timings params (as you'd expect), but there are many more than most BIOSes will show you. The best performance is obtained using:

Column Address Strobe # (CAS) = 2.0
Row Cycle Time (Trc) = 8
Row Refresh Cycle Time (Trfc) = 12
RAS# to CAS# delay (Trcd) = 2
Row to Row delay (Trrd) = 2
Min RAS Active Time (Tras) = 5
Row Precharge Time (Trp) = 2
Write Recovery Time (Twr) = 2
Write to Read Delay (Twtr) = 1
Read to Write Delay (Trtw) = 1

I normally write this as 2-8-12-2-2-5-2-2-1-1 for convenience ... not that rememering all those values is easy.

To set the mem timings to the above values change the registers as follows:
reg 0x88 to 0x02522311
reg 0x8C to 0x00000B00
(use 32 bit mode in WPCREDIT)

I have only begun to experiment with the Config registers but some of the things I have tried are setting the Asynchronous Latency Value (controlled by reg 0x94). Normally my BIOS sets this to 7ns, but when I dropped it to 4ns there was a healthy boost to my memory performance. To do this set bits 0-3 of reg 0x94 to 0100 (binary) (4 for those who cant read binary).

Just to make things more interesting, bits 22-20 of reg 0x94 control the DRAM speed (200, 166, 133, 100 Mhz). There are several reserved values, and I decided to try 110. Surprisingly this gave me a mem speed somewhere inbetween 200 and 166 MHz. This may be a 183 Mhz mem option I need to test some more to confirm these results.

Oh, 2T is also easy to disable :D

We no longer have to worry about BIOS updates, its all there in the DRAM registers. Over time I may write a simple windows app to set all this up in a user friendly fashion ... just need to find the time.

Only thing I cant do is set the bank interleave. Doing so would reorder the physical memory locations ... not something I think windoze would be happy with :p:

Try it and compare your before and after benchies with something like pifast or superpi and you'll see the boost.

============================================

V0.31 of A64 tweaker is now ready (win 64 bit compatible now)
jump to this post
http://www.xtremesystems.org/forums/showthread.php?postid=505345#post505345

or just download :a64tweaker_V031.zip (http://home.exetel.com.au/codered/A64Tweaker/A64Tweaker_V031.zip) * linked fixed now *
heres another dl link for those who have problems downloading the app: v0.50 XT beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker.exe) or v0.31 final (http://www.cranox.com/Software/A64-Tweaker/a64tweaker_V031.exe)

v0.60 Beta is up! (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip)

Code, I love this program you’ve created and I use it all the time, but there are many of us who are having a major issue concerning its accuracy versus the Memtest86+ v1.6 program. I came over here from the DFI-Street (http://www.dfi-street.com/forum/index.php) forum because we are fresh out of answers there. A specific debate is brewing as to which program, A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip) or Memtest86+ v1.6 (located in the BIOS of the DFI LANPARTY nF4 MoBos), is reading the tREF (http://www.dfi-street.com/forum/showpost.php?p=263127&postcount=29) (click on the green tREF please) properly. Here are both the tREF Table and the tREF “Discrepancy� Table. I created them both and have posted them over at DFI-Street (http://www.dfi-street.com/forum/index.php). A link to my tREF Table thread will be included in the tables themselves:


http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/Enhanced_tREF_TIMING_TABLE_A64_Tweaker_by_DRACULA. gif

http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/tREFDISCREPANCYTABLE.png (http://www.dfi-street.com/forum/showthread.php?t=23994)

As you can clearly see on the tREF "Discrepancy" Table, the only two places where A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip) and Memtest86+ v1.6 agree, are in the highlighted blue sections. Now you can see why this is an issue. Not only because my tREF Table is based on your program, but because ALL the other simple tREF Tables, everywhere on the internet, are based upon your A64 Tweaker program. I cannot state, explicitly, that either program is wrong; I simply do not know the answer to this problem :shrug: . There is, however, a British guy over at DFI-Street (http://www.dfi-street.com/forum/member.php?u=3800) who keeps challenging the validity of my thread's claim because he professes to "know" that your program is wrong! He sites his belief that A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip) is invalid based solely upon the only “proof� he provides, which is that programs like RightMark Memory Analyzer, Central Brain Identifier and of course, Memtest86+ v1.6 all agree with each other, but disagree with your A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip). I am not so quick to jump to this conclusion the way he is, however, because it is obvious to me that since all those "other" programs corroborate Memtest86+ v1.6, they are plainly reading the tREF (http://www.dfi-street.com/forum/showpost.php?p=263127&postcount=29) data in the same manner. Given that A64 Tweaker v0.60 Beta (http://www.cranox.com/Software/A64-Tweaker/A64Tweaker_V0.6beta.zip) is reading the tREF (http://www.dfi-street.com/forum/showpost.php?p=263127&postcount=29) data differently than Memtest86+ v1.6, it obviously won't correspond with those other application's readings. Can you please help us by telling us which one is accurate and which one is in error and why, or if neither one is wrong, why there is this discrepancy? Thank you very much CodeRed :) .


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GARM,
You know what? I have Asrock Satta II and just checked Everest and it shows 7.8 us for my Tref but all versions of A64 shows 3.9. I never noticed this until you brought this up. So therefore it is not just DFI mobo. And If Everest agrees w/ Memtest86, then I am guessing there is something wrong here (w/ A64 tweaker, hope not thu.)
I wish this issue is looked into by CodeRed or someone knowledgable w/ Tweaker's program and solve this problem.

Yes, I agree and I do believe that this is a real issue, but just so that everyone is crystal clear on this point, I did not bring this to your attention to be mean or a jerk-off critic. I did this to try and genuinely resolve the issue. Regardless of what is or isn't correct, or whatever the case may be, I think that A64 Tweaker is fantastic, as are programs like CBI and RMMA. I just hope that CodeRed looks into this for all of us. I also think that CodeRed is a great programmer too :kissbutt: . Just so you know RimRam, to my knowledge, EVEREST only shows a refresh as is preprogrammed on your DIMM as it is reserved in the RAM's SPD. It is Memtest86+, Central Brain Identifier and RightMark Memory Analyzer that conflict directly with A64 Tweaker. EVEREST, like PC Wizard 2005, only displays the Serial Presence Detect, EEPROM that is right on your memory stick. The tREF I am concerned with is the one that can be adjusted in your BIOS on your MotherBoard. I also would like to point out that I know for fact that A64 Tweaker is 100% correct on all the other data it displays. The tREF is my only concern here.

I am now officially extending a request to ANYONE who may know the answer to this problem, or perhaps has a different spin on it, to let us know by posting a response in this thread. Until further notice and until this matter is cleared up satisfactorily, I shall display two versions of my tREF TABLE. One shall be based on Code's A64 Tweaker and the other on Memtest86+. I shall also include the tREF discrepancy Table between the other two and my TUTORIAL Table shall be exhibited at the bottom. Once this issue has reached an acceptable resolution, I shall remove the Table that displays incorrect data, should that be the case. Hopefully, there is someone out there who can assist all of us with this. Thank you! Peace :D ...


http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/Enhanced_tREF_TIMING_TABLE_A64_Tweaker_by_DRACULA. gif

http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/tREFDISCREPANCYTABLE.png

http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/Enhanced_tREF_Timing_Table_Memtest86_by_DRACULA.gi f

http://i21.photobucket.com/albums/b255/MaxHazard/DFI-Street/tREF_TUTORIAL_Table_Created_by_DRACULA.gif (http://www.dfi-street.com/forum/showthread.php?t=23994)

[Flib]

Do they show the same on bootup?
Many programs can't recognize if you changed some timings within windows via A64Tweaker.

[GARM]

Do they show the same on bootup?
Many programs can't recognize if you changed some timings within windows via A64Tweaker.

I've never had any issues with other programs reading the "Tweaks" I've made while using A64 Tweaker, and the BIOS always reverts back to its original CMOS setup, from an A64 Tweaker adjustment, upon reboot. The A64 Tweaker's conflicting tREF data is always consistently there, however.

[ColdFlo]

Hello everyone and Code Red,

I have a problem I overshot one of my values and after my system locked and reboot now all my tweaker values are the values at the bottom of the drop menus and it wont let me change anything. Please help me anyway you can I'm very good at all tweaking just below this level any help would be greatly appreciated. I'm using the .60 version.

P.S. Sorry been awhile since Ive asked for help. Yes I've reinstalled. Not sure of anything thing else I should have tried or left out.
\/\/\/\/\/\/freecable guy u are the man!!!!! thanks allot!!!!!! I'll save space and not ad another post for my noob problem.

[freecableguy]

open cpu-z then close it, then try opening WPCREDIT again

[ColdFlo]

Jesus was a poor man. He paid for the slickest set of pny ddr400 he could get for 10 dollars after rebate....... But only if he knew the power it could weild......
DADAAAAAAAAAAAAAAA
DAADAAAAAAAAAAAAAAAA
DAADAAAAAAAAAAAAAAAAAAAAAAA
:::Strings Sections Finishes Off Theme of 2001:::
Column Address Strobe # (CAS) = 1.5!!!!!!!!!!!
Row Cycle Time (Trc) = 7
Row Refresh Cycle Time (Trfc) = 11
RAS# to CAS# delay (Trcd) = 3
Row to Row delay (Trrd) = 2
Min RAS Active Time (Tras) = 5
Row Precharge Time (Trp) = 2
Write Recovery Time (Twr) = 2
Write to Read Delay (Twtr) = 1
Read to Write Delay (Trtw) = 1

I normally write this as 1.5-7-11-3-2-5-2-2-1-1 for convenience ... not that rememering all those values is easy. You can always RED it again incase you forgets........

Thank you oh god of the RED CODE HE WHO IS KNOWN AS CODERED.

I shall forever be in your dept. May all my CLIPS POUR INTO THE FACES OF MINE ENEMIES AND CAUSE INSTANT DEATHS!!!!!!!!!!!!!!!!!
MUAHAHAHAHAHAHAHAHAHAHHAAHAHA AHAHAHAHAHHAHAHAHAHAHA AHAHAHHAAHHAHAHAHAHAHAHAHAHAHAHAAAAAAAAAAAAAAAAAAA AAAAAA!!!!!!!!!!!!!

I shall forever be in your debt..............
:stick: :slapass: :banana: :fact: :woot:

[luismenendez]

hi there,

can anybody tell me how to remove A64Tweaker-v031 ???

I looked in the register several times and I don't find the io.sys

thanks

[GARM]

hi there,

can anybody tell me how to remove A64Tweaker-v031 ???

I looked in the register several times and I don't find the io.sys

thanks

Yeah, it's called "Delete".

The program wasn't actually "installed" on your system, in any conventional sense. Just DELETE it.

[tictac]

Hi tictac.


1.)
This:
http://xtremesystems.org/forums/showthread.php?t=56354

also may interests you.

BNOBTC v6 with totally new version of:
AMIBCP
ModBin6 (2.01.01 (06/25) 2003)
CBROM (CBROM32 1.33, 1.41, 1.44)
Flash utilities etc.

will be released soon.

http://bnobtc.pix-art.com


2.)

header: 55 AA ; Boot Able rom
jmp init ; jump to code intialization
retf ; return far to system bios file

INIT
pushad
push eax
push edx
mov eax,0x80002184; eax=Bus0Dev2Func1,Offset 84,85,86,87
mov dx,0cf8 ; set dx as adress port
out dx,eax ; send the address to IO Space throgh dx port
mov dx,0cfc ; set dx as data port
in eax,dx ;Receive the data into eax for the address we sent through dx port
and eax,XXXXXX ; Change the data
or eax,XXXXXX ; Change the data
out eax,dx ; Send back the modded data through dx port
pop edx,
pop eax
popad
ret ; return to header

last bit; use 8 bit checksum



The assembler code looks really interesting and this idea is similar to the ROMOS project.
http://hosting.modflex.com/rayer/romos/romose.htm

ROMOS booting in Bochs PC Emulator
http://bnobtc.pix-art.com/images/borgbios/romos/bochs_romos.gif

ROMOS booting in VMware
(Weird chars appeared while booting ROMOS in VMware,
but there was no reason for this.
New releases of VMware may do not have this bug anymore.)
http://bnobtc.pix-art.com/images/borgbios/romos/vmware_romos.gif
(PNG conversion and highest possible lossless PNG optimization & file size reduction by:
Borg Number One - borg_no [dot] one -at- gmx [dot] net
Thanks go to GIMP, PNGCRUSH and PNGOUT)

Well, I just would like to know what values have I to replace with xxxxxx?

hi.... sorry for late reply i will post the source code in Xtreme bios section
check it over there :toast:

[ColdFlo]

Codered you ready for a windows 7 update?!!!! these old amd X2s are great on windows 7 would be very nice to have this app at disposal in windows 7.