saaya
10-24-2008, 05:30 AM
Hey Guys,
I keep getting confused myself so I made a little list for myself.
I figured it might be helpful for some people here to understand memory better, especially with all the pseudo technical marketing names such as PC3 16000 etc describing the speed of the memory :D
There are the memory cells, doing the actual work, then there are the IO buffers connecting the memory cells to the memory bus. No matter how much you shrink the manufacturing process and improve the architecture, memory cells dont scale very well to achieve higher and higher clockspeeds.
The jump from SDR to DDR was the biggest performance boost so far, while the memory cells and the memory bus actually remained at the same clockspeed, the bus was moving twice as much data and cut the latency down as well. a clock signal goes from a high to a low state, and instead of doing the next step everytime the clock signal was at a high state again, work was beeing done every time the clock signal changed its state.
unfortunately lostcircuits seems to be down...
i went ahead and used a drawing M.S created to explain DDR1 and later DDR2 in his articles and added DDR3 to it:
http://www.abload.de/thumb/memtypes140tl.png (http://www.abload.de/image.php?img=memtypes140tl.png)
The moves from DDR to DDR2 and from DDR2 to DDR3 were different, the memory cells couldnt be clocked higher, but the buffers could, so the amount of memory cells was simply doubled and the buffers would distribute the work to a different memory cell each clock. This doubles the effective bandwidth each time you double the IO buffer clockspeed and memory cell amount, but the latency of each memory cell would remain the same.
lets say you talk to people on a messanger, and it takes a long time to get a reply... so you start talking to several people at the same time since your bored waiting for replies. you get replies much faster now, so your not bored anymore, but the actual time you have to wait for each of the people you talk to, to reply to your questions is the same. so if the delay is really critical, and you need a reply from one of them quickly, you will wait the same time no matter how many people you talk to simulateously.
The latency is mostly affected by the memory cells, but the bus speed, the bus interface, and the memory controller slightly affect it as well, and since all of these have improved over the past years there IS an improvement in latency of DDR2 over DDR1, and DDR3 over DDR2, those improvements however are very small and almost insignificant. Real improvements in latency have only been achieved by amd and intel by moving to a dual channel memory controller and later integrating the memory controller into their CPUs.
The real advantages of every new generation of memory over its predecessor is a much higher memory bandwidth. how useful the added bandwidth is depends highly on the applications used, and on the CPU architectures need for bandwidth.
Please dont stone me for getting some details wrong :D
let me know and ill correct it :toast:
Hope this helps some of you to understand this stuff a little better :)
http://www.abload.de/thumb/1lgxm.png (http://www.abload.de/image.php?img=1lgxm.png)
http://www.abload.de/thumb/2ke13.png (http://www.abload.de/image.php?img=2ke13.png)
http://www.abload.de/thumb/3c7fy.png (http://www.abload.de/image.php?img=3c7fy.png)
I keep getting confused myself so I made a little list for myself.
I figured it might be helpful for some people here to understand memory better, especially with all the pseudo technical marketing names such as PC3 16000 etc describing the speed of the memory :D
There are the memory cells, doing the actual work, then there are the IO buffers connecting the memory cells to the memory bus. No matter how much you shrink the manufacturing process and improve the architecture, memory cells dont scale very well to achieve higher and higher clockspeeds.
The jump from SDR to DDR was the biggest performance boost so far, while the memory cells and the memory bus actually remained at the same clockspeed, the bus was moving twice as much data and cut the latency down as well. a clock signal goes from a high to a low state, and instead of doing the next step everytime the clock signal was at a high state again, work was beeing done every time the clock signal changed its state.
unfortunately lostcircuits seems to be down...
i went ahead and used a drawing M.S created to explain DDR1 and later DDR2 in his articles and added DDR3 to it:
http://www.abload.de/thumb/memtypes140tl.png (http://www.abload.de/image.php?img=memtypes140tl.png)
The moves from DDR to DDR2 and from DDR2 to DDR3 were different, the memory cells couldnt be clocked higher, but the buffers could, so the amount of memory cells was simply doubled and the buffers would distribute the work to a different memory cell each clock. This doubles the effective bandwidth each time you double the IO buffer clockspeed and memory cell amount, but the latency of each memory cell would remain the same.
lets say you talk to people on a messanger, and it takes a long time to get a reply... so you start talking to several people at the same time since your bored waiting for replies. you get replies much faster now, so your not bored anymore, but the actual time you have to wait for each of the people you talk to, to reply to your questions is the same. so if the delay is really critical, and you need a reply from one of them quickly, you will wait the same time no matter how many people you talk to simulateously.
The latency is mostly affected by the memory cells, but the bus speed, the bus interface, and the memory controller slightly affect it as well, and since all of these have improved over the past years there IS an improvement in latency of DDR2 over DDR1, and DDR3 over DDR2, those improvements however are very small and almost insignificant. Real improvements in latency have only been achieved by amd and intel by moving to a dual channel memory controller and later integrating the memory controller into their CPUs.
The real advantages of every new generation of memory over its predecessor is a much higher memory bandwidth. how useful the added bandwidth is depends highly on the applications used, and on the CPU architectures need for bandwidth.
Please dont stone me for getting some details wrong :D
let me know and ill correct it :toast:
Hope this helps some of you to understand this stuff a little better :)
http://www.abload.de/thumb/1lgxm.png (http://www.abload.de/image.php?img=1lgxm.png)
http://www.abload.de/thumb/2ke13.png (http://www.abload.de/image.php?img=2ke13.png)
http://www.abload.de/thumb/3c7fy.png (http://www.abload.de/image.php?img=3c7fy.png)